xref: /rk3399_rockchip-uboot/drivers/usb/gadget/dwc2_udc_otg.c (revision 6187c346516df218f85a906c8a8d58f3e5ed34d5)
1 /*
2  * drivers/usb/gadget/dwc2_udc_otg.c
3  * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
4  *
5  * Copyright (C) 2008 for Samsung Electronics
6  *
7  * BSP Support for Samsung's UDC driver
8  * available at:
9  * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
10  *
11  * State machine bugfixes:
12  * Marek Szyprowski <m.szyprowski@samsung.com>
13  *
14  * Ported to u-boot:
15  * Marek Szyprowski <m.szyprowski@samsung.com>
16  * Lukasz Majewski <l.majewski@samsumg.com>
17  *
18  * SPDX-License-Identifier:	GPL-2.0+
19  */
20 #undef DEBUG
21 #include <common.h>
22 #include <clk.h>
23 #include <dm.h>
24 #include <generic-phy.h>
25 #include <malloc.h>
26 #include <reset.h>
27 
28 #include <linux/errno.h>
29 #include <linux/list.h>
30 
31 #include <linux/usb/ch9.h>
32 #include <linux/usb/otg.h>
33 #include <linux/usb/gadget.h>
34 
35 #include <asm/byteorder.h>
36 #include <asm/unaligned.h>
37 #include <asm/io.h>
38 
39 #include <asm/mach-types.h>
40 
41 #include <power/regulator.h>
42 
43 #include "dwc2_udc_otg_regs.h"
44 #include "dwc2_udc_otg_priv.h"
45 
46 /***********************************************************/
47 
48 #define OTG_DMA_MODE		1
49 
50 #define DEBUG_SETUP 0
51 #define DEBUG_EP0 0
52 #define DEBUG_ISR 0
53 #define DEBUG_OUT_EP 0
54 #define DEBUG_IN_EP 0
55 
56 #include <usb/dwc2_udc.h>
57 
58 #define EP0_CON		0
59 #define EP_MASK		0xF
60 
61 static char *state_names[] = {
62 	"WAIT_FOR_SETUP",
63 	"DATA_STATE_XMIT",
64 	"DATA_STATE_NEED_ZLP",
65 	"WAIT_FOR_OUT_STATUS",
66 	"DATA_STATE_RECV",
67 	"WAIT_FOR_COMPLETE",
68 	"WAIT_FOR_OUT_COMPLETE",
69 	"WAIT_FOR_IN_COMPLETE",
70 	"WAIT_FOR_NULL_COMPLETE",
71 };
72 
73 #define DRIVER_VERSION "15 March 2009"
74 
75 struct dwc2_udc	*the_controller;
76 
77 static const char driver_name[] = "dwc2-udc";
78 static const char ep0name[] = "ep0-control";
79 
80 /* Max packet size*/
81 static unsigned int ep0_fifo_size = 64;
82 static unsigned int ep_fifo_size =  512;
83 static unsigned int ep_fifo_size2 = 1024;
84 static int reset_available = 1;
85 
86 static struct usb_ctrlrequest *usb_ctrl;
87 static dma_addr_t usb_ctrl_dma_addr;
88 
89 /*
90   Local declarations.
91 */
92 static int dwc2_ep_enable(struct usb_ep *ep,
93 			 const struct usb_endpoint_descriptor *);
94 static int dwc2_ep_disable(struct usb_ep *ep);
95 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
96 					     gfp_t gfp_flags);
97 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *);
98 
99 static int dwc2_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags);
100 static int dwc2_dequeue(struct usb_ep *ep, struct usb_request *);
101 static int dwc2_fifo_status(struct usb_ep *ep);
102 static void dwc2_fifo_flush(struct usb_ep *ep);
103 static void dwc2_ep0_read(struct dwc2_udc *dev);
104 static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep);
105 static void dwc2_handle_ep0(struct dwc2_udc *dev);
106 static int dwc2_ep0_write(struct dwc2_udc *dev);
107 static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req);
108 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status);
109 static void stop_activity(struct dwc2_udc *dev,
110 			  struct usb_gadget_driver *driver);
111 static int udc_enable(struct dwc2_udc *dev);
112 static void udc_set_address(struct dwc2_udc *dev, unsigned char address);
113 static void reconfig_usbd(struct dwc2_udc *dev);
114 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed);
115 static void nuke(struct dwc2_ep *ep, int status);
116 static int dwc2_udc_set_halt(struct usb_ep *_ep, int value);
117 static void dwc2_udc_set_nak(struct dwc2_ep *ep);
118 
119 void set_udc_gadget_private_data(void *p)
120 {
121 	debug_cond(DEBUG_SETUP != 0,
122 		   "%s: the_controller: 0x%p, p: 0x%p\n", __func__,
123 		   the_controller, p);
124 	the_controller->gadget.dev.device_data = p;
125 }
126 
127 void *get_udc_gadget_private_data(struct usb_gadget *gadget)
128 {
129 	return gadget->dev.device_data;
130 }
131 
132 static struct usb_ep_ops dwc2_ep_ops = {
133 	.enable = dwc2_ep_enable,
134 	.disable = dwc2_ep_disable,
135 
136 	.alloc_request = dwc2_alloc_request,
137 	.free_request = dwc2_free_request,
138 
139 	.queue = dwc2_queue,
140 	.dequeue = dwc2_dequeue,
141 
142 	.set_halt = dwc2_udc_set_halt,
143 	.fifo_status = dwc2_fifo_status,
144 	.fifo_flush = dwc2_fifo_flush,
145 };
146 
147 #define create_proc_files() do {} while (0)
148 #define remove_proc_files() do {} while (0)
149 
150 /***********************************************************/
151 
152 struct dwc2_usbotg_reg *reg;
153 
154 bool dfu_usb_get_reset(void)
155 {
156 	return !!(readl(&reg->gintsts) & INT_RESET);
157 }
158 
159 __weak void otg_phy_init(struct dwc2_udc *dev) {}
160 __weak void otg_phy_off(struct dwc2_udc *dev) {}
161 
162 /***********************************************************/
163 
164 #include "dwc2_udc_otg_xfer_dma.c"
165 
166 /*
167  *	udc_disable - disable USB device controller
168  */
169 static void udc_disable(struct dwc2_udc *dev)
170 {
171 	debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
172 
173 	udc_set_address(dev, 0);
174 
175 	dev->ep0state = WAIT_FOR_SETUP;
176 	dev->gadget.speed = USB_SPEED_UNKNOWN;
177 	dev->usb_address = 0;
178 	dev->connected = 0;
179 
180 	otg_phy_off(dev);
181 }
182 
183 /*
184  *	udc_reinit - initialize software state
185  */
186 static void udc_reinit(struct dwc2_udc *dev)
187 {
188 	unsigned int i;
189 
190 	debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
191 
192 	/* device/ep0 records init */
193 	INIT_LIST_HEAD(&dev->gadget.ep_list);
194 	INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
195 	dev->ep0state = WAIT_FOR_SETUP;
196 
197 	/* basic endpoint records init */
198 	for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
199 		struct dwc2_ep *ep = &dev->ep[i];
200 
201 		if (i != 0)
202 			list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
203 
204 		ep->desc = 0;
205 		ep->stopped = 0;
206 		INIT_LIST_HEAD(&ep->queue);
207 		ep->pio_irqs = 0;
208 	}
209 
210 	/* the rest was statically initialized, and is read-only */
211 }
212 
213 #define BYTES2MAXP(x)	(x / 8)
214 #define MAXP2BYTES(x)	(x * 8)
215 
216 /* until it's enabled, this UDC should be completely invisible
217  * to any USB host.
218  */
219 static int udc_enable(struct dwc2_udc *dev)
220 {
221 	debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
222 
223 	otg_phy_init(dev);
224 	reconfig_usbd(dev);
225 
226 	debug_cond(DEBUG_SETUP != 0,
227 		   "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n",
228 		    readl(&reg->gintmsk));
229 
230 	dev->gadget.speed = USB_SPEED_UNKNOWN;
231 
232 	return 0;
233 }
234 
235 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
236 /*
237   Register entry point for the peripheral controller driver.
238 */
239 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
240 {
241 	struct dwc2_udc *dev = the_controller;
242 	int retval = 0;
243 	unsigned long flags = 0;
244 
245 	debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
246 
247 	if (!driver
248 	    || (driver->speed != USB_SPEED_FULL
249 		&& driver->speed != USB_SPEED_HIGH)
250 	    || !driver->bind || !driver->disconnect || !driver->setup)
251 		return -EINVAL;
252 	if (!dev)
253 		return -ENODEV;
254 	if (dev->driver)
255 		return -EBUSY;
256 
257 	spin_lock_irqsave(&dev->lock, flags);
258 	/* first hook up the driver ... */
259 	dev->driver = driver;
260 	spin_unlock_irqrestore(&dev->lock, flags);
261 
262 	if (retval) { /* TODO */
263 		printf("target device_add failed, error %d\n", retval);
264 		return retval;
265 	}
266 
267 	retval = driver->bind(&dev->gadget);
268 	if (retval) {
269 		debug_cond(DEBUG_SETUP != 0,
270 			   "%s: bind to driver --> error %d\n",
271 			    dev->gadget.name, retval);
272 		dev->driver = 0;
273 		return retval;
274 	}
275 
276 	enable_irq(IRQ_OTG);
277 
278 	debug_cond(DEBUG_SETUP != 0,
279 		   "Registered gadget driver %s\n", dev->gadget.name);
280 	udc_enable(dev);
281 
282 	return 0;
283 }
284 
285 /*
286  * Unregister entry point for the peripheral controller driver.
287  */
288 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
289 {
290 	struct dwc2_udc *dev = the_controller;
291 	unsigned long flags = 0;
292 
293 	if (!dev)
294 		return -ENODEV;
295 	if (!driver || driver != dev->driver)
296 		return -EINVAL;
297 
298 	spin_lock_irqsave(&dev->lock, flags);
299 	dev->driver = 0;
300 	stop_activity(dev, driver);
301 	spin_unlock_irqrestore(&dev->lock, flags);
302 
303 	driver->unbind(&dev->gadget);
304 
305 	disable_irq(IRQ_OTG);
306 
307 	udc_disable(dev);
308 	return 0;
309 }
310 #else /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
311 
312 static int dwc2_gadget_start(struct usb_gadget *g,
313 			     struct usb_gadget_driver *driver)
314 {
315 	struct dwc2_udc *dev = the_controller;
316 
317 	debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
318 
319 	if (!driver ||
320 	    (driver->speed != USB_SPEED_FULL &&
321 	     driver->speed != USB_SPEED_HIGH) ||
322 	    !driver->bind || !driver->disconnect || !driver->setup)
323 		return -EINVAL;
324 
325 	if (!dev)
326 		return -ENODEV;
327 
328 	if (dev->driver)
329 		return -EBUSY;
330 
331 	/* first hook up the driver ... */
332 	dev->driver = driver;
333 
334 	debug_cond(DEBUG_SETUP != 0,
335 		   "Registered gadget driver %s\n", dev->gadget.name);
336 	return udc_enable(dev);
337 }
338 
339 static int dwc2_gadget_stop(struct usb_gadget *g)
340 {
341 	struct dwc2_udc *dev = the_controller;
342 
343 	if (!dev)
344 		return -ENODEV;
345 
346 	if (!dev->driver)
347 		return -EINVAL;
348 
349 	dev->driver = 0;
350 	stop_activity(dev, dev->driver);
351 
352 	udc_disable(dev);
353 
354 	return 0;
355 }
356 
357 #endif /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
358 
359 /*
360  *	done - retire a request; caller blocked irqs
361  */
362 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status)
363 {
364 	unsigned int stopped = ep->stopped;
365 
366 	debug("%s: %s %p, req = %p, stopped = %d\n",
367 	      __func__, ep->ep.name, ep, &req->req, stopped);
368 
369 	list_del_init(&req->queue);
370 
371 	if (likely(req->req.status == -EINPROGRESS))
372 		req->req.status = status;
373 	else
374 		status = req->req.status;
375 
376 	if (status && status != -ESHUTDOWN) {
377 		debug("complete %s req %p stat %d len %u/%u\n",
378 		      ep->ep.name, &req->req, status,
379 		      req->req.actual, req->req.length);
380 	}
381 
382 	/* don't modify queue heads during completion callback */
383 	ep->stopped = 1;
384 
385 #ifdef DEBUG
386 	printf("calling complete callback\n");
387 	{
388 		int i, len = req->req.length;
389 
390 		printf("pkt[%d] = ", req->req.length);
391 		if (len > 64)
392 			len = 64;
393 		for (i = 0; i < len; i++) {
394 			printf("%02x", ((u8 *)req->req.buf)[i]);
395 			if ((i & 7) == 7)
396 				printf(" ");
397 		}
398 		printf("\n");
399 	}
400 #endif
401 	spin_unlock(&ep->dev->lock);
402 	req->req.complete(&ep->ep, &req->req);
403 	spin_lock(&ep->dev->lock);
404 
405 	debug("callback completed\n");
406 
407 	ep->stopped = stopped;
408 }
409 
410 /*
411  *	nuke - dequeue ALL requests
412  */
413 static void nuke(struct dwc2_ep *ep, int status)
414 {
415 	struct dwc2_request *req;
416 
417 	debug("%s: %s %p\n", __func__, ep->ep.name, ep);
418 
419 	/* called with irqs blocked */
420 	while (!list_empty(&ep->queue)) {
421 		req = list_entry(ep->queue.next, struct dwc2_request, queue);
422 		done(ep, req, status);
423 	}
424 }
425 
426 static void stop_activity(struct dwc2_udc *dev,
427 			  struct usb_gadget_driver *driver)
428 {
429 	int i;
430 
431 	/* don't disconnect drivers more than once */
432 	if (dev->gadget.speed == USB_SPEED_UNKNOWN)
433 		driver = 0;
434 	dev->gadget.speed = USB_SPEED_UNKNOWN;
435 
436 	/* prevent new request submissions, kill any outstanding requests  */
437 	for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
438 		struct dwc2_ep *ep = &dev->ep[i];
439 		ep->stopped = 1;
440 		nuke(ep, -ESHUTDOWN);
441 	}
442 
443 	/* report disconnect; the driver is already quiesced */
444 	if (driver) {
445 		spin_unlock(&dev->lock);
446 		driver->disconnect(&dev->gadget);
447 		spin_lock(&dev->lock);
448 	}
449 
450 	/* re-init driver-visible data structures */
451 	udc_reinit(dev);
452 }
453 
454 static void reconfig_usbd(struct dwc2_udc *dev)
455 {
456 	/* 2. Soft-reset OTG Core and then unreset again. */
457 	int i;
458 	unsigned int uTemp = writel(CORE_SOFT_RESET, &reg->grstctl);
459 	uint32_t dflt_gusbcfg;
460 	uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
461 	u32 max_hw_ep;
462 	int pdata_hw_ep;
463 
464 	debug("Reseting OTG controller\n");
465 
466 	dflt_gusbcfg =
467 		0<<15		/* PHY Low Power Clock sel*/
468 		|1<<14		/* Non-Periodic TxFIFO Rewind Enable*/
469 		|0x5<<10	/* Turnaround time*/
470 		|0<<9 | 0<<8	/* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
471 				/* 1:SRP enable] H1= 1,1*/
472 		|0<<7		/* Ulpi DDR sel*/
473 		|0<<6		/* 0: high speed utmi+, 1: full speed serial*/
474 		|0<<4		/* 0: utmi+, 1:ulpi*/
475 #ifdef CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
476 		|0<<3		/* phy i/f  0:8bit, 1:16bit*/
477 #else
478 		|1<<3		/* phy i/f  0:8bit, 1:16bit*/
479 #endif
480 		|0x7<<0;	/* HS/FS Timeout**/
481 
482 	if (dev->pdata->usb_gusbcfg)
483 		dflt_gusbcfg = dev->pdata->usb_gusbcfg;
484 
485 	writel(dflt_gusbcfg, &reg->gusbcfg);
486 
487 	/* 3. Put the OTG device core in the disconnected state.*/
488 	uTemp = readl(&reg->dctl);
489 	uTemp |= SOFT_DISCONNECT;
490 	writel(uTemp, &reg->dctl);
491 
492 	udelay(20);
493 
494 	/* 4. Make the OTG device core exit from the disconnected state.*/
495 	uTemp = readl(&reg->dctl);
496 	uTemp = uTemp & ~SOFT_DISCONNECT;
497 	writel(uTemp, &reg->dctl);
498 
499 	/* 5. Configure OTG Core to initial settings of device mode.*/
500 	/* [][1: full speed(30Mhz) 0:high speed]*/
501 	writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, &reg->dcfg);
502 
503 	mdelay(1);
504 
505 	/* 6. Unmask the core interrupts*/
506 	writel(GINTMSK_INIT, &reg->gintmsk);
507 
508 	/* 7. Set NAK bit of EP0, EP1, EP2*/
509 	writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->out_endp[EP0_CON].doepctl);
510 	writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->in_endp[EP0_CON].diepctl);
511 
512 	for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) {
513 		writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->out_endp[i].doepctl);
514 		writel(DEPCTL_EPDIS|DEPCTL_SNAK, &reg->in_endp[i].diepctl);
515 	}
516 
517 	/* 8. Unmask EPO interrupts*/
518 	writel(((1 << EP0_CON) << DAINT_OUT_BIT)
519 	       | (1 << EP0_CON), &reg->daintmsk);
520 
521 	/* 9. Unmask device OUT EP common interrupts*/
522 	writel(DOEPMSK_INIT, &reg->doepmsk);
523 
524 	/* 10. Unmask device IN EP common interrupts*/
525 	writel(DIEPMSK_INIT, &reg->diepmsk);
526 
527 	rx_fifo_sz = RX_FIFO_SIZE;
528 	np_tx_fifo_sz = NPTX_FIFO_SIZE;
529 	tx_fifo_sz = PTX_FIFO_SIZE;
530 
531 	if (dev->pdata->rx_fifo_sz)
532 		rx_fifo_sz = dev->pdata->rx_fifo_sz;
533 	if (dev->pdata->np_tx_fifo_sz)
534 		np_tx_fifo_sz = dev->pdata->np_tx_fifo_sz;
535 	if (dev->pdata->tx_fifo_sz)
536 		tx_fifo_sz = dev->pdata->tx_fifo_sz;
537 
538 	/* 11. Set Rx FIFO Size (in 32-bit words) */
539 	writel(rx_fifo_sz, &reg->grxfsiz);
540 
541 	/* 12. Set Non Periodic Tx FIFO Size */
542 	writel((np_tx_fifo_sz << 16) | rx_fifo_sz,
543 	       &reg->gnptxfsiz);
544 
545 	/* retrieve the number of IN Endpoints (excluding ep0) */
546 	max_hw_ep = (readl(&reg->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
547 		    GHWCFG4_NUM_IN_EPS_SHIFT;
548 	pdata_hw_ep = dev->pdata->tx_fifo_sz_nb;
549 
550 	/* tx_fifo_sz_nb should equal to number of IN Endpoint */
551 	if (pdata_hw_ep && max_hw_ep != pdata_hw_ep)
552 		pr_warn("Got %d hw endpoint but %d tx-fifo-size in array !!\n",
553 			max_hw_ep, pdata_hw_ep);
554 
555 	for (i = 0; i < max_hw_ep; i++) {
556 		if (pdata_hw_ep)
557 			tx_fifo_sz = dev->pdata->tx_fifo_sz_array[i];
558 
559 		writel((rx_fifo_sz + np_tx_fifo_sz + (tx_fifo_sz * i)) |
560 			tx_fifo_sz << 16, &reg->dieptxf[i]);
561 	}
562 	/* Flush the RX FIFO */
563 	writel(RX_FIFO_FLUSH, &reg->grstctl);
564 	while (readl(&reg->grstctl) & RX_FIFO_FLUSH)
565 		debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
566 
567 	/* Flush all the Tx FIFO's */
568 	writel(TX_FIFO_FLUSH_ALL, &reg->grstctl);
569 	writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, &reg->grstctl);
570 	while (readl(&reg->grstctl) & TX_FIFO_FLUSH)
571 		debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
572 
573 	/* 13. Clear NAK bit of EP0, EP1, EP2*/
574 	/* For Slave mode*/
575 	/* EP0: Control OUT */
576 	writel(DEPCTL_EPDIS | DEPCTL_CNAK,
577 	       &reg->out_endp[EP0_CON].doepctl);
578 
579 	/* 14. Initialize OTG Link Core.*/
580 	writel(GAHBCFG_INIT, &reg->gahbcfg);
581 }
582 
583 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed)
584 {
585 	unsigned int ep_ctrl;
586 	int i;
587 
588 	if (speed == USB_SPEED_HIGH) {
589 		ep0_fifo_size = 64;
590 		ep_fifo_size = 512;
591 		ep_fifo_size2 = 1024;
592 		dev->gadget.speed = USB_SPEED_HIGH;
593 	} else {
594 		ep0_fifo_size = 64;
595 		ep_fifo_size = 64;
596 		ep_fifo_size2 = 64;
597 		dev->gadget.speed = USB_SPEED_FULL;
598 	}
599 
600 	dev->ep[0].ep.maxpacket = ep0_fifo_size;
601 	for (i = 1; i < DWC2_MAX_ENDPOINTS; i++)
602 		dev->ep[i].ep.maxpacket = ep_fifo_size;
603 
604 	/* EP0 - Control IN (64 bytes)*/
605 	ep_ctrl = readl(&reg->in_endp[EP0_CON].diepctl);
606 	writel(ep_ctrl|(0<<0), &reg->in_endp[EP0_CON].diepctl);
607 
608 	/* EP0 - Control OUT (64 bytes)*/
609 	ep_ctrl = readl(&reg->out_endp[EP0_CON].doepctl);
610 	writel(ep_ctrl|(0<<0), &reg->out_endp[EP0_CON].doepctl);
611 }
612 
613 static int dwc2_ep_enable(struct usb_ep *_ep,
614 			 const struct usb_endpoint_descriptor *desc)
615 {
616 	struct dwc2_ep *ep;
617 	struct dwc2_udc *dev;
618 	unsigned long flags = 0;
619 
620 	debug("%s: %p\n", __func__, _ep);
621 
622 	ep = container_of(_ep, struct dwc2_ep, ep);
623 	if (!_ep || !desc || ep->desc || _ep->name == ep0name
624 	    || desc->bDescriptorType != USB_DT_ENDPOINT
625 	    || ep->bEndpointAddress != desc->bEndpointAddress
626 	    || ep_maxpacket(ep) <
627 	    le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) {
628 
629 		debug("%s: bad ep or descriptor\n", __func__);
630 		return -EINVAL;
631 	}
632 
633 	/* xfer types must match, except that interrupt ~= bulk */
634 	if (ep->bmAttributes != desc->bmAttributes
635 	    && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
636 	    && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
637 
638 		debug("%s: %s type mismatch\n", __func__, _ep->name);
639 		return -EINVAL;
640 	}
641 
642 	/* hardware _could_ do smaller, but driver doesn't */
643 	if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK &&
644 	     le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) >
645 	     ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) {
646 
647 		debug("%s: bad %s maxpacket\n", __func__, _ep->name);
648 		return -ERANGE;
649 	}
650 
651 	dev = ep->dev;
652 	if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
653 
654 		debug("%s: bogus device state\n", __func__);
655 		return -ESHUTDOWN;
656 	}
657 
658 	ep->stopped = 0;
659 	ep->desc = desc;
660 	ep->pio_irqs = 0;
661 	ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize));
662 
663 	/* Reset halt state */
664 	dwc2_udc_set_nak(ep);
665 	dwc2_udc_set_halt(_ep, 0);
666 
667 	spin_lock_irqsave(&ep->dev->lock, flags);
668 	dwc2_udc_ep_activate(ep);
669 	spin_unlock_irqrestore(&ep->dev->lock, flags);
670 
671 	debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
672 	      __func__, _ep->name, ep->stopped, ep->ep.maxpacket);
673 	return 0;
674 }
675 
676 /*
677  * Disable EP
678  */
679 static int dwc2_ep_disable(struct usb_ep *_ep)
680 {
681 	struct dwc2_ep *ep;
682 	unsigned long flags = 0;
683 
684 	debug("%s: %p\n", __func__, _ep);
685 
686 	ep = container_of(_ep, struct dwc2_ep, ep);
687 	if (!_ep || !ep->desc) {
688 		debug("%s: %s not enabled\n", __func__,
689 		      _ep ? ep->ep.name : NULL);
690 		return -EINVAL;
691 	}
692 
693 	spin_lock_irqsave(&ep->dev->lock, flags);
694 
695 	/* Nuke all pending requests */
696 	nuke(ep, -ESHUTDOWN);
697 
698 	ep->desc = 0;
699 	ep->stopped = 1;
700 
701 	spin_unlock_irqrestore(&ep->dev->lock, flags);
702 
703 	debug("%s: disabled %s\n", __func__, _ep->name);
704 	return 0;
705 }
706 
707 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
708 					     gfp_t gfp_flags)
709 {
710 	struct dwc2_request *req;
711 
712 	debug("%s: %s %p\n", __func__, ep->name, ep);
713 
714 	req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req));
715 	if (!req)
716 		return 0;
717 
718 	memset(req, 0, sizeof *req);
719 	INIT_LIST_HEAD(&req->queue);
720 
721 	return &req->req;
722 }
723 
724 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req)
725 {
726 	struct dwc2_request *req;
727 
728 	debug("%s: %p\n", __func__, ep);
729 
730 	req = container_of(_req, struct dwc2_request, req);
731 	WARN_ON(!list_empty(&req->queue));
732 	kfree(req);
733 }
734 
735 /* dequeue JUST ONE request */
736 static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req)
737 {
738 	struct dwc2_ep *ep;
739 	struct dwc2_request *req;
740 	unsigned long flags = 0;
741 
742 	debug("%s: %p\n", __func__, _ep);
743 
744 	ep = container_of(_ep, struct dwc2_ep, ep);
745 	if (!_ep || ep->ep.name == ep0name)
746 		return -EINVAL;
747 
748 	spin_lock_irqsave(&ep->dev->lock, flags);
749 
750 	/* make sure it's actually queued on this endpoint */
751 	list_for_each_entry(req, &ep->queue, queue) {
752 		if (&req->req == _req)
753 			break;
754 	}
755 	if (&req->req != _req) {
756 		spin_unlock_irqrestore(&ep->dev->lock, flags);
757 		return -EINVAL;
758 	}
759 
760 	done(ep, req, -ECONNRESET);
761 
762 	spin_unlock_irqrestore(&ep->dev->lock, flags);
763 	return 0;
764 }
765 
766 /*
767  * Return bytes in EP FIFO
768  */
769 static int dwc2_fifo_status(struct usb_ep *_ep)
770 {
771 	int count = 0;
772 	struct dwc2_ep *ep;
773 
774 	ep = container_of(_ep, struct dwc2_ep, ep);
775 	if (!_ep) {
776 		debug("%s: bad ep\n", __func__);
777 		return -ENODEV;
778 	}
779 
780 	debug("%s: %d\n", __func__, ep_index(ep));
781 
782 	/* LPD can't report unclaimed bytes from IN fifos */
783 	if (ep_is_in(ep))
784 		return -EOPNOTSUPP;
785 
786 	return count;
787 }
788 
789 /*
790  * Flush EP FIFO
791  */
792 static void dwc2_fifo_flush(struct usb_ep *_ep)
793 {
794 	struct dwc2_ep *ep;
795 
796 	ep = container_of(_ep, struct dwc2_ep, ep);
797 	if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
798 		debug("%s: bad ep\n", __func__);
799 		return;
800 	}
801 
802 	debug("%s: %d\n", __func__, ep_index(ep));
803 }
804 
805 static const struct usb_gadget_ops dwc2_udc_ops = {
806 	/* current versions must always be self-powered */
807 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
808 	.udc_start		= dwc2_gadget_start,
809 	.udc_stop		= dwc2_gadget_stop,
810 #endif
811 };
812 
813 static struct dwc2_udc memory = {
814 	.usb_address = 0,
815 	.gadget = {
816 		.ops = &dwc2_udc_ops,
817 		.ep0 = &memory.ep[0].ep,
818 		.name = driver_name,
819 	},
820 
821 	/* control endpoint */
822 	.ep[0] = {
823 		.ep = {
824 			.name = ep0name,
825 			.ops = &dwc2_ep_ops,
826 			.maxpacket = EP0_FIFO_SIZE,
827 		},
828 		.dev = &memory,
829 
830 		.bEndpointAddress = 0,
831 		.bmAttributes = 0,
832 
833 		.ep_type = ep_control,
834 	},
835 
836 	/* first group of endpoints */
837 	.ep[1] = {
838 		.ep = {
839 			.name = "ep1in-bulk",
840 			.ops = &dwc2_ep_ops,
841 			.maxpacket = EP_FIFO_SIZE,
842 		},
843 		.dev = &memory,
844 
845 		.bEndpointAddress = USB_DIR_IN | 1,
846 		.bmAttributes = USB_ENDPOINT_XFER_BULK,
847 
848 		.ep_type = ep_bulk_out,
849 		.fifo_num = 1,
850 	},
851 
852 	.ep[2] = {
853 		.ep = {
854 			.name = "ep2out-bulk",
855 			.ops = &dwc2_ep_ops,
856 			.maxpacket = EP_FIFO_SIZE,
857 		},
858 		.dev = &memory,
859 
860 		.bEndpointAddress = USB_DIR_OUT | 2,
861 		.bmAttributes = USB_ENDPOINT_XFER_BULK,
862 
863 		.ep_type = ep_bulk_in,
864 		.fifo_num = 2,
865 	},
866 
867 	.ep[3] = {
868 		.ep = {
869 			.name = "ep3in-int",
870 			.ops = &dwc2_ep_ops,
871 			.maxpacket = EP_FIFO_SIZE,
872 		},
873 		.dev = &memory,
874 
875 		.bEndpointAddress = USB_DIR_IN | 3,
876 		.bmAttributes = USB_ENDPOINT_XFER_INT,
877 
878 		.ep_type = ep_interrupt,
879 		.fifo_num = 3,
880 	},
881 };
882 
883 /*
884  *	probe - binds to the platform device
885  */
886 
887 int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)
888 {
889 	struct dwc2_udc *dev = &memory;
890 	int retval = 0;
891 
892 	debug("%s: %p\n", __func__, pdata);
893 
894 	dev->pdata = pdata;
895 
896 	reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
897 
898 	dev->gadget.is_dualspeed = 1;	/* Hack only*/
899 	dev->gadget.is_otg = 0;
900 	dev->gadget.is_a_peripheral = 0;
901 	dev->gadget.b_hnp_enable = 0;
902 	dev->gadget.a_hnp_support = 0;
903 	dev->gadget.a_alt_hnp_support = 0;
904 
905 	the_controller = dev;
906 
907 	usb_ctrl = memalign(CONFIG_SYS_CACHELINE_SIZE,
908 			    ROUND(sizeof(struct usb_ctrlrequest),
909 				  CONFIG_SYS_CACHELINE_SIZE));
910 	if (!usb_ctrl) {
911 		pr_err("No memory available for UDC!\n");
912 		return -ENOMEM;
913 	}
914 
915 	usb_ctrl_dma_addr = (dma_addr_t) usb_ctrl;
916 
917 	udc_reinit(dev);
918 
919 	return retval;
920 }
921 
922 int dwc2_udc_handle_interrupt(void)
923 {
924 	u32 intr_status = readl(&reg->gintsts);
925 	u32 gintmsk = readl(&reg->gintmsk);
926 
927 	if (intr_status & gintmsk)
928 		return dwc2_udc_irq(1, (void *)the_controller);
929 
930 	return 0;
931 }
932 
933 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
934 
935 int usb_gadget_handle_interrupts(int index)
936 {
937 	return dwc2_udc_handle_interrupt();
938 }
939 
940 #else /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
941 
942 struct dwc2_priv_data {
943 	struct clk_bulk		clks;
944 	struct reset_ctl_bulk	resets;
945 	struct phy *phys;
946 	int num_phys;
947 };
948 
949 int dm_usb_gadget_handle_interrupts(struct udevice *dev)
950 {
951 	return dwc2_udc_handle_interrupt();
952 }
953 
954 int dwc2_phy_setup(struct udevice *dev, struct phy **array, int *num_phys)
955 {
956 	int i, ret, count;
957 	struct phy *usb_phys;
958 
959 	/* Return if no phy declared */
960 	if (!dev_read_prop(dev, "phys", NULL))
961 		return 0;
962 
963 	count = dev_count_phandle_with_args(dev, "phys", "#phy-cells");
964 	if (count <= 0)
965 		return count;
966 
967 	usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
968 				GFP_KERNEL);
969 	if (!usb_phys)
970 		return -ENOMEM;
971 
972 	for (i = 0; i < count; i++) {
973 		ret = generic_phy_get_by_index(dev, i, &usb_phys[i]);
974 		if (ret && ret != -ENOENT) {
975 			dev_err(dev, "Failed to get USB PHY%d for %s\n",
976 				i, dev->name);
977 			return ret;
978 		}
979 	}
980 
981 	for (i = 0; i < count; i++) {
982 		ret = generic_phy_init(&usb_phys[i]);
983 		if (ret) {
984 			dev_err(dev, "Can't init USB PHY%d for %s\n",
985 				i, dev->name);
986 			goto phys_init_err;
987 		}
988 	}
989 
990 	for (i = 0; i < count; i++) {
991 		ret = generic_phy_power_on(&usb_phys[i]);
992 		if (ret) {
993 			dev_err(dev, "Can't power USB PHY%d for %s\n",
994 				i, dev->name);
995 			goto phys_poweron_err;
996 		}
997 	}
998 
999 	*array = usb_phys;
1000 	*num_phys =  count;
1001 
1002 	return 0;
1003 
1004 phys_poweron_err:
1005 	for (i = count - 1; i >= 0; i--)
1006 		generic_phy_power_off(&usb_phys[i]);
1007 
1008 	for (i = 0; i < count; i++)
1009 		generic_phy_exit(&usb_phys[i]);
1010 
1011 	return ret;
1012 
1013 phys_init_err:
1014 	for (; i >= 0; i--)
1015 		generic_phy_exit(&usb_phys[i]);
1016 
1017 	return ret;
1018 }
1019 
1020 void dwc2_phy_shutdown(struct udevice *dev, struct phy *usb_phys, int num_phys)
1021 {
1022 	int i, ret;
1023 
1024 	for (i = 0; i < num_phys; i++) {
1025 		if (!generic_phy_valid(&usb_phys[i]))
1026 			continue;
1027 
1028 		ret = generic_phy_power_off(&usb_phys[i]);
1029 		ret |= generic_phy_exit(&usb_phys[i]);
1030 		if (ret) {
1031 			dev_err(dev, "Can't shutdown USB PHY%d for %s\n",
1032 				i, dev->name);
1033 		}
1034 	}
1035 }
1036 
1037 static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
1038 {
1039 	struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
1040 	int node = dev_of_offset(dev);
1041 
1042 	if (usb_get_dr_mode(node) != USB_DR_MODE_PERIPHERAL) {
1043 		dev_dbg(dev, "Invalid mode\n");
1044 		return -ENODEV;
1045 	}
1046 
1047 	platdata->regs_otg = dev_read_addr(dev);
1048 
1049 	platdata->rx_fifo_sz = dev_read_u32_default(dev, "g-rx-fifo-size", 0);
1050 	platdata->np_tx_fifo_sz = dev_read_u32_default(dev,
1051 						       "g-np-tx-fifo-size", 0);
1052 	platdata->tx_fifo_sz = dev_read_u32_default(dev, "g-tx-fifo-size", 0);
1053 
1054 	platdata->force_b_session_valid =
1055 		dev_read_bool(dev, "force-b-session-valid");
1056 
1057 	return 0;
1058 }
1059 
1060 static int dwc2_udc_otg_reset_init(struct udevice *dev,
1061 				   struct reset_ctl_bulk *resets)
1062 {
1063 	int ret;
1064 
1065 	ret = reset_get_bulk(dev, resets);
1066 	if (ret == -ENOTSUPP)
1067 		return 0;
1068 
1069 	if (ret)
1070 		return ret;
1071 
1072 	ret = reset_assert_bulk(resets);
1073 
1074 	if (!ret) {
1075 		udelay(2);
1076 		ret = reset_deassert_bulk(resets);
1077 	}
1078 	if (ret) {
1079 		reset_release_bulk(resets);
1080 		return ret;
1081 	}
1082 
1083 	return 0;
1084 }
1085 
1086 static int dwc2_udc_otg_clk_init(struct udevice *dev,
1087 				 struct clk_bulk *clks)
1088 {
1089 	int ret;
1090 
1091 	ret = clk_get_bulk(dev, clks);
1092 	if (ret == -ENOSYS)
1093 		return 0;
1094 
1095 	if (ret)
1096 		return ret;
1097 
1098 	ret = clk_enable_bulk(clks);
1099 	if (ret) {
1100 		clk_release_bulk(clks);
1101 		return ret;
1102 	}
1103 
1104 	return 0;
1105 }
1106 
1107 static int dwc2_udc_otg_probe(struct udevice *dev)
1108 {
1109 	struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
1110 	struct dwc2_priv_data *priv = dev_get_priv(dev);
1111 	struct dwc2_usbotg_reg *usbotg_reg =
1112 		(struct dwc2_usbotg_reg *)platdata->regs_otg;
1113 	int ret;
1114 
1115 	ret = dwc2_udc_otg_clk_init(dev, &priv->clks);
1116 	if (ret)
1117 		return ret;
1118 
1119 	ret = dwc2_udc_otg_reset_init(dev, &priv->resets);
1120 	if (ret)
1121 		return ret;
1122 
1123 	ret = dwc2_phy_setup(dev, &priv->phys, &priv->num_phys);
1124 	if (ret)
1125 		return ret;
1126 
1127 	if (platdata->force_b_session_valid)
1128 		/* Override B session bits : value and enable */
1129 		setbits_le32(&usbotg_reg->gotgctl,  B_VALOEN | B_VALOVAL);
1130 
1131 	ret = dwc2_udc_probe(platdata);
1132 	if (ret)
1133 		return ret;
1134 
1135 	the_controller->driver = 0;
1136 
1137 	ret = usb_add_gadget_udc((struct device *)dev, &the_controller->gadget);
1138 
1139 	return ret;
1140 }
1141 
1142 static int dwc2_udc_otg_remove(struct udevice *dev)
1143 {
1144 	struct dwc2_priv_data *priv = dev_get_priv(dev);
1145 
1146 	usb_del_gadget_udc(&the_controller->gadget);
1147 
1148 	reset_release_bulk(&priv->resets);
1149 
1150 	clk_release_bulk(&priv->clks);
1151 
1152 	dwc2_phy_shutdown(dev, priv->phys, priv->num_phys);
1153 
1154 	return dm_scan_fdt_dev(dev);
1155 }
1156 
1157 static const struct udevice_id dwc2_udc_otg_ids[] = {
1158 	{ .compatible = "snps,dwc2" },
1159 };
1160 
1161 U_BOOT_DRIVER(dwc2_udc_otg) = {
1162 	.name	= "dwc2-udc-otg",
1163 	.id	= UCLASS_USB_GADGET_GENERIC,
1164 	.of_match = dwc2_udc_otg_ids,
1165 	.ofdata_to_platdata = dwc2_udc_otg_ofdata_to_platdata,
1166 	.probe = dwc2_udc_otg_probe,
1167 	.remove = dwc2_udc_otg_remove,
1168 	.platdata_auto_alloc_size = sizeof(struct dwc2_plat_otg_data),
1169 	.priv_auto_alloc_size = sizeof(struct dwc2_priv_data),
1170 };
1171 
1172 int dwc2_udc_B_session_valid(struct udevice *dev)
1173 {
1174 	struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
1175 	struct dwc2_usbotg_reg *usbotg_reg =
1176 		(struct dwc2_usbotg_reg *)platdata->regs_otg;
1177 
1178 	return readl(&usbotg_reg->gotgctl) & B_SESSION_VALID;
1179 }
1180 #endif /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
1181