1 /* 2 * Copyright 2011, Marvell Semiconductor Inc. 3 * Lei Wen <leiwen@marvell.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 * 7 * Back ported to the 8xx platform (from the 8260 platform) by 8 * Murray.Jensen@cmst.csiro.au, 27-Jan-01. 9 */ 10 11 #include <common.h> 12 #include <command.h> 13 #include <config.h> 14 #include <net.h> 15 #include <malloc.h> 16 #include <asm/byteorder.h> 17 #include <asm/errno.h> 18 #include <asm/io.h> 19 #include <asm/unaligned.h> 20 #include <linux/types.h> 21 #include <linux/usb/ch9.h> 22 #include <linux/usb/gadget.h> 23 #include <usb/ci_udc.h> 24 #include "../host/ehci.h" 25 #include "ci_udc.h" 26 27 /* 28 * Check if the system has too long cachelines. If the cachelines are 29 * longer then 128b, the driver will not be able flush/invalidate data 30 * cache over separate QH entries. We use 128b because one QH entry is 31 * 64b long and there are always two QH list entries for each endpoint. 32 */ 33 #if ARCH_DMA_MINALIGN > 128 34 #error This driver can not work on systems with caches longer than 128b 35 #endif 36 37 #ifndef DEBUG 38 #define DBG(x...) do {} while (0) 39 #else 40 #define DBG(x...) printf(x) 41 static const char *reqname(unsigned r) 42 { 43 switch (r) { 44 case USB_REQ_GET_STATUS: return "GET_STATUS"; 45 case USB_REQ_CLEAR_FEATURE: return "CLEAR_FEATURE"; 46 case USB_REQ_SET_FEATURE: return "SET_FEATURE"; 47 case USB_REQ_SET_ADDRESS: return "SET_ADDRESS"; 48 case USB_REQ_GET_DESCRIPTOR: return "GET_DESCRIPTOR"; 49 case USB_REQ_SET_DESCRIPTOR: return "SET_DESCRIPTOR"; 50 case USB_REQ_GET_CONFIGURATION: return "GET_CONFIGURATION"; 51 case USB_REQ_SET_CONFIGURATION: return "SET_CONFIGURATION"; 52 case USB_REQ_GET_INTERFACE: return "GET_INTERFACE"; 53 case USB_REQ_SET_INTERFACE: return "SET_INTERFACE"; 54 default: return "*UNKNOWN*"; 55 } 56 } 57 #endif 58 59 static struct usb_endpoint_descriptor ep0_desc = { 60 .bLength = sizeof(struct usb_endpoint_descriptor), 61 .bDescriptorType = USB_DT_ENDPOINT, 62 .bEndpointAddress = USB_DIR_IN, 63 .bmAttributes = USB_ENDPOINT_XFER_CONTROL, 64 }; 65 66 static int ci_pullup(struct usb_gadget *gadget, int is_on); 67 static int ci_ep_enable(struct usb_ep *ep, 68 const struct usb_endpoint_descriptor *desc); 69 static int ci_ep_disable(struct usb_ep *ep); 70 static int ci_ep_queue(struct usb_ep *ep, 71 struct usb_request *req, gfp_t gfp_flags); 72 static struct usb_request * 73 ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags); 74 static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *_req); 75 76 static struct usb_gadget_ops ci_udc_ops = { 77 .pullup = ci_pullup, 78 }; 79 80 static struct usb_ep_ops ci_ep_ops = { 81 .enable = ci_ep_enable, 82 .disable = ci_ep_disable, 83 .queue = ci_ep_queue, 84 .alloc_request = ci_ep_alloc_request, 85 .free_request = ci_ep_free_request, 86 }; 87 88 /* Init values for USB endpoints. */ 89 static const struct usb_ep ci_ep_init[2] = { 90 [0] = { /* EP 0 */ 91 .maxpacket = 64, 92 .name = "ep0", 93 .ops = &ci_ep_ops, 94 }, 95 [1] = { /* EP 1..n */ 96 .maxpacket = 512, 97 .name = "ep-", 98 .ops = &ci_ep_ops, 99 }, 100 }; 101 102 static struct ci_drv controller = { 103 .gadget = { 104 .name = "ci_udc", 105 .ops = &ci_udc_ops, 106 .is_dualspeed = 1, 107 }, 108 }; 109 110 /** 111 * ci_get_qh() - return queue head for endpoint 112 * @ep_num: Endpoint number 113 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0) 114 * 115 * This function returns the QH associated with particular endpoint 116 * and it's direction. 117 */ 118 static struct ept_queue_head *ci_get_qh(int ep_num, int dir_in) 119 { 120 return &controller.epts[(ep_num * 2) + dir_in]; 121 } 122 123 /** 124 * ci_get_qtd() - return queue item for endpoint 125 * @ep_num: Endpoint number 126 * @dir_in: Direction of the endpoint (IN = 1, OUT = 0) 127 * 128 * This function returns the QH associated with particular endpoint 129 * and it's direction. 130 */ 131 static struct ept_queue_item *ci_get_qtd(int ep_num, int dir_in) 132 { 133 return controller.items[(ep_num * 2) + dir_in]; 134 } 135 136 /** 137 * ci_flush_qh - flush cache over queue head 138 * @ep_num: Endpoint number 139 * 140 * This function flushes cache over QH for particular endpoint. 141 */ 142 static void ci_flush_qh(int ep_num) 143 { 144 struct ept_queue_head *head = ci_get_qh(ep_num, 0); 145 const uint32_t start = (uint32_t)head; 146 const uint32_t end = start + 2 * sizeof(*head); 147 148 flush_dcache_range(start, end); 149 } 150 151 /** 152 * ci_invalidate_qh - invalidate cache over queue head 153 * @ep_num: Endpoint number 154 * 155 * This function invalidates cache over QH for particular endpoint. 156 */ 157 static void ci_invalidate_qh(int ep_num) 158 { 159 struct ept_queue_head *head = ci_get_qh(ep_num, 0); 160 uint32_t start = (uint32_t)head; 161 uint32_t end = start + 2 * sizeof(*head); 162 163 invalidate_dcache_range(start, end); 164 } 165 166 /** 167 * ci_flush_qtd - flush cache over queue item 168 * @ep_num: Endpoint number 169 * 170 * This function flushes cache over qTD pair for particular endpoint. 171 */ 172 static void ci_flush_qtd(int ep_num) 173 { 174 struct ept_queue_item *item = ci_get_qtd(ep_num, 0); 175 const uint32_t start = (uint32_t)item; 176 const uint32_t end_raw = start + 2 * sizeof(*item); 177 const uint32_t end = roundup(end_raw, ARCH_DMA_MINALIGN); 178 179 flush_dcache_range(start, end); 180 } 181 182 /** 183 * ci_invalidate_qtd - invalidate cache over queue item 184 * @ep_num: Endpoint number 185 * 186 * This function invalidates cache over qTD pair for particular endpoint. 187 */ 188 static void ci_invalidate_qtd(int ep_num) 189 { 190 struct ept_queue_item *item = ci_get_qtd(ep_num, 0); 191 const uint32_t start = (uint32_t)item; 192 const uint32_t end_raw = start + 2 * sizeof(*item); 193 const uint32_t end = roundup(end_raw, ARCH_DMA_MINALIGN); 194 195 invalidate_dcache_range(start, end); 196 } 197 198 static struct usb_request * 199 ci_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags) 200 { 201 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 202 int num; 203 struct ci_req *ci_req; 204 205 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 206 if (num == 0 && controller.ep0_req) 207 return &controller.ep0_req->req; 208 209 ci_req = memalign(ARCH_DMA_MINALIGN, sizeof(*ci_req)); 210 if (!ci_req) 211 return NULL; 212 213 INIT_LIST_HEAD(&ci_req->queue); 214 ci_req->b_buf = 0; 215 216 if (num == 0) 217 controller.ep0_req = ci_req; 218 219 return &ci_req->req; 220 } 221 222 static void ci_ep_free_request(struct usb_ep *ep, struct usb_request *req) 223 { 224 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 225 struct ci_req *ci_req = container_of(req, struct ci_req, req); 226 int num; 227 228 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 229 if (num == 0) { 230 if (!controller.ep0_req) 231 return; 232 controller.ep0_req = 0; 233 } 234 235 if (ci_req->b_buf) 236 free(ci_req->b_buf); 237 free(ci_req); 238 } 239 240 static void ep_enable(int num, int in, int maxpacket) 241 { 242 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 243 unsigned n; 244 245 n = readl(&udc->epctrl[num]); 246 if (in) 247 n |= (CTRL_TXE | CTRL_TXR | CTRL_TXT_BULK); 248 else 249 n |= (CTRL_RXE | CTRL_RXR | CTRL_RXT_BULK); 250 251 if (num != 0) { 252 struct ept_queue_head *head = ci_get_qh(num, in); 253 254 head->config = CONFIG_MAX_PKT(maxpacket) | CONFIG_ZLT; 255 ci_flush_qh(num); 256 } 257 writel(n, &udc->epctrl[num]); 258 } 259 260 static int ci_ep_enable(struct usb_ep *ep, 261 const struct usb_endpoint_descriptor *desc) 262 { 263 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 264 int num, in; 265 num = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 266 in = (desc->bEndpointAddress & USB_DIR_IN) != 0; 267 ci_ep->desc = desc; 268 269 if (num) { 270 int max = get_unaligned_le16(&desc->wMaxPacketSize); 271 272 if ((max > 64) && (controller.gadget.speed == USB_SPEED_FULL)) 273 max = 64; 274 if (ep->maxpacket != max) { 275 DBG("%s: from %d to %d\n", __func__, 276 ep->maxpacket, max); 277 ep->maxpacket = max; 278 } 279 } 280 ep_enable(num, in, ep->maxpacket); 281 DBG("%s: num=%d maxpacket=%d\n", __func__, num, ep->maxpacket); 282 return 0; 283 } 284 285 static int ci_ep_disable(struct usb_ep *ep) 286 { 287 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 288 289 ci_ep->desc = NULL; 290 return 0; 291 } 292 293 static int ci_bounce(struct ci_req *ci_req, int in) 294 { 295 struct usb_request *req = &ci_req->req; 296 uint32_t addr = (uint32_t)req->buf; 297 uint32_t hwaddr; 298 uint32_t aligned_used_len; 299 300 /* Input buffer address is not aligned. */ 301 if (addr & (ARCH_DMA_MINALIGN - 1)) 302 goto align; 303 304 /* Input buffer length is not aligned. */ 305 if (req->length & (ARCH_DMA_MINALIGN - 1)) 306 goto align; 307 308 /* The buffer is well aligned, only flush cache. */ 309 ci_req->hw_len = req->length; 310 ci_req->hw_buf = req->buf; 311 goto flush; 312 313 align: 314 if (ci_req->b_buf && req->length > ci_req->b_len) { 315 free(ci_req->b_buf); 316 ci_req->b_buf = 0; 317 } 318 if (!ci_req->b_buf) { 319 ci_req->b_len = roundup(req->length, ARCH_DMA_MINALIGN); 320 ci_req->b_buf = memalign(ARCH_DMA_MINALIGN, ci_req->b_len); 321 if (!ci_req->b_buf) 322 return -ENOMEM; 323 } 324 ci_req->hw_len = ci_req->b_len; 325 ci_req->hw_buf = ci_req->b_buf; 326 327 if (in) 328 memcpy(ci_req->hw_buf, req->buf, req->length); 329 330 flush: 331 hwaddr = (uint32_t)ci_req->hw_buf; 332 aligned_used_len = roundup(req->length, ARCH_DMA_MINALIGN); 333 flush_dcache_range(hwaddr, hwaddr + aligned_used_len); 334 335 return 0; 336 } 337 338 static void ci_debounce(struct ci_req *ci_req, int in) 339 { 340 struct usb_request *req = &ci_req->req; 341 uint32_t addr = (uint32_t)req->buf; 342 uint32_t hwaddr = (uint32_t)ci_req->hw_buf; 343 uint32_t aligned_used_len; 344 345 if (in) 346 return; 347 348 aligned_used_len = roundup(req->actual, ARCH_DMA_MINALIGN); 349 invalidate_dcache_range(hwaddr, hwaddr + aligned_used_len); 350 351 if (addr == hwaddr) 352 return; /* not a bounce */ 353 354 memcpy(req->buf, ci_req->hw_buf, req->actual); 355 } 356 357 static void ci_ep_submit_next_request(struct ci_ep *ci_ep) 358 { 359 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 360 struct ept_queue_item *item; 361 struct ept_queue_head *head; 362 int bit, num, len, in; 363 struct ci_req *ci_req; 364 365 ci_ep->req_primed = true; 366 367 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 368 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0; 369 item = ci_get_qtd(num, in); 370 head = ci_get_qh(num, in); 371 372 ci_req = list_first_entry(&ci_ep->queue, struct ci_req, queue); 373 len = ci_req->req.length; 374 375 item->info = INFO_BYTES(len) | INFO_ACTIVE; 376 item->page0 = (uint32_t)ci_req->hw_buf; 377 item->page1 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x1000; 378 item->page2 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x2000; 379 item->page3 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x3000; 380 item->page4 = ((uint32_t)ci_req->hw_buf & 0xfffff000) + 0x4000; 381 382 head->next = (unsigned) item; 383 head->info = 0; 384 385 /* 386 * When sending the data for an IN transaction, the attached host 387 * knows that all data for the IN is sent when one of the following 388 * occurs: 389 * a) A zero-length packet is transmitted. 390 * b) A packet with length that isn't an exact multiple of the ep's 391 * maxpacket is transmitted. 392 * c) Enough data is sent to exactly fill the host's maximum expected 393 * IN transaction size. 394 * 395 * One of these conditions MUST apply at the end of an IN transaction, 396 * or the transaction will not be considered complete by the host. If 397 * none of (a)..(c) already applies, then we must force (a) to apply 398 * by explicitly sending an extra zero-length packet. 399 */ 400 /* IN !a !b !c */ 401 if (in && len && !(len % ci_ep->ep.maxpacket) && ci_req->req.zero) { 402 /* 403 * Each endpoint has 2 items allocated, even though typically 404 * only 1 is used at a time since either an IN or an OUT but 405 * not both is queued. For an IN transaction, item currently 406 * points at the second of these items, so we know that we 407 * can use the other to transmit the extra zero-length packet. 408 */ 409 struct ept_queue_item *other_item = ci_get_qtd(num, 0); 410 item->next = (unsigned)other_item; 411 item = other_item; 412 item->info = INFO_ACTIVE; 413 } 414 415 item->next = TERMINATE; 416 item->info |= INFO_IOC; 417 418 ci_flush_qtd(num); 419 420 DBG("ept%d %s queue len %x, req %p, buffer %p\n", 421 num, in ? "in" : "out", len, ci_req, ci_req->hw_buf); 422 ci_flush_qh(num); 423 424 if (in) 425 bit = EPT_TX(num); 426 else 427 bit = EPT_RX(num); 428 429 writel(bit, &udc->epprime); 430 } 431 432 static int ci_ep_queue(struct usb_ep *ep, 433 struct usb_request *req, gfp_t gfp_flags) 434 { 435 struct ci_ep *ci_ep = container_of(ep, struct ci_ep, ep); 436 struct ci_req *ci_req = container_of(req, struct ci_req, req); 437 int in, ret; 438 int __maybe_unused num; 439 440 num = ci_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 441 in = (ci_ep->desc->bEndpointAddress & USB_DIR_IN) != 0; 442 443 if (!num && ci_ep->req_primed) { 444 /* 445 * The flipping of ep0 between IN and OUT relies on 446 * ci_ep_queue consuming the current IN/OUT setting 447 * immediately. If this is deferred to a later point when the 448 * req is pulled out of ci_req->queue, then the IN/OUT setting 449 * may have been changed since the req was queued, and state 450 * will get out of sync. This condition doesn't occur today, 451 * but could if bugs were introduced later, and this error 452 * check will save a lot of debugging time. 453 */ 454 printf("%s: ep0 transaction already in progress\n", __func__); 455 return -EPROTO; 456 } 457 458 ret = ci_bounce(ci_req, in); 459 if (ret) 460 return ret; 461 462 DBG("ept%d %s pre-queue req %p, buffer %p\n", 463 num, in ? "in" : "out", ci_req, ci_req->hw_buf); 464 list_add_tail(&ci_req->queue, &ci_ep->queue); 465 466 if (!ci_ep->req_primed) 467 ci_ep_submit_next_request(ci_ep); 468 469 return 0; 470 } 471 472 static void flip_ep0_direction(void) 473 { 474 if (ep0_desc.bEndpointAddress == USB_DIR_IN) { 475 DBG("%s: Flipping ep0 to OUT\n", __func__); 476 ep0_desc.bEndpointAddress = 0; 477 } else { 478 DBG("%s: Flipping ep0 to IN\n", __func__); 479 ep0_desc.bEndpointAddress = USB_DIR_IN; 480 } 481 } 482 483 static void handle_ep_complete(struct ci_ep *ep) 484 { 485 struct ept_queue_item *item; 486 int num, in, len; 487 struct ci_req *ci_req; 488 489 num = ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; 490 in = (ep->desc->bEndpointAddress & USB_DIR_IN) != 0; 491 item = ci_get_qtd(num, in); 492 ci_invalidate_qtd(num); 493 494 len = (item->info >> 16) & 0x7fff; 495 if (item->info & 0xff) 496 printf("EP%d/%s FAIL info=%x pg0=%x\n", 497 num, in ? "in" : "out", item->info, item->page0); 498 499 ci_req = list_first_entry(&ep->queue, struct ci_req, queue); 500 list_del_init(&ci_req->queue); 501 ep->req_primed = false; 502 503 if (!list_empty(&ep->queue)) 504 ci_ep_submit_next_request(ep); 505 506 ci_req->req.actual = ci_req->req.length - len; 507 ci_debounce(ci_req, in); 508 509 DBG("ept%d %s req %p, complete %x\n", 510 num, in ? "in" : "out", ci_req, len); 511 if (num != 0 || controller.ep0_data_phase) 512 ci_req->req.complete(&ep->ep, &ci_req->req); 513 if (num == 0 && controller.ep0_data_phase) { 514 /* 515 * Data Stage is complete, so flip ep0 dir for Status Stage, 516 * which always transfers a packet in the opposite direction. 517 */ 518 DBG("%s: flip ep0 dir for Status Stage\n", __func__); 519 flip_ep0_direction(); 520 controller.ep0_data_phase = false; 521 ci_req->req.length = 0; 522 usb_ep_queue(&ep->ep, &ci_req->req, 0); 523 } 524 } 525 526 #define SETUP(type, request) (((type) << 8) | (request)) 527 528 static void handle_setup(void) 529 { 530 struct ci_ep *ci_ep = &controller.ep[0]; 531 struct ci_req *ci_req; 532 struct usb_request *req; 533 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 534 struct ept_queue_head *head; 535 struct usb_ctrlrequest r; 536 int status = 0; 537 int num, in, _num, _in, i; 538 char *buf; 539 540 ci_req = controller.ep0_req; 541 req = &ci_req->req; 542 head = ci_get_qh(0, 0); /* EP0 OUT */ 543 544 ci_invalidate_qh(0); 545 memcpy(&r, head->setup_data, sizeof(struct usb_ctrlrequest)); 546 #ifdef CONFIG_CI_UDC_HAS_HOSTPC 547 writel(EPT_RX(0), &udc->epsetupstat); 548 #else 549 writel(EPT_RX(0), &udc->epstat); 550 #endif 551 DBG("handle setup %s, %x, %x index %x value %x length %x\n", 552 reqname(r.bRequest), r.bRequestType, r.bRequest, r.wIndex, 553 r.wValue, r.wLength); 554 555 /* Set EP0 dir for Data Stage based on Setup Stage data */ 556 if (r.bRequestType & USB_DIR_IN) { 557 DBG("%s: Set ep0 to IN for Data Stage\n", __func__); 558 ep0_desc.bEndpointAddress = USB_DIR_IN; 559 } else { 560 DBG("%s: Set ep0 to OUT for Data Stage\n", __func__); 561 ep0_desc.bEndpointAddress = 0; 562 } 563 if (r.wLength) { 564 controller.ep0_data_phase = true; 565 } else { 566 /* 0 length -> no Data Stage. Flip dir for Status Stage */ 567 DBG("%s: 0 length: flip ep0 dir for Status Stage\n", __func__); 568 flip_ep0_direction(); 569 controller.ep0_data_phase = false; 570 } 571 572 list_del_init(&ci_req->queue); 573 ci_ep->req_primed = false; 574 575 switch (SETUP(r.bRequestType, r.bRequest)) { 576 case SETUP(USB_RECIP_ENDPOINT, USB_REQ_CLEAR_FEATURE): 577 _num = r.wIndex & 15; 578 _in = !!(r.wIndex & 0x80); 579 580 if ((r.wValue == 0) && (r.wLength == 0)) { 581 req->length = 0; 582 for (i = 0; i < NUM_ENDPOINTS; i++) { 583 struct ci_ep *ep = &controller.ep[i]; 584 585 if (!ep->desc) 586 continue; 587 num = ep->desc->bEndpointAddress 588 & USB_ENDPOINT_NUMBER_MASK; 589 in = (ep->desc->bEndpointAddress 590 & USB_DIR_IN) != 0; 591 if ((num == _num) && (in == _in)) { 592 ep_enable(num, in, ep->ep.maxpacket); 593 usb_ep_queue(controller.gadget.ep0, 594 req, 0); 595 break; 596 } 597 } 598 } 599 return; 600 601 case SETUP(USB_RECIP_DEVICE, USB_REQ_SET_ADDRESS): 602 /* 603 * write address delayed (will take effect 604 * after the next IN txn) 605 */ 606 writel((r.wValue << 25) | (1 << 24), &udc->devaddr); 607 req->length = 0; 608 usb_ep_queue(controller.gadget.ep0, req, 0); 609 return; 610 611 case SETUP(USB_DIR_IN | USB_RECIP_DEVICE, USB_REQ_GET_STATUS): 612 req->length = 2; 613 buf = (char *)req->buf; 614 buf[0] = 1 << USB_DEVICE_SELF_POWERED; 615 buf[1] = 0; 616 usb_ep_queue(controller.gadget.ep0, req, 0); 617 return; 618 } 619 /* pass request up to the gadget driver */ 620 if (controller.driver) 621 status = controller.driver->setup(&controller.gadget, &r); 622 else 623 status = -ENODEV; 624 625 if (!status) 626 return; 627 DBG("STALL reqname %s type %x value %x, index %x\n", 628 reqname(r.bRequest), r.bRequestType, r.wValue, r.wIndex); 629 writel((1<<16) | (1 << 0), &udc->epctrl[0]); 630 } 631 632 static void stop_activity(void) 633 { 634 int i, num, in; 635 struct ept_queue_head *head; 636 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 637 writel(readl(&udc->epcomp), &udc->epcomp); 638 #ifdef CONFIG_CI_UDC_HAS_HOSTPC 639 writel(readl(&udc->epsetupstat), &udc->epsetupstat); 640 #endif 641 writel(readl(&udc->epstat), &udc->epstat); 642 writel(0xffffffff, &udc->epflush); 643 644 /* error out any pending reqs */ 645 for (i = 0; i < NUM_ENDPOINTS; i++) { 646 if (i != 0) 647 writel(0, &udc->epctrl[i]); 648 if (controller.ep[i].desc) { 649 num = controller.ep[i].desc->bEndpointAddress 650 & USB_ENDPOINT_NUMBER_MASK; 651 in = (controller.ep[i].desc->bEndpointAddress 652 & USB_DIR_IN) != 0; 653 head = ci_get_qh(num, in); 654 head->info = INFO_ACTIVE; 655 ci_flush_qh(num); 656 } 657 } 658 } 659 660 void udc_irq(void) 661 { 662 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 663 unsigned n = readl(&udc->usbsts); 664 writel(n, &udc->usbsts); 665 int bit, i, num, in; 666 667 n &= (STS_SLI | STS_URI | STS_PCI | STS_UI | STS_UEI); 668 if (n == 0) 669 return; 670 671 if (n & STS_URI) { 672 DBG("-- reset --\n"); 673 stop_activity(); 674 } 675 if (n & STS_SLI) 676 DBG("-- suspend --\n"); 677 678 if (n & STS_PCI) { 679 int max = 64; 680 int speed = USB_SPEED_FULL; 681 682 #ifdef CONFIG_CI_UDC_HAS_HOSTPC 683 bit = (readl(&udc->hostpc1_devlc) >> 25) & 3; 684 #else 685 bit = (readl(&udc->portsc) >> 26) & 3; 686 #endif 687 DBG("-- portchange %x %s\n", bit, (bit == 2) ? "High" : "Full"); 688 if (bit == 2) { 689 speed = USB_SPEED_HIGH; 690 max = 512; 691 } 692 controller.gadget.speed = speed; 693 for (i = 1; i < NUM_ENDPOINTS; i++) { 694 if (controller.ep[i].ep.maxpacket > max) 695 controller.ep[i].ep.maxpacket = max; 696 } 697 } 698 699 if (n & STS_UEI) 700 printf("<UEI %x>\n", readl(&udc->epcomp)); 701 702 if ((n & STS_UI) || (n & STS_UEI)) { 703 #ifdef CONFIG_CI_UDC_HAS_HOSTPC 704 n = readl(&udc->epsetupstat); 705 #else 706 n = readl(&udc->epstat); 707 #endif 708 if (n & EPT_RX(0)) 709 handle_setup(); 710 711 n = readl(&udc->epcomp); 712 if (n != 0) 713 writel(n, &udc->epcomp); 714 715 for (i = 0; i < NUM_ENDPOINTS && n; i++) { 716 if (controller.ep[i].desc) { 717 num = controller.ep[i].desc->bEndpointAddress 718 & USB_ENDPOINT_NUMBER_MASK; 719 in = (controller.ep[i].desc->bEndpointAddress 720 & USB_DIR_IN) != 0; 721 bit = (in) ? EPT_TX(num) : EPT_RX(num); 722 if (n & bit) 723 handle_ep_complete(&controller.ep[i]); 724 } 725 } 726 } 727 } 728 729 int usb_gadget_handle_interrupts(void) 730 { 731 u32 value; 732 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 733 734 value = readl(&udc->usbsts); 735 if (value) 736 udc_irq(); 737 738 return value; 739 } 740 741 void udc_disconnect(void) 742 { 743 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 744 /* disable pullup */ 745 stop_activity(); 746 writel(USBCMD_FS2, &udc->usbcmd); 747 udelay(800); 748 if (controller.driver) 749 controller.driver->disconnect(&controller.gadget); 750 } 751 752 static int ci_pullup(struct usb_gadget *gadget, int is_on) 753 { 754 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 755 if (is_on) { 756 /* RESET */ 757 writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RST, &udc->usbcmd); 758 udelay(200); 759 760 writel((unsigned)controller.epts, &udc->epinitaddr); 761 762 /* select DEVICE mode */ 763 writel(USBMODE_DEVICE, &udc->usbmode); 764 765 writel(0xffffffff, &udc->epflush); 766 767 /* Turn on the USB connection by enabling the pullup resistor */ 768 writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RUN, &udc->usbcmd); 769 } else { 770 udc_disconnect(); 771 } 772 773 return 0; 774 } 775 776 static int ci_udc_probe(void) 777 { 778 struct ept_queue_head *head; 779 uint8_t *imem; 780 int i; 781 782 const int num = 2 * NUM_ENDPOINTS; 783 784 const int eplist_min_align = 4096; 785 const int eplist_align = roundup(eplist_min_align, ARCH_DMA_MINALIGN); 786 const int eplist_raw_sz = num * sizeof(struct ept_queue_head); 787 const int eplist_sz = roundup(eplist_raw_sz, ARCH_DMA_MINALIGN); 788 789 const int ilist_align = roundup(ARCH_DMA_MINALIGN, 32); 790 const int ilist_ent_raw_sz = 2 * sizeof(struct ept_queue_item); 791 const int ilist_ent_sz = roundup(ilist_ent_raw_sz, ARCH_DMA_MINALIGN); 792 const int ilist_sz = NUM_ENDPOINTS * ilist_ent_sz; 793 794 /* The QH list must be aligned to 4096 bytes. */ 795 controller.epts = memalign(eplist_align, eplist_sz); 796 if (!controller.epts) 797 return -ENOMEM; 798 memset(controller.epts, 0, eplist_sz); 799 800 /* 801 * Each qTD item must be 32-byte aligned, each qTD touple must be 802 * cacheline aligned. There are two qTD items for each endpoint and 803 * only one of them is used for the endpoint at time, so we can group 804 * them together. 805 */ 806 controller.items_mem = memalign(ilist_align, ilist_sz); 807 if (!controller.items_mem) { 808 free(controller.epts); 809 return -ENOMEM; 810 } 811 memset(controller.items_mem, 0, ilist_sz); 812 813 for (i = 0; i < 2 * NUM_ENDPOINTS; i++) { 814 /* 815 * Configure QH for each endpoint. The structure of the QH list 816 * is such that each two subsequent fields, N and N+1 where N is 817 * even, in the QH list represent QH for one endpoint. The Nth 818 * entry represents OUT configuration and the N+1th entry does 819 * represent IN configuration of the endpoint. 820 */ 821 head = controller.epts + i; 822 if (i < 2) 823 head->config = CONFIG_MAX_PKT(EP0_MAX_PACKET_SIZE) 824 | CONFIG_ZLT | CONFIG_IOS; 825 else 826 head->config = CONFIG_MAX_PKT(EP_MAX_PACKET_SIZE) 827 | CONFIG_ZLT; 828 head->next = TERMINATE; 829 head->info = 0; 830 831 imem = controller.items_mem + ((i >> 1) * ilist_ent_sz); 832 if (i & 1) 833 imem += sizeof(struct ept_queue_item); 834 835 controller.items[i] = (struct ept_queue_item *)imem; 836 837 if (i & 1) { 838 ci_flush_qh(i / 2); 839 ci_flush_qtd(i / 2); 840 } 841 } 842 843 INIT_LIST_HEAD(&controller.gadget.ep_list); 844 845 /* Init EP 0 */ 846 memcpy(&controller.ep[0].ep, &ci_ep_init[0], sizeof(*ci_ep_init)); 847 controller.ep[0].desc = &ep0_desc; 848 INIT_LIST_HEAD(&controller.ep[0].queue); 849 controller.ep[0].req_primed = false; 850 controller.gadget.ep0 = &controller.ep[0].ep; 851 INIT_LIST_HEAD(&controller.gadget.ep0->ep_list); 852 853 /* Init EP 1..n */ 854 for (i = 1; i < NUM_ENDPOINTS; i++) { 855 memcpy(&controller.ep[i].ep, &ci_ep_init[1], 856 sizeof(*ci_ep_init)); 857 INIT_LIST_HEAD(&controller.ep[i].queue); 858 controller.ep[i].req_primed = false; 859 list_add_tail(&controller.ep[i].ep.ep_list, 860 &controller.gadget.ep_list); 861 } 862 863 ci_ep_alloc_request(&controller.ep[0].ep, 0); 864 if (!controller.ep0_req) { 865 free(controller.items_mem); 866 free(controller.epts); 867 return -ENOMEM; 868 } 869 870 return 0; 871 } 872 873 int usb_gadget_register_driver(struct usb_gadget_driver *driver) 874 { 875 int ret; 876 877 if (!driver) 878 return -EINVAL; 879 if (!driver->bind || !driver->setup || !driver->disconnect) 880 return -EINVAL; 881 if (driver->speed != USB_SPEED_FULL && driver->speed != USB_SPEED_HIGH) 882 return -EINVAL; 883 884 ret = usb_lowlevel_init(0, USB_INIT_DEVICE, (void **)&controller.ctrl); 885 if (ret) 886 return ret; 887 888 ret = ci_udc_probe(); 889 #if defined(CONFIG_USB_EHCI_MX6) || defined(CONFIG_USB_EHCI_MXS) 890 /* 891 * FIXME: usb_lowlevel_init()->ehci_hcd_init() should be doing all 892 * HW-specific initialization, e.g. ULPI-vs-UTMI PHY selection 893 */ 894 if (!ret) { 895 struct ci_udc *udc = (struct ci_udc *)controller.ctrl->hcor; 896 897 /* select ULPI phy */ 898 writel(PTS(PTS_ENABLE) | PFSC, &udc->portsc); 899 } 900 #endif 901 902 ret = driver->bind(&controller.gadget); 903 if (ret) { 904 DBG("driver->bind() returned %d\n", ret); 905 return ret; 906 } 907 controller.driver = driver; 908 909 return 0; 910 } 911 912 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 913 { 914 udc_disconnect(); 915 916 driver->unbind(&controller.gadget); 917 controller.driver = NULL; 918 919 ci_ep_free_request(&controller.ep[0].ep, &controller.ep0_req->req); 920 free(controller.items_mem); 921 free(controller.epts); 922 923 return 0; 924 } 925