xref: /rk3399_rockchip-uboot/drivers/ufs/cdns-platform.c (revision 8f7de5145da2de88e169e58343cceeee233362d4)
1*8f7de514SShawn Lin // SPDX-License-Identifier: GPL-2.0+
2*8f7de514SShawn Lin /**
3*8f7de514SShawn Lin  * cdns-platform.c - Platform driver for Cadence UFSHCI device
4*8f7de514SShawn Lin  *
5*8f7de514SShawn Lin  * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
6*8f7de514SShawn Lin  */
7*8f7de514SShawn Lin 
8*8f7de514SShawn Lin #include <clk.h>
9*8f7de514SShawn Lin #include <common.h>
10*8f7de514SShawn Lin #include <dm.h>
11*8f7de514SShawn Lin #include <ufs.h>
12*8f7de514SShawn Lin #include <asm/io.h>
13*8f7de514SShawn Lin #include <linux/bitops.h>
14*8f7de514SShawn Lin #include <linux/err.h>
15*8f7de514SShawn Lin 
16*8f7de514SShawn Lin #include "ufs.h"
17*8f7de514SShawn Lin 
18*8f7de514SShawn Lin #define USEC_PER_SEC	1000000L
19*8f7de514SShawn Lin 
20*8f7de514SShawn Lin #define CDNS_UFS_REG_HCLKDIV	0xFC
21*8f7de514SShawn Lin #define CDNS_UFS_REG_PHY_XCFGD1	0x113C
22*8f7de514SShawn Lin 
cdns_ufs_link_startup_notify(struct ufs_hba * hba,enum ufs_notify_change_status status)23*8f7de514SShawn Lin static int cdns_ufs_link_startup_notify(struct ufs_hba *hba,
24*8f7de514SShawn Lin 					enum ufs_notify_change_status status)
25*8f7de514SShawn Lin {
26*8f7de514SShawn Lin 	hba->quirks |= UFSHCD_QUIRK_BROKEN_LCC;
27*8f7de514SShawn Lin 	switch (status) {
28*8f7de514SShawn Lin 	case PRE_CHANGE:
29*8f7de514SShawn Lin 		return ufshcd_dme_set(hba,
30*8f7de514SShawn Lin 				      UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE),
31*8f7de514SShawn Lin 				      0);
32*8f7de514SShawn Lin 	case POST_CHANGE:
33*8f7de514SShawn Lin 	;
34*8f7de514SShawn Lin 	}
35*8f7de514SShawn Lin 
36*8f7de514SShawn Lin 	return 0;
37*8f7de514SShawn Lin }
38*8f7de514SShawn Lin 
cdns_ufs_set_hclkdiv(struct ufs_hba * hba)39*8f7de514SShawn Lin static int cdns_ufs_set_hclkdiv(struct ufs_hba *hba)
40*8f7de514SShawn Lin {
41*8f7de514SShawn Lin 	struct clk clk;
42*8f7de514SShawn Lin 	unsigned long core_clk_rate = 0;
43*8f7de514SShawn Lin 	u32 core_clk_div = 0;
44*8f7de514SShawn Lin 	int ret;
45*8f7de514SShawn Lin 
46*8f7de514SShawn Lin 	ret = clk_get_by_name(hba->dev, "core_clk", &clk);
47*8f7de514SShawn Lin 	if (ret) {
48*8f7de514SShawn Lin 		dev_err(hba->dev, "failed to get core_clk clock\n");
49*8f7de514SShawn Lin 		return ret;
50*8f7de514SShawn Lin 	}
51*8f7de514SShawn Lin 
52*8f7de514SShawn Lin 	core_clk_rate = clk_get_rate(&clk);
53*8f7de514SShawn Lin 	if (IS_ERR_VALUE(core_clk_rate)) {
54*8f7de514SShawn Lin 		dev_err(hba->dev, "%s: unable to find core_clk rate\n",
55*8f7de514SShawn Lin 			__func__);
56*8f7de514SShawn Lin 		return core_clk_rate;
57*8f7de514SShawn Lin 	}
58*8f7de514SShawn Lin 
59*8f7de514SShawn Lin 	core_clk_div = core_clk_rate / USEC_PER_SEC;
60*8f7de514SShawn Lin 	ufshcd_writel(hba, core_clk_div, CDNS_UFS_REG_HCLKDIV);
61*8f7de514SShawn Lin 
62*8f7de514SShawn Lin 	return 0;
63*8f7de514SShawn Lin }
64*8f7de514SShawn Lin 
cdns_ufs_hce_enable_notify(struct ufs_hba * hba,enum ufs_notify_change_status status)65*8f7de514SShawn Lin static int cdns_ufs_hce_enable_notify(struct ufs_hba *hba,
66*8f7de514SShawn Lin 				      enum ufs_notify_change_status status)
67*8f7de514SShawn Lin {
68*8f7de514SShawn Lin 	switch (status) {
69*8f7de514SShawn Lin 	case PRE_CHANGE:
70*8f7de514SShawn Lin 		return cdns_ufs_set_hclkdiv(hba);
71*8f7de514SShawn Lin 	case POST_CHANGE:
72*8f7de514SShawn Lin 	;
73*8f7de514SShawn Lin 	}
74*8f7de514SShawn Lin 
75*8f7de514SShawn Lin 	return 0;
76*8f7de514SShawn Lin }
77*8f7de514SShawn Lin 
cdns_ufs_init(struct ufs_hba * hba)78*8f7de514SShawn Lin static int cdns_ufs_init(struct ufs_hba *hba)
79*8f7de514SShawn Lin {
80*8f7de514SShawn Lin 	u32 data;
81*8f7de514SShawn Lin 
82*8f7de514SShawn Lin 	/* Increase RX_Advanced_Min_ActivateTime_Capability */
83*8f7de514SShawn Lin 	data = ufshcd_readl(hba, CDNS_UFS_REG_PHY_XCFGD1);
84*8f7de514SShawn Lin 	data |= BIT(24);
85*8f7de514SShawn Lin 	ufshcd_writel(hba, data, CDNS_UFS_REG_PHY_XCFGD1);
86*8f7de514SShawn Lin 
87*8f7de514SShawn Lin 	return 0;
88*8f7de514SShawn Lin }
89*8f7de514SShawn Lin 
90*8f7de514SShawn Lin static struct ufs_hba_ops cdns_pltfm_hba_ops = {
91*8f7de514SShawn Lin 	.init = cdns_ufs_init,
92*8f7de514SShawn Lin 	.hce_enable_notify = cdns_ufs_hce_enable_notify,
93*8f7de514SShawn Lin 	.link_startup_notify = cdns_ufs_link_startup_notify,
94*8f7de514SShawn Lin };
95*8f7de514SShawn Lin 
cdns_ufs_pltfm_probe(struct udevice * dev)96*8f7de514SShawn Lin static int cdns_ufs_pltfm_probe(struct udevice *dev)
97*8f7de514SShawn Lin {
98*8f7de514SShawn Lin 	int err = ufshcd_probe(dev, &cdns_pltfm_hba_ops);
99*8f7de514SShawn Lin 	if (err)
100*8f7de514SShawn Lin 		dev_err(dev, "ufshcd_probe() failed %d\n", err);
101*8f7de514SShawn Lin 
102*8f7de514SShawn Lin 	return err;
103*8f7de514SShawn Lin }
104*8f7de514SShawn Lin 
cdns_ufs_pltfm_bind(struct udevice * dev)105*8f7de514SShawn Lin static int cdns_ufs_pltfm_bind(struct udevice *dev)
106*8f7de514SShawn Lin {
107*8f7de514SShawn Lin 	struct udevice *scsi_dev;
108*8f7de514SShawn Lin 
109*8f7de514SShawn Lin 	return ufs_scsi_bind(dev, &scsi_dev);
110*8f7de514SShawn Lin }
111*8f7de514SShawn Lin 
112*8f7de514SShawn Lin static const struct udevice_id cdns_ufs_pltfm_ids[] = {
113*8f7de514SShawn Lin 	{
114*8f7de514SShawn Lin 		.compatible = "cdns,ufshc-m31-16nm",
115*8f7de514SShawn Lin 	},
116*8f7de514SShawn Lin 	{},
117*8f7de514SShawn Lin };
118*8f7de514SShawn Lin 
119*8f7de514SShawn Lin U_BOOT_DRIVER(cdns_ufs_pltfm) = {
120*8f7de514SShawn Lin 	.name		= "cdns-ufs-pltfm",
121*8f7de514SShawn Lin 	.id		=  UCLASS_UFS,
122*8f7de514SShawn Lin 	.of_match	= cdns_ufs_pltfm_ids,
123*8f7de514SShawn Lin 	.probe		= cdns_ufs_pltfm_probe,
124*8f7de514SShawn Lin 	.bind		= cdns_ufs_pltfm_bind,
125*8f7de514SShawn Lin };
126