1a54915d8SThomas Chou /*
2a54915d8SThomas Chou * (C) Copyright 2000-2002
3a54915d8SThomas Chou * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4a54915d8SThomas Chou *
5a54915d8SThomas Chou * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
6a54915d8SThomas Chou * Scott McNutt <smcnutt@psyent.com>
7a54915d8SThomas Chou *
8a54915d8SThomas Chou * SPDX-License-Identifier: GPL-2.0+
9a54915d8SThomas Chou */
10a54915d8SThomas Chou
11a54915d8SThomas Chou #include <common.h>
12a54915d8SThomas Chou #include <dm.h>
13a54915d8SThomas Chou #include <errno.h>
14a54915d8SThomas Chou #include <timer.h>
15a54915d8SThomas Chou #include <asm/io.h>
16a54915d8SThomas Chou
17a54915d8SThomas Chou DECLARE_GLOBAL_DATA_PTR;
18a54915d8SThomas Chou
191235e5a5SThomas Chou /* control register */
201235e5a5SThomas Chou #define ALTERA_TIMER_CONT BIT(1) /* Continuous mode */
211235e5a5SThomas Chou #define ALTERA_TIMER_START BIT(2) /* Start timer */
221235e5a5SThomas Chou #define ALTERA_TIMER_STOP BIT(3) /* Stop timer */
231235e5a5SThomas Chou
24a54915d8SThomas Chou struct altera_timer_regs {
25a54915d8SThomas Chou u32 status; /* Timer status reg */
26a54915d8SThomas Chou u32 control; /* Timer control reg */
27a54915d8SThomas Chou u32 periodl; /* Timeout period low */
28a54915d8SThomas Chou u32 periodh; /* Timeout period high */
29a54915d8SThomas Chou u32 snapl; /* Snapshot low */
30a54915d8SThomas Chou u32 snaph; /* Snapshot high */
31a54915d8SThomas Chou };
32a54915d8SThomas Chou
33a54915d8SThomas Chou struct altera_timer_platdata {
34a54915d8SThomas Chou struct altera_timer_regs *regs;
35a54915d8SThomas Chou };
36a54915d8SThomas Chou
altera_timer_get_count(struct udevice * dev,u64 * count)379ca07ebbSBin Meng static int altera_timer_get_count(struct udevice *dev, u64 *count)
38a54915d8SThomas Chou {
39a54915d8SThomas Chou struct altera_timer_platdata *plat = dev->platdata;
40a54915d8SThomas Chou struct altera_timer_regs *const regs = plat->regs;
41a54915d8SThomas Chou u32 val;
42a54915d8SThomas Chou
43a54915d8SThomas Chou /* Trigger update */
44a54915d8SThomas Chou writel(0x0, ®s->snapl);
45a54915d8SThomas Chou
46a54915d8SThomas Chou /* Read timer value */
47a54915d8SThomas Chou val = readl(®s->snapl) & 0xffff;
48a54915d8SThomas Chou val |= (readl(®s->snaph) & 0xffff) << 16;
499ca07ebbSBin Meng *count = timer_conv_64(~val);
50a54915d8SThomas Chou
51a54915d8SThomas Chou return 0;
52a54915d8SThomas Chou }
53a54915d8SThomas Chou
altera_timer_probe(struct udevice * dev)54a54915d8SThomas Chou static int altera_timer_probe(struct udevice *dev)
55a54915d8SThomas Chou {
56a54915d8SThomas Chou struct altera_timer_platdata *plat = dev->platdata;
57a54915d8SThomas Chou struct altera_timer_regs *const regs = plat->regs;
58a54915d8SThomas Chou
59a54915d8SThomas Chou writel(0, ®s->status);
60a54915d8SThomas Chou writel(0, ®s->control);
61a54915d8SThomas Chou writel(ALTERA_TIMER_STOP, ®s->control);
62a54915d8SThomas Chou
63a54915d8SThomas Chou writel(0xffff, ®s->periodl);
64a54915d8SThomas Chou writel(0xffff, ®s->periodh);
65a54915d8SThomas Chou writel(ALTERA_TIMER_CONT | ALTERA_TIMER_START, ®s->control);
66a54915d8SThomas Chou
67a54915d8SThomas Chou return 0;
68a54915d8SThomas Chou }
69a54915d8SThomas Chou
altera_timer_ofdata_to_platdata(struct udevice * dev)70a54915d8SThomas Chou static int altera_timer_ofdata_to_platdata(struct udevice *dev)
71a54915d8SThomas Chou {
72a54915d8SThomas Chou struct altera_timer_platdata *plat = dev_get_platdata(dev);
73a54915d8SThomas Chou
74*a821c4afSSimon Glass plat->regs = map_physmem(devfdt_get_addr(dev),
754c26ec17SThomas Chou sizeof(struct altera_timer_regs),
764c26ec17SThomas Chou MAP_NOCACHE);
77a54915d8SThomas Chou
78a54915d8SThomas Chou return 0;
79a54915d8SThomas Chou }
80a54915d8SThomas Chou
81a54915d8SThomas Chou static const struct timer_ops altera_timer_ops = {
82a54915d8SThomas Chou .get_count = altera_timer_get_count,
83a54915d8SThomas Chou };
84a54915d8SThomas Chou
85a54915d8SThomas Chou static const struct udevice_id altera_timer_ids[] = {
861235e5a5SThomas Chou { .compatible = "altr,timer-1.0" },
87a54915d8SThomas Chou {}
88a54915d8SThomas Chou };
89a54915d8SThomas Chou
90a54915d8SThomas Chou U_BOOT_DRIVER(altera_timer) = {
91a54915d8SThomas Chou .name = "altera_timer",
92a54915d8SThomas Chou .id = UCLASS_TIMER,
93a54915d8SThomas Chou .of_match = altera_timer_ids,
94a54915d8SThomas Chou .ofdata_to_platdata = altera_timer_ofdata_to_platdata,
95a54915d8SThomas Chou .platdata_auto_alloc_size = sizeof(struct altera_timer_platdata),
96a54915d8SThomas Chou .probe = altera_timer_probe,
97a54915d8SThomas Chou .ops = &altera_timer_ops,
98a54915d8SThomas Chou .flags = DM_FLAG_PRE_RELOC,
99a54915d8SThomas Chou };
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