xref: /rk3399_rockchip-uboot/drivers/sysreset/Makefile (revision 37c07c5b1ff89a75581a236d1536b0584d2f74c0)
1b25732c2SMax Filippov#
2b25732c2SMax Filippov# (C) Copyright 2016 Cadence Design Systems Inc.
3b25732c2SMax Filippov#
4b25732c2SMax Filippov# SPDX-License-Identifier:	GPL-2.0+
5b25732c2SMax Filippov#
6b25732c2SMax Filippov
7b25732c2SMax Filippovobj-$(CONFIG_SYSRESET) += sysreset-uclass.o
8b25732c2SMax Filippov
9b25732c2SMax Filippovifndef CONFIG_SPL_BUILD
10b25732c2SMax Filippovobj-$(CONFIG_ROCKCHIP_RK3036) += sysreset_rk3036.o
11b25732c2SMax Filippovendif
12*37c07c5bSHeiko Stübnerobj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
13b25732c2SMax Filippovobj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
14b25732c2SMax Filippovobj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
15b25732c2SMax Filippovobj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
16b25732c2SMax Filippovobj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
17413788ceSPatrice Chotardobj-$(CONFIG_ARCH_STI) += sysreset_sti.o
187e270ec3SChris Zankelobj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
194697abeaSmaxims@google.comobj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
20