xref: /rk3399_rockchip-uboot/drivers/spi/altera_spi.c (revision bc76b821f05fa4cdfca406cba975657de7a8e9f8)
1 /*
2  * Altera SPI driver
3  *
4  * based on bfin_spi.c
5  * Copyright (c) 2005-2008 Analog Devices Inc.
6  * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 #include <common.h>
11 #include <asm/io.h>
12 #include <malloc.h>
13 #include <spi.h>
14 
15 struct altera_spi_regs {
16 	u32	rxdata;
17 	u32	txdata;
18 	u32	status;
19 	u32	control;
20 	u32	_reserved;
21 	u32	slave_sel;
22 };
23 
24 #define ALTERA_SPI_STATUS_ROE_MSK	(1 << 3)
25 #define ALTERA_SPI_STATUS_TOE_MSK	(1 << 4)
26 #define ALTERA_SPI_STATUS_TMT_MSK	(1 << 5)
27 #define ALTERA_SPI_STATUS_TRDY_MSK	(1 << 6)
28 #define ALTERA_SPI_STATUS_RRDY_MSK	(1 << 7)
29 #define ALTERA_SPI_STATUS_E_MSK		(1 << 8)
30 
31 #define ALTERA_SPI_CONTROL_IROE_MSK	(1 << 3)
32 #define ALTERA_SPI_CONTROL_ITOE_MSK	(1 << 4)
33 #define ALTERA_SPI_CONTROL_ITRDY_MSK	(1 << 6)
34 #define ALTERA_SPI_CONTROL_IRRDY_MSK	(1 << 7)
35 #define ALTERA_SPI_CONTROL_IE_MSK	(1 << 8)
36 #define ALTERA_SPI_CONTROL_SSO_MSK	(1 << 10)
37 
38 #ifndef CONFIG_SYS_ALTERA_SPI_LIST
39 #define CONFIG_SYS_ALTERA_SPI_LIST { CONFIG_SYS_SPI_BASE }
40 #endif
41 
42 static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST;
43 
44 struct altera_spi_slave {
45 	struct spi_slave	slave;
46 	struct altera_spi_regs	*regs;
47 };
48 #define to_altera_spi_slave(s) container_of(s, struct altera_spi_slave, slave)
49 
50 __weak int spi_cs_is_valid(unsigned int bus, unsigned int cs)
51 {
52 	return bus < ARRAY_SIZE(altera_spi_base_list) && cs < 32;
53 }
54 
55 __weak void spi_cs_activate(struct spi_slave *slave)
56 {
57 	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
58 	writel(1 << slave->cs, &altspi->regs->slave_sel);
59 	writel(ALTERA_SPI_CONTROL_SSO_MSK, &altspi->regs->control);
60 }
61 
62 __weak void spi_cs_deactivate(struct spi_slave *slave)
63 {
64 	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
65 	writel(0, &altspi->regs->control);
66 	writel(0, &altspi->regs->slave_sel);
67 }
68 
69 void spi_init(void)
70 {
71 }
72 
73 void spi_set_speed(struct spi_slave *slave, uint hz)
74 {
75 	/* altera spi core does not support programmable speed */
76 }
77 
78 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
79 				  unsigned int max_hz, unsigned int mode)
80 {
81 	struct altera_spi_slave *altspi;
82 
83 	if (!spi_cs_is_valid(bus, cs))
84 		return NULL;
85 
86 	altspi = spi_alloc_slave(struct altera_spi_slave, bus, cs);
87 	if (!altspi)
88 		return NULL;
89 
90 	altspi->regs = (struct altera_spi_regs *)altera_spi_base_list[bus];
91 	debug("%s: bus:%i cs:%i base:%p\n", __func__, bus, cs, altspi->regs);
92 
93 	return &altspi->slave;
94 }
95 
96 void spi_free_slave(struct spi_slave *slave)
97 {
98 	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
99 	free(altspi);
100 }
101 
102 int spi_claim_bus(struct spi_slave *slave)
103 {
104 	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
105 
106 	debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
107 	writel(0, &altspi->regs->control);
108 	writel(0, &altspi->regs->slave_sel);
109 	return 0;
110 }
111 
112 void spi_release_bus(struct spi_slave *slave)
113 {
114 	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
115 
116 	debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
117 	writel(0, &altspi->regs->slave_sel);
118 }
119 
120 #ifndef CONFIG_ALTERA_SPI_IDLE_VAL
121 # define CONFIG_ALTERA_SPI_IDLE_VAL 0xff
122 #endif
123 
124 int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
125 	     void *din, unsigned long flags)
126 {
127 	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
128 	/* assume spi core configured to do 8 bit transfers */
129 	unsigned int bytes = bitlen / 8;
130 	const unsigned char *txp = dout;
131 	unsigned char *rxp = din;
132 	uint32_t reg, data, start;
133 
134 	debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
135 	      slave->bus, slave->cs, bitlen, bytes, flags);
136 
137 	if (bitlen == 0)
138 		goto done;
139 
140 	if (bitlen % 8) {
141 		flags |= SPI_XFER_END;
142 		goto done;
143 	}
144 
145 	/* empty read buffer */
146 	if (readl(&altspi->regs->status) & ALTERA_SPI_STATUS_RRDY_MSK)
147 		readl(&altspi->regs->rxdata);
148 
149 	if (flags & SPI_XFER_BEGIN)
150 		spi_cs_activate(slave);
151 
152 	while (bytes--) {
153 		if (txp)
154 			data = *txp++;
155 		else
156 			data = CONFIG_ALTERA_SPI_IDLE_VAL;
157 
158 		debug("%s: tx:%x ", __func__, data);
159 		writel(data, &altspi->regs->txdata);
160 
161 		start = get_timer(0);
162 		while (1) {
163 			reg = readl(&altspi->regs->status);
164 			if (reg & ALTERA_SPI_STATUS_RRDY_MSK)
165 				break;
166 			if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
167 				printf("%s: Transmission timed out!\n", __func__);
168 				goto done;
169 			}
170 		}
171 
172 		data = readl(&altspi->regs->rxdata);
173 		if (rxp)
174 			*rxp++ = data & 0xff;
175 
176 		debug("rx:%x\n", data);
177 	}
178 
179 done:
180 	if (flags & SPI_XFER_END)
181 		spi_cs_deactivate(slave);
182 
183 	return 0;
184 }
185