xref: /rk3399_rockchip-uboot/drivers/spi/altera_spi.c (revision bc76b821f05fa4cdfca406cba975657de7a8e9f8)
1661ba140SThomas Chou /*
2661ba140SThomas Chou  * Altera SPI driver
3661ba140SThomas Chou  *
4661ba140SThomas Chou  * based on bfin_spi.c
5661ba140SThomas Chou  * Copyright (c) 2005-2008 Analog Devices Inc.
6661ba140SThomas Chou  * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
7661ba140SThomas Chou  *
8e7b1e452SJagannadha Sutradharudu Teki  * SPDX-License-Identifier:	GPL-2.0+
9661ba140SThomas Chou  */
10661ba140SThomas Chou #include <common.h>
11661ba140SThomas Chou #include <asm/io.h>
12661ba140SThomas Chou #include <malloc.h>
13661ba140SThomas Chou #include <spi.h>
14661ba140SThomas Chou 
15eef67029SMarek Vasut struct altera_spi_regs {
16eef67029SMarek Vasut 	u32	rxdata;
17eef67029SMarek Vasut 	u32	txdata;
18eef67029SMarek Vasut 	u32	status;
19eef67029SMarek Vasut 	u32	control;
20eef67029SMarek Vasut 	u32	_reserved;
21eef67029SMarek Vasut 	u32	slave_sel;
22eef67029SMarek Vasut };
23661ba140SThomas Chou 
242e13da13SMarek Vasut #define ALTERA_SPI_STATUS_ROE_MSK	(1 << 3)
252e13da13SMarek Vasut #define ALTERA_SPI_STATUS_TOE_MSK	(1 << 4)
262e13da13SMarek Vasut #define ALTERA_SPI_STATUS_TMT_MSK	(1 << 5)
272e13da13SMarek Vasut #define ALTERA_SPI_STATUS_TRDY_MSK	(1 << 6)
282e13da13SMarek Vasut #define ALTERA_SPI_STATUS_RRDY_MSK	(1 << 7)
292e13da13SMarek Vasut #define ALTERA_SPI_STATUS_E_MSK		(1 << 8)
30661ba140SThomas Chou 
312e13da13SMarek Vasut #define ALTERA_SPI_CONTROL_IROE_MSK	(1 << 3)
322e13da13SMarek Vasut #define ALTERA_SPI_CONTROL_ITOE_MSK	(1 << 4)
332e13da13SMarek Vasut #define ALTERA_SPI_CONTROL_ITRDY_MSK	(1 << 6)
342e13da13SMarek Vasut #define ALTERA_SPI_CONTROL_IRRDY_MSK	(1 << 7)
352e13da13SMarek Vasut #define ALTERA_SPI_CONTROL_IE_MSK	(1 << 8)
362e13da13SMarek Vasut #define ALTERA_SPI_CONTROL_SSO_MSK	(1 << 10)
37661ba140SThomas Chou 
38661ba140SThomas Chou #ifndef CONFIG_SYS_ALTERA_SPI_LIST
39661ba140SThomas Chou #define CONFIG_SYS_ALTERA_SPI_LIST { CONFIG_SYS_SPI_BASE }
40661ba140SThomas Chou #endif
41661ba140SThomas Chou 
42661ba140SThomas Chou static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST;
43661ba140SThomas Chou 
44661ba140SThomas Chou struct altera_spi_slave {
45661ba140SThomas Chou 	struct spi_slave	slave;
46eef67029SMarek Vasut 	struct altera_spi_regs	*regs;
47661ba140SThomas Chou };
48661ba140SThomas Chou #define to_altera_spi_slave(s) container_of(s, struct altera_spi_slave, slave)
49661ba140SThomas Chou 
5037dcc130SMarek Vasut __weak int spi_cs_is_valid(unsigned int bus, unsigned int cs)
51661ba140SThomas Chou {
52661ba140SThomas Chou 	return bus < ARRAY_SIZE(altera_spi_base_list) && cs < 32;
53661ba140SThomas Chou }
54661ba140SThomas Chou 
5537dcc130SMarek Vasut __weak void spi_cs_activate(struct spi_slave *slave)
56661ba140SThomas Chou {
57661ba140SThomas Chou 	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
58eef67029SMarek Vasut 	writel(1 << slave->cs, &altspi->regs->slave_sel);
59eef67029SMarek Vasut 	writel(ALTERA_SPI_CONTROL_SSO_MSK, &altspi->regs->control);
60661ba140SThomas Chou }
61661ba140SThomas Chou 
6237dcc130SMarek Vasut __weak void spi_cs_deactivate(struct spi_slave *slave)
63661ba140SThomas Chou {
64661ba140SThomas Chou 	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
65eef67029SMarek Vasut 	writel(0, &altspi->regs->control);
66eef67029SMarek Vasut 	writel(0, &altspi->regs->slave_sel);
67661ba140SThomas Chou }
68661ba140SThomas Chou 
69661ba140SThomas Chou void spi_init(void)
70661ba140SThomas Chou {
71661ba140SThomas Chou }
72661ba140SThomas Chou 
73df8f1252SThomas Chou void spi_set_speed(struct spi_slave *slave, uint hz)
74df8f1252SThomas Chou {
75df8f1252SThomas Chou 	/* altera spi core does not support programmable speed */
76df8f1252SThomas Chou }
77df8f1252SThomas Chou 
78661ba140SThomas Chou struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
79661ba140SThomas Chou 				  unsigned int max_hz, unsigned int mode)
80661ba140SThomas Chou {
81661ba140SThomas Chou 	struct altera_spi_slave *altspi;
82661ba140SThomas Chou 
83661ba140SThomas Chou 	if (!spi_cs_is_valid(bus, cs))
84661ba140SThomas Chou 		return NULL;
85661ba140SThomas Chou 
86d3504feeSSimon Glass 	altspi = spi_alloc_slave(struct altera_spi_slave, bus, cs);
87661ba140SThomas Chou 	if (!altspi)
88661ba140SThomas Chou 		return NULL;
89661ba140SThomas Chou 
90eef67029SMarek Vasut 	altspi->regs = (struct altera_spi_regs *)altera_spi_base_list[bus];
9137dcc130SMarek Vasut 	debug("%s: bus:%i cs:%i base:%p\n", __func__, bus, cs, altspi->regs);
92661ba140SThomas Chou 
93661ba140SThomas Chou 	return &altspi->slave;
94661ba140SThomas Chou }
95661ba140SThomas Chou 
96661ba140SThomas Chou void spi_free_slave(struct spi_slave *slave)
97661ba140SThomas Chou {
98661ba140SThomas Chou 	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
99661ba140SThomas Chou 	free(altspi);
100661ba140SThomas Chou }
101661ba140SThomas Chou 
102661ba140SThomas Chou int spi_claim_bus(struct spi_slave *slave)
103661ba140SThomas Chou {
104661ba140SThomas Chou 	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
105661ba140SThomas Chou 
106661ba140SThomas Chou 	debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
107eef67029SMarek Vasut 	writel(0, &altspi->regs->control);
108eef67029SMarek Vasut 	writel(0, &altspi->regs->slave_sel);
109661ba140SThomas Chou 	return 0;
110661ba140SThomas Chou }
111661ba140SThomas Chou 
112661ba140SThomas Chou void spi_release_bus(struct spi_slave *slave)
113661ba140SThomas Chou {
114661ba140SThomas Chou 	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
115661ba140SThomas Chou 
116661ba140SThomas Chou 	debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
117eef67029SMarek Vasut 	writel(0, &altspi->regs->slave_sel);
118661ba140SThomas Chou }
119661ba140SThomas Chou 
120661ba140SThomas Chou #ifndef CONFIG_ALTERA_SPI_IDLE_VAL
121661ba140SThomas Chou # define CONFIG_ALTERA_SPI_IDLE_VAL 0xff
122661ba140SThomas Chou #endif
123661ba140SThomas Chou 
124661ba140SThomas Chou int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
125661ba140SThomas Chou 	     void *din, unsigned long flags)
126661ba140SThomas Chou {
127661ba140SThomas Chou 	struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
128661ba140SThomas Chou 	/* assume spi core configured to do 8 bit transfers */
129*bc76b821SMarek Vasut 	unsigned int bytes = bitlen / 8;
130*bc76b821SMarek Vasut 	const unsigned char *txp = dout;
131*bc76b821SMarek Vasut 	unsigned char *rxp = din;
132*bc76b821SMarek Vasut 	uint32_t reg, data, start;
133661ba140SThomas Chou 
134661ba140SThomas Chou 	debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
135661ba140SThomas Chou 	      slave->bus, slave->cs, bitlen, bytes, flags);
13637dcc130SMarek Vasut 
137661ba140SThomas Chou 	if (bitlen == 0)
138661ba140SThomas Chou 		goto done;
139661ba140SThomas Chou 
140661ba140SThomas Chou 	if (bitlen % 8) {
141661ba140SThomas Chou 		flags |= SPI_XFER_END;
142661ba140SThomas Chou 		goto done;
143661ba140SThomas Chou 	}
144661ba140SThomas Chou 
145661ba140SThomas Chou 	/* empty read buffer */
146eef67029SMarek Vasut 	if (readl(&altspi->regs->status) & ALTERA_SPI_STATUS_RRDY_MSK)
147eef67029SMarek Vasut 		readl(&altspi->regs->rxdata);
14837dcc130SMarek Vasut 
149661ba140SThomas Chou 	if (flags & SPI_XFER_BEGIN)
150661ba140SThomas Chou 		spi_cs_activate(slave);
151661ba140SThomas Chou 
152661ba140SThomas Chou 	while (bytes--) {
153*bc76b821SMarek Vasut 		if (txp)
154*bc76b821SMarek Vasut 			data = *txp++;
155*bc76b821SMarek Vasut 		else
156*bc76b821SMarek Vasut 			data = CONFIG_ALTERA_SPI_IDLE_VAL;
15737dcc130SMarek Vasut 
158*bc76b821SMarek Vasut 		debug("%s: tx:%x ", __func__, data);
159*bc76b821SMarek Vasut 		writel(data, &altspi->regs->txdata);
16037dcc130SMarek Vasut 
16180d73338SMarek Vasut 		start = get_timer(0);
16280d73338SMarek Vasut 		while (1) {
16380d73338SMarek Vasut 			reg = readl(&altspi->regs->status);
16480d73338SMarek Vasut 			if (reg & ALTERA_SPI_STATUS_RRDY_MSK)
16580d73338SMarek Vasut 				break;
16680d73338SMarek Vasut 			if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
16780d73338SMarek Vasut 				printf("%s: Transmission timed out!\n", __func__);
16880d73338SMarek Vasut 				goto done;
16980d73338SMarek Vasut 			}
17080d73338SMarek Vasut 		}
17137dcc130SMarek Vasut 
172*bc76b821SMarek Vasut 		data = readl(&altspi->regs->rxdata);
173661ba140SThomas Chou 		if (rxp)
174*bc76b821SMarek Vasut 			*rxp++ = data & 0xff;
17537dcc130SMarek Vasut 
176*bc76b821SMarek Vasut 		debug("rx:%x\n", data);
177661ba140SThomas Chou 	}
17837dcc130SMarek Vasut 
179661ba140SThomas Chou done:
180661ba140SThomas Chou 	if (flags & SPI_XFER_END)
181661ba140SThomas Chou 		spi_cs_deactivate(slave);
182661ba140SThomas Chou 
183661ba140SThomas Chou 	return 0;
184661ba140SThomas Chou }
185