1menu "SPI Support" 2 3config DM_SPI 4 bool "Enable Driver Model for SPI drivers" 5 depends on DM 6 help 7 Enable driver model for SPI. The SPI slave interface 8 (spi_setup_slave(), spi_xfer(), etc.) is then implemented by 9 the SPI uclass. Drivers provide methods to access the SPI 10 buses that they control. The uclass interface is defined in 11 include/spi.h. The existing spi_slave structure is attached 12 as 'parent data' to every slave on each bus. Slaves 13 typically use driver-private data instead of extending the 14 spi_slave structure. 15 16config SPI_MEM 17 bool "SPI memory extension" 18 help 19 Enable this option if you want to enable the SPI memory extension. 20 This extension is meant to simplify interaction with SPI memories 21 by providing an high-level interface to send memory-like commands. 22 23if DM_SPI 24 25config ALTERA_SPI 26 bool "Altera SPI driver" 27 help 28 Enable the Altera SPI driver. This driver can be used to 29 access the SPI NOR flash on platforms embedding this Altera 30 IP core. Please find details on the "Embedded Peripherals IP 31 User Guide" of Altera. 32 33config ATH79_SPI 34 bool "Atheros SPI driver" 35 depends on ARCH_ATH79 36 help 37 Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used 38 to access SPI NOR flash and other SPI peripherals. This driver 39 uses driver model and requires a device tree binding to operate. 40 please refer to doc/device-tree-bindings/spi/spi-ath79.txt. 41 42config ATMEL_SPI 43 bool "Atmel SPI driver" 44 depends on ARCH_AT91 45 help 46 This enables driver for the Atmel SPI Controller, present on 47 many AT91 (ARM) chips. This driver can be used to access 48 the SPI Flash, such as AT25DF321. 49 50config BCM63XX_HSSPI 51 bool "BCM63XX HSSPI driver" 52 depends on ARCH_BMIPS 53 help 54 Enable the BCM6328 HSSPI driver. This driver can be used to 55 access the SPI NOR flash on platforms embedding this Broadcom 56 SPI core. 57 58config BCM63XX_SPI 59 bool "BCM6348 SPI driver" 60 depends on ARCH_BMIPS 61 help 62 Enable the BCM6348/BCM6358 SPI driver. This driver can be used to 63 access the SPI NOR flash on platforms embedding these Broadcom 64 SPI cores. 65 66config CADENCE_QSPI 67 bool "Cadence QSPI driver" 68 help 69 Enable the Cadence Quad-SPI (QSPI) driver. This driver can be 70 used to access the SPI NOR flash on platforms embedding this 71 Cadence IP core. 72 73config DESIGNWARE_SPI 74 bool "Designware SPI driver" 75 help 76 Enable the Designware SPI driver. This driver can be used to 77 access the SPI NOR flash on platforms embedding this Designware 78 IP core. 79 80config EXYNOS_SPI 81 bool "Samsung Exynos SPI driver" 82 help 83 Enable the Samsung Exynos SPI driver. This driver can be used to 84 access the SPI NOR flash on platforms embedding this Samsung 85 Exynos IP core. 86 87config FSL_DSPI 88 bool "Freescale DSPI driver" 89 help 90 Enable the Freescale DSPI driver. This driver can be used to 91 access the SPI NOR flash and SPI Data flash on platforms embedding 92 this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms 93 use this driver. 94 95config ICH_SPI 96 bool "Intel ICH SPI driver" 97 help 98 Enable the Intel ICH SPI driver. This driver can be used to 99 access the SPI NOR flash on platforms embedding this Intel 100 ICH IP core. 101 102config MVEBU_A3700_SPI 103 bool "Marvell Armada 3700 SPI driver" 104 help 105 Enable the Marvell Armada 3700 SPI driver. This driver can be 106 used to access the SPI NOR flash on platforms embedding this 107 Marvell IP core. 108 109config PIC32_SPI 110 bool "Microchip PIC32 SPI driver" 111 depends on MACH_PIC32 112 help 113 Enable the Microchip PIC32 SPI driver. This driver can be used 114 to access the SPI NOR flash, MMC-over-SPI on platforms based on 115 Microchip PIC32 family devices. 116 117config ROCKCHIP_SPI 118 bool "Rockchip SPI driver" 119 help 120 Enable the Rockchip SPI driver, used to access SPI NOR flash and 121 other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs. 122 This uses driver model and requires a device tree binding to 123 operate. 124 125config ROCKCHIP_SFC 126 bool "Rockchip SFC driver" 127 help 128 Enable the Rockchip SFC driver, used to access SPI NOR flash 129 on Rockchip SoCs. 130 This uses driver model and requires a device tree binding to 131 operate. 132 133config SANDBOX_SPI 134 bool "Sandbox SPI driver" 135 depends on SANDBOX && DM 136 help 137 Enable SPI support for sandbox. This is an emulation of a real SPI 138 bus. Devices can be attached to the bus using the device tree 139 which specifies the driver to use. As an example, see this device 140 tree fragment from sandbox.dts. It shows that the SPI bus has a 141 single flash device on chip select 0 which is emulated by the driver 142 for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c. 143 144 spi@0 { 145 #address-cells = <1>; 146 #size-cells = <0>; 147 reg = <0>; 148 compatible = "sandbox,spi"; 149 cs-gpios = <0>, <&gpio_a 0>; 150 flash@0 { 151 reg = <0>; 152 compatible = "spansion,m25p16", "sandbox,spi-flash"; 153 spi-max-frequency = <40000000>; 154 sandbox,filename = "spi.bin"; 155 }; 156 }; 157 158config STM32_QSPI 159 bool "STM32F7 QSPI driver" 160 depends on STM32F7 161 help 162 Enable the STM32F7 Quad-SPI (QSPI) driver. This driver can be 163 used to access the SPI NOR flash chips on platforms embedding 164 this ST IP core. 165 166config TEGRA114_SPI 167 bool "nVidia Tegra114 SPI driver" 168 help 169 Enable the nVidia Tegra114 SPI driver. This driver can be used to 170 access the SPI NOR flash on platforms embedding this nVidia Tegra114 171 IP core. 172 173 This controller is different than the older SoCs SPI controller and 174 also register interface get changed with this controller. 175 176config TEGRA20_SFLASH 177 bool "nVidia Tegra20 Serial Flash controller driver" 178 help 179 Enable the nVidia Tegra20 Serial Flash controller driver. This driver 180 can be used to access the SPI NOR flash on platforms embedding this 181 nVidia Tegra20 IP core. 182 183config TEGRA20_SLINK 184 bool "nVidia Tegra20/Tegra30 SLINK driver" 185 help 186 Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can 187 be used to access the SPI NOR flash on platforms embedding this 188 nVidia Tegra20/Tegra30 IP cores. 189 190config TEGRA210_QSPI 191 bool "nVidia Tegra210 QSPI driver" 192 help 193 Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver 194 be used to access SPI chips on platforms embedding this 195 NVIDIA Tegra210 IP core. 196 197config XILINX_SPI 198 bool "Xilinx SPI driver" 199 help 200 Enable the Xilinx SPI driver from the Xilinx EDK. This SPI 201 controller support 8 bit SPI transfers only, with or w/o FIFO. 202 For more info on Xilinx SPI Register Definitions and Overview 203 see driver file - drivers/spi/xilinx_spi.c 204 205config ZYNQ_SPI 206 bool "Zynq SPI driver" 207 depends on ARCH_ZYNQ || ARCH_ZYNQMP 208 help 209 Enable the Zynq SPI driver. This driver can be used to 210 access the SPI NOR flash on platforms embedding this Zynq 211 SPI IP core. 212 213config ZYNQ_QSPI 214 bool "Zynq QSPI driver" 215 depends on ARCH_ZYNQ 216 help 217 Enable the Zynq Quad-SPI (QSPI) driver. This driver can be 218 used to access the SPI NOR flash on platforms embedding this 219 Zynq QSPI IP core. This IP is used to connect the flash in 220 4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel. 221 222endif # if DM_SPI 223 224config SOFT_SPI 225 bool "Soft SPI driver" 226 help 227 Enable Soft SPI driver. This driver is to use GPIO simulate 228 the SPI protocol. 229 230config FSL_ESPI 231 bool "Freescale eSPI driver" 232 help 233 Enable the Freescale eSPI driver. This driver can be used to 234 access the SPI interface and SPI NOR flash on platforms embedding 235 this Freescale eSPI IP core. 236 237config FSL_QSPI 238 bool "Freescale QSPI driver" 239 help 240 Enable the Freescale Quad-SPI (QSPI) driver. This driver can be 241 used to access the SPI NOR flash on platforms embedding this 242 Freescale IP core. 243 244config ATCSPI200_SPI 245 bool "Andestech ATCSPI200 SPI driver" 246 help 247 Enable the Andestech ATCSPI200 SPI driver. This driver can be 248 used to access the SPI flash on AE3XX and AE250 platforms embedding 249 this Andestech IP core. 250 251config DAVINCI_SPI 252 bool "Davinci & Keystone SPI driver" 253 depends on ARCH_DAVINCI || ARCH_KEYSTONE 254 help 255 Enable the Davinci SPI driver 256 257config TI_QSPI 258 bool "TI QSPI driver" 259 help 260 Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms. 261 This driver support spi flash single, quad and memory reads. 262 263config MPC8XX_SPI 264 bool "MPC8XX SPI Driver" 265 depends on 8xx 266 help 267 Enable support for SPI on MPC8XX 268 269config OMAP3_SPI 270 bool "McSPI driver for OMAP" 271 help 272 SPI master controller for OMAP24XX and later Multichannel SPI 273 (McSPI). This driver be used to access SPI chips on platforms 274 embedding this OMAP3 McSPI IP core. 275 276endmenu # menu "SPI Support" 277