xref: /rk3399_rockchip-uboot/drivers/sound/rk817_codec.c (revision 4afb7f9c57158713fb4381cb9584975983abac3b)
1*4afb7f9cSSugar Zhang // SPDX-License-Identifier:     GPL-2.0+
2*4afb7f9cSSugar Zhang /*
3*4afb7f9cSSugar Zhang  * (C) Copyright 2018 Rockchip Electronics Co., Ltd
4*4afb7f9cSSugar Zhang  */
5*4afb7f9cSSugar Zhang 
6*4afb7f9cSSugar Zhang #include <common.h>
7*4afb7f9cSSugar Zhang #include <dm.h>
8*4afb7f9cSSugar Zhang #include <power/pmic.h>
9*4afb7f9cSSugar Zhang #include <power/rk8xx_pmic.h>
10*4afb7f9cSSugar Zhang #include <sound.h>
11*4afb7f9cSSugar Zhang #include "rk817_codec.h"
12*4afb7f9cSSugar Zhang 
13*4afb7f9cSSugar Zhang #define DBG(format, ...) \
14*4afb7f9cSSugar Zhang 		printf("RK817: " format, ## __VA_ARGS__)
15*4afb7f9cSSugar Zhang 
16*4afb7f9cSSugar Zhang /* For route */
17*4afb7f9cSSugar Zhang #define RK817_CODEC_PLAYBACK	1
18*4afb7f9cSSugar Zhang #define RK817_CODEC_CAPTURE	2
19*4afb7f9cSSugar Zhang #define RK817_CODEC_INCALL	4
20*4afb7f9cSSugar Zhang #define RK817_CODEC_ALL	(RK817_CODEC_PLAYBACK |\
21*4afb7f9cSSugar Zhang 	RK817_CODEC_CAPTURE | RK817_CODEC_INCALL)
22*4afb7f9cSSugar Zhang 
23*4afb7f9cSSugar Zhang /*
24*4afb7f9cSSugar Zhang  * DDAC L/R volume setting
25*4afb7f9cSSugar Zhang  * 0db~-95db,0.375db/step,for example:
26*4afb7f9cSSugar Zhang  * 0: 0dB
27*4afb7f9cSSugar Zhang  * 0x0a: -3.75dB
28*4afb7f9cSSugar Zhang  * 0x7d: -46dB
29*4afb7f9cSSugar Zhang  * 0xff: -95dB
30*4afb7f9cSSugar Zhang  */
31*4afb7f9cSSugar Zhang #define OUT_VOLUME	(0x03)
32*4afb7f9cSSugar Zhang 
33*4afb7f9cSSugar Zhang #define CODEC_SET_SPK 1
34*4afb7f9cSSugar Zhang #define CODEC_SET_HP 2
35*4afb7f9cSSugar Zhang #define INITIAL_VOLUME	3
36*4afb7f9cSSugar Zhang 
37*4afb7f9cSSugar Zhang struct rk817_codec_priv {
38*4afb7f9cSSugar Zhang 	struct udevice *dev;
39*4afb7f9cSSugar Zhang 	struct rk8xx_priv *rk817;
40*4afb7f9cSSugar Zhang 	unsigned int stereo_sysclk;
41*4afb7f9cSSugar Zhang 	unsigned int rate;
42*4afb7f9cSSugar Zhang 	unsigned int spk_volume;
43*4afb7f9cSSugar Zhang 	unsigned int hp_volume;
44*4afb7f9cSSugar Zhang 	bool use_ext_amplifier;
45*4afb7f9cSSugar Zhang 	long int playback_path;
46*4afb7f9cSSugar Zhang 	int spk_mute_delay;
47*4afb7f9cSSugar Zhang 	int hp_mute_delay;
48*4afb7f9cSSugar Zhang };
49*4afb7f9cSSugar Zhang 
snd_soc_write(struct udevice * dev,unsigned int reg,unsigned int val)50*4afb7f9cSSugar Zhang static int snd_soc_write(struct udevice *dev, unsigned int reg,
51*4afb7f9cSSugar Zhang 			 unsigned int val)
52*4afb7f9cSSugar Zhang {
53*4afb7f9cSSugar Zhang 	return pmic_reg_write(dev, reg, val);
54*4afb7f9cSSugar Zhang }
55*4afb7f9cSSugar Zhang 
snd_soc_update_bits(struct udevice * dev,unsigned int reg,unsigned int mask,unsigned int value)56*4afb7f9cSSugar Zhang static int snd_soc_update_bits(struct udevice *dev, unsigned int reg,
57*4afb7f9cSSugar Zhang 			       unsigned int mask, unsigned int value)
58*4afb7f9cSSugar Zhang {
59*4afb7f9cSSugar Zhang 	return pmic_clrsetbits(dev, reg, mask, value);
60*4afb7f9cSSugar Zhang }
61*4afb7f9cSSugar Zhang 
rk817_reset(struct rk817_codec_priv * priv)62*4afb7f9cSSugar Zhang static int rk817_reset(struct rk817_codec_priv *priv)
63*4afb7f9cSSugar Zhang {
64*4afb7f9cSSugar Zhang 	struct udevice *codec = priv->dev->parent;
65*4afb7f9cSSugar Zhang 
66*4afb7f9cSSugar Zhang 	snd_soc_write(codec, RK817_CODEC_DTOP_LPT_SRST, 0x40);
67*4afb7f9cSSugar Zhang 	snd_soc_write(codec, RK817_CODEC_DDAC_POPD_DACST, 0x02);
68*4afb7f9cSSugar Zhang 
69*4afb7f9cSSugar Zhang 	return 0;
70*4afb7f9cSSugar Zhang }
71*4afb7f9cSSugar Zhang 
72*4afb7f9cSSugar Zhang static struct rk817_reg_val_typ playback_power_up_list[] = {
73*4afb7f9cSSugar Zhang 	{RK817_CODEC_AREF_RTCFG1, 0x40},
74*4afb7f9cSSugar Zhang 	{RK817_CODEC_DDAC_POPD_DACST, 0x02},
75*4afb7f9cSSugar Zhang 	{RK817_CODEC_DDAC_SR_LMT0, 0x02},
76*4afb7f9cSSugar Zhang 	/* {RK817_CODEC_DTOP_DIGEN_CLKE, 0x0f}, */
77*4afb7f9cSSugar Zhang 	/* APLL */
78*4afb7f9cSSugar Zhang 	{RK817_CODEC_APLL_CFG0, 0x04},
79*4afb7f9cSSugar Zhang 	{RK817_CODEC_APLL_CFG1, 0x58},
80*4afb7f9cSSugar Zhang 	{RK817_CODEC_APLL_CFG2, 0x2d},
81*4afb7f9cSSugar Zhang 	{RK817_CODEC_APLL_CFG3, 0x0c},
82*4afb7f9cSSugar Zhang 	{RK817_CODEC_APLL_CFG4, 0xa5},
83*4afb7f9cSSugar Zhang 	{RK817_CODEC_APLL_CFG5, 0x00},
84*4afb7f9cSSugar Zhang 
85*4afb7f9cSSugar Zhang 	{RK817_CODEC_DI2S_RXCMD_TSD, 0x00},
86*4afb7f9cSSugar Zhang 	{RK817_CODEC_DI2S_RSD, 0x00},
87*4afb7f9cSSugar Zhang 	/* {RK817_CODEC_DI2S_CKM, 0x00}, */
88*4afb7f9cSSugar Zhang 	{RK817_CODEC_DI2S_RXCR1, 0x00},
89*4afb7f9cSSugar Zhang 	{RK817_CODEC_DI2S_RXCMD_TSD, 0x20},
90*4afb7f9cSSugar Zhang 	{RK817_CODEC_DTOP_VUCTIME, 0xf4},
91*4afb7f9cSSugar Zhang 	{RK817_CODEC_DDAC_MUTE_MIXCTL, 0x00},
92*4afb7f9cSSugar Zhang 
93*4afb7f9cSSugar Zhang 	{RK817_CODEC_DDAC_VOLL, 0x0a},
94*4afb7f9cSSugar Zhang 	{RK817_CODEC_DDAC_VOLR, 0x0a},
95*4afb7f9cSSugar Zhang };
96*4afb7f9cSSugar Zhang 
97*4afb7f9cSSugar Zhang #define RK817_CODEC_PLAYBACK_POWER_UP_LIST_LEN \
98*4afb7f9cSSugar Zhang 	ARRAY_SIZE(playback_power_up_list)
99*4afb7f9cSSugar Zhang 
100*4afb7f9cSSugar Zhang static struct rk817_reg_val_typ playback_power_down_list[] = {
101*4afb7f9cSSugar Zhang 	{RK817_CODEC_DDAC_MUTE_MIXCTL, 0x01},
102*4afb7f9cSSugar Zhang 	{RK817_CODEC_ADAC_CFG1, 0x0f},
103*4afb7f9cSSugar Zhang 	/* HP */
104*4afb7f9cSSugar Zhang 	{RK817_CODEC_AHP_CFG0, 0xe0},
105*4afb7f9cSSugar Zhang 	{RK817_CODEC_AHP_CP, 0x09},
106*4afb7f9cSSugar Zhang 	/* SPK */
107*4afb7f9cSSugar Zhang 	{RK817_CODEC_ACLASSD_CFG1, 0x69},
108*4afb7f9cSSugar Zhang };
109*4afb7f9cSSugar Zhang 
110*4afb7f9cSSugar Zhang #define RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN \
111*4afb7f9cSSugar Zhang 	ARRAY_SIZE(playback_power_down_list)
112*4afb7f9cSSugar Zhang 
rk817_codec_power_up(struct rk817_codec_priv * rk817,int type)113*4afb7f9cSSugar Zhang static int rk817_codec_power_up(struct rk817_codec_priv *rk817, int type)
114*4afb7f9cSSugar Zhang {
115*4afb7f9cSSugar Zhang 	struct udevice *codec = rk817->dev->parent;
116*4afb7f9cSSugar Zhang 	int i;
117*4afb7f9cSSugar Zhang 
118*4afb7f9cSSugar Zhang 	DBG("%s : power up %s %s %s\n", __func__,
119*4afb7f9cSSugar Zhang 	    type & RK817_CODEC_PLAYBACK ? "playback" : "",
120*4afb7f9cSSugar Zhang 	    type & RK817_CODEC_CAPTURE ? "capture" : "",
121*4afb7f9cSSugar Zhang 	    type & RK817_CODEC_INCALL ? "incall" : "");
122*4afb7f9cSSugar Zhang 
123*4afb7f9cSSugar Zhang 	if (type & RK817_CODEC_PLAYBACK) {
124*4afb7f9cSSugar Zhang 		snd_soc_update_bits(codec, RK817_CODEC_DTOP_DIGEN_CLKE,
125*4afb7f9cSSugar Zhang 				    DAC_DIG_CLK_MASK, DAC_DIG_CLK_EN);
126*4afb7f9cSSugar Zhang 		for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_UP_LIST_LEN; i++) {
127*4afb7f9cSSugar Zhang 			snd_soc_write(codec, playback_power_up_list[i].reg,
128*4afb7f9cSSugar Zhang 				      playback_power_up_list[i].value);
129*4afb7f9cSSugar Zhang 		}
130*4afb7f9cSSugar Zhang 	}
131*4afb7f9cSSugar Zhang 
132*4afb7f9cSSugar Zhang 	return 0;
133*4afb7f9cSSugar Zhang }
134*4afb7f9cSSugar Zhang 
rk817_codec_power_down(struct rk817_codec_priv * rk817,int type)135*4afb7f9cSSugar Zhang static int rk817_codec_power_down(struct rk817_codec_priv *rk817, int type)
136*4afb7f9cSSugar Zhang {
137*4afb7f9cSSugar Zhang 	struct udevice *codec = rk817->dev->parent;
138*4afb7f9cSSugar Zhang 	int i;
139*4afb7f9cSSugar Zhang 
140*4afb7f9cSSugar Zhang 	DBG("%s : power down %s %s %s\n", __func__,
141*4afb7f9cSSugar Zhang 	    type & RK817_CODEC_PLAYBACK ? "playback" : "",
142*4afb7f9cSSugar Zhang 	    type & RK817_CODEC_CAPTURE ? "capture" : "",
143*4afb7f9cSSugar Zhang 	    type & RK817_CODEC_INCALL ? "incall" : "");
144*4afb7f9cSSugar Zhang 
145*4afb7f9cSSugar Zhang 	/* mute output for pop noise */
146*4afb7f9cSSugar Zhang 	if ((type & RK817_CODEC_PLAYBACK) ||
147*4afb7f9cSSugar Zhang 	    (type & RK817_CODEC_INCALL)) {
148*4afb7f9cSSugar Zhang 		snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
149*4afb7f9cSSugar Zhang 				    DACMT_ENABLE, DACMT_ENABLE);
150*4afb7f9cSSugar Zhang 	}
151*4afb7f9cSSugar Zhang 
152*4afb7f9cSSugar Zhang 	if (type & RK817_CODEC_PLAYBACK) {
153*4afb7f9cSSugar Zhang 		for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN; i++) {
154*4afb7f9cSSugar Zhang 			snd_soc_write(codec, playback_power_down_list[i].reg,
155*4afb7f9cSSugar Zhang 				      playback_power_down_list[i].value);
156*4afb7f9cSSugar Zhang 		}
157*4afb7f9cSSugar Zhang 		snd_soc_update_bits(codec, RK817_CODEC_DTOP_DIGEN_CLKE,
158*4afb7f9cSSugar Zhang 				    DAC_DIG_CLK_MASK, DAC_DIG_CLK_DIS);
159*4afb7f9cSSugar Zhang 	}
160*4afb7f9cSSugar Zhang 
161*4afb7f9cSSugar Zhang 	if (type == RK817_CODEC_ALL) {
162*4afb7f9cSSugar Zhang 		for (i = 0; i < RK817_CODEC_PLAYBACK_POWER_DOWN_LIST_LEN; i++) {
163*4afb7f9cSSugar Zhang 			snd_soc_write(codec, playback_power_down_list[i].reg,
164*4afb7f9cSSugar Zhang 				      playback_power_down_list[i].value);
165*4afb7f9cSSugar Zhang 		}
166*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_DTOP_DIGEN_CLKE, 0x00);
167*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_APLL_CFG5, 0x01);
168*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_AREF_RTCFG1, 0x06);
169*4afb7f9cSSugar Zhang 	}
170*4afb7f9cSSugar Zhang 
171*4afb7f9cSSugar Zhang 	return 0;
172*4afb7f9cSSugar Zhang }
173*4afb7f9cSSugar Zhang 
rk817_playback_path_put(struct rk817_codec_priv * rk817,int path)174*4afb7f9cSSugar Zhang static int rk817_playback_path_put(struct rk817_codec_priv *rk817, int path)
175*4afb7f9cSSugar Zhang {
176*4afb7f9cSSugar Zhang 	struct udevice *codec = rk817->dev->parent;
177*4afb7f9cSSugar Zhang 	long int pre_path;
178*4afb7f9cSSugar Zhang 
179*4afb7f9cSSugar Zhang 	if (rk817->playback_path == path) {
180*4afb7f9cSSugar Zhang 		DBG("%s : playback_path is not changed!\n", __func__);
181*4afb7f9cSSugar Zhang 		return 0;
182*4afb7f9cSSugar Zhang 	}
183*4afb7f9cSSugar Zhang 
184*4afb7f9cSSugar Zhang 	pre_path = rk817->playback_path;
185*4afb7f9cSSugar Zhang 	rk817->playback_path = path;
186*4afb7f9cSSugar Zhang 
187*4afb7f9cSSugar Zhang 	DBG("%s : set playback_path %ld, pre_path %ld\n",
188*4afb7f9cSSugar Zhang 	    __func__, rk817->playback_path, pre_path);
189*4afb7f9cSSugar Zhang 
190*4afb7f9cSSugar Zhang 	switch (rk817->playback_path) {
191*4afb7f9cSSugar Zhang 	case OFF:
192*4afb7f9cSSugar Zhang 		rk817_codec_power_down(rk817, RK817_CODEC_PLAYBACK);
193*4afb7f9cSSugar Zhang 		break;
194*4afb7f9cSSugar Zhang 	case RCV:
195*4afb7f9cSSugar Zhang 	case SPK_PATH:
196*4afb7f9cSSugar Zhang 	case RING_SPK:
197*4afb7f9cSSugar Zhang 		if (pre_path == OFF)
198*4afb7f9cSSugar Zhang 			rk817_codec_power_up(rk817, RK817_CODEC_PLAYBACK);
199*4afb7f9cSSugar Zhang 		if (!rk817->use_ext_amplifier) {
200*4afb7f9cSSugar Zhang 			/* power on dac ibias/l/r */
201*4afb7f9cSSugar Zhang 			snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
202*4afb7f9cSSugar Zhang 				      PWD_DACBIAS_ON | PWD_DACD_ON |
203*4afb7f9cSSugar Zhang 				      PWD_DACL_ON | PWD_DACR_ON);
204*4afb7f9cSSugar Zhang 			/* CLASS D mode */
205*4afb7f9cSSugar Zhang 			snd_soc_write(codec, RK817_CODEC_DDAC_MUTE_MIXCTL, 0x10);
206*4afb7f9cSSugar Zhang 			/* CLASS D enable */
207*4afb7f9cSSugar Zhang 			snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG1, 0xa5);
208*4afb7f9cSSugar Zhang 			/* restart CLASS D, OCPP/N */
209*4afb7f9cSSugar Zhang 			snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG2, 0xc4);
210*4afb7f9cSSugar Zhang 		} else {
211*4afb7f9cSSugar Zhang 			/* HP_CP_EN , CP 2.3V */
212*4afb7f9cSSugar Zhang 			snd_soc_write(codec, RK817_CODEC_AHP_CP, 0x11);
213*4afb7f9cSSugar Zhang 			/* power on HP two stage opamp ,HP amplitude 0db */
214*4afb7f9cSSugar Zhang 			snd_soc_write(codec, RK817_CODEC_AHP_CFG0, 0x80);
215*4afb7f9cSSugar Zhang 			/* power on dac ibias/l/r */
216*4afb7f9cSSugar Zhang 			snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
217*4afb7f9cSSugar Zhang 				      PWD_DACBIAS_ON | PWD_DACD_DOWN |
218*4afb7f9cSSugar Zhang 				      PWD_DACL_ON | PWD_DACR_ON);
219*4afb7f9cSSugar Zhang 			snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
220*4afb7f9cSSugar Zhang 					    DACMT_ENABLE, DACMT_DISABLE);
221*4afb7f9cSSugar Zhang 		}
222*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_DDAC_VOLL, rk817->spk_volume);
223*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_DDAC_VOLR, rk817->spk_volume);
224*4afb7f9cSSugar Zhang 		break;
225*4afb7f9cSSugar Zhang 	case HP_PATH:
226*4afb7f9cSSugar Zhang 	case HP_NO_MIC:
227*4afb7f9cSSugar Zhang 	case RING_HP:
228*4afb7f9cSSugar Zhang 	case RING_HP_NO_MIC:
229*4afb7f9cSSugar Zhang 		if (pre_path == OFF)
230*4afb7f9cSSugar Zhang 			rk817_codec_power_up(rk817, RK817_CODEC_PLAYBACK);
231*4afb7f9cSSugar Zhang 		/* HP_CP_EN , CP 2.3V */
232*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_AHP_CP, 0x11);
233*4afb7f9cSSugar Zhang 		/* power on HP two stage opamp ,HP amplitude 0db */
234*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_AHP_CFG0, 0x80);
235*4afb7f9cSSugar Zhang 		/* power on dac ibias/l/r */
236*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
237*4afb7f9cSSugar Zhang 			      PWD_DACBIAS_ON | PWD_DACD_DOWN |
238*4afb7f9cSSugar Zhang 			      PWD_DACL_ON | PWD_DACR_ON);
239*4afb7f9cSSugar Zhang 		snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
240*4afb7f9cSSugar Zhang 				    DACMT_ENABLE, DACMT_DISABLE);
241*4afb7f9cSSugar Zhang 
242*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_DDAC_VOLL, rk817->hp_volume);
243*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_DDAC_VOLR, rk817->hp_volume);
244*4afb7f9cSSugar Zhang 		break;
245*4afb7f9cSSugar Zhang 	case BT:
246*4afb7f9cSSugar Zhang 		break;
247*4afb7f9cSSugar Zhang 	case SPK_HP:
248*4afb7f9cSSugar Zhang 	case RING_SPK_HP:
249*4afb7f9cSSugar Zhang 		if (pre_path == OFF)
250*4afb7f9cSSugar Zhang 			rk817_codec_power_up(rk817, RK817_CODEC_PLAYBACK);
251*4afb7f9cSSugar Zhang 
252*4afb7f9cSSugar Zhang 		/* HP_CP_EN , CP 2.3V  */
253*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_AHP_CP, 0x11);
254*4afb7f9cSSugar Zhang 		/* power on HP two stage opamp ,HP amplitude 0db */
255*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_AHP_CFG0, 0x80);
256*4afb7f9cSSugar Zhang 
257*4afb7f9cSSugar Zhang 		/* power on dac ibias/l/r */
258*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_ADAC_CFG1,
259*4afb7f9cSSugar Zhang 			      PWD_DACBIAS_ON | PWD_DACD_ON |
260*4afb7f9cSSugar Zhang 			      PWD_DACL_ON | PWD_DACR_ON);
261*4afb7f9cSSugar Zhang 
262*4afb7f9cSSugar Zhang 		if (!rk817->use_ext_amplifier) {
263*4afb7f9cSSugar Zhang 			/* CLASS D mode */
264*4afb7f9cSSugar Zhang 			snd_soc_write(codec, RK817_CODEC_DDAC_MUTE_MIXCTL, 0x10);
265*4afb7f9cSSugar Zhang 			/* CLASS D enable */
266*4afb7f9cSSugar Zhang 			snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG1, 0xa5);
267*4afb7f9cSSugar Zhang 			/* restart CLASS D, OCPP/N */
268*4afb7f9cSSugar Zhang 			snd_soc_write(codec, RK817_CODEC_ACLASSD_CFG2, 0xc4);
269*4afb7f9cSSugar Zhang 		}
270*4afb7f9cSSugar Zhang 
271*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_DDAC_VOLL, rk817->hp_volume);
272*4afb7f9cSSugar Zhang 		snd_soc_write(codec, RK817_CODEC_DDAC_VOLR, rk817->hp_volume);
273*4afb7f9cSSugar Zhang 		break;
274*4afb7f9cSSugar Zhang 	default:
275*4afb7f9cSSugar Zhang 		return -EINVAL;
276*4afb7f9cSSugar Zhang 	}
277*4afb7f9cSSugar Zhang 
278*4afb7f9cSSugar Zhang 	return 0;
279*4afb7f9cSSugar Zhang }
280*4afb7f9cSSugar Zhang 
rk817_hw_params(struct udevice * dev,unsigned int samplerate,unsigned int fmt,unsigned int channels)281*4afb7f9cSSugar Zhang static int rk817_hw_params(struct udevice *dev, unsigned int samplerate,
282*4afb7f9cSSugar Zhang 			   unsigned int fmt, unsigned int channels)
283*4afb7f9cSSugar Zhang {
284*4afb7f9cSSugar Zhang 	struct rk817_codec_priv *rk817 = dev_get_priv(dev);
285*4afb7f9cSSugar Zhang 	struct udevice *codec = rk817->dev->parent;
286*4afb7f9cSSugar Zhang 
287*4afb7f9cSSugar Zhang 	snd_soc_update_bits(codec, RK817_CODEC_DI2S_CKM,
288*4afb7f9cSSugar Zhang 			    RK817_I2S_MODE_MASK, RK817_I2S_MODE_SLV);
289*4afb7f9cSSugar Zhang 	snd_soc_write(codec, RK817_CODEC_DI2S_RXCR2, VDW_RX_16BITS);
290*4afb7f9cSSugar Zhang 	snd_soc_write(codec, RK817_CODEC_DI2S_TXCR2, VDW_TX_16BITS);
291*4afb7f9cSSugar Zhang 
292*4afb7f9cSSugar Zhang 	return 0;
293*4afb7f9cSSugar Zhang }
294*4afb7f9cSSugar Zhang 
rk817_digital_mute(struct rk817_codec_priv * rk817,int mute)295*4afb7f9cSSugar Zhang static int rk817_digital_mute(struct rk817_codec_priv *rk817, int mute)
296*4afb7f9cSSugar Zhang {
297*4afb7f9cSSugar Zhang 	struct udevice *codec = rk817->dev->parent;
298*4afb7f9cSSugar Zhang 
299*4afb7f9cSSugar Zhang 	if (mute)
300*4afb7f9cSSugar Zhang 		snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
301*4afb7f9cSSugar Zhang 				    DACMT_ENABLE, DACMT_ENABLE);
302*4afb7f9cSSugar Zhang 	else
303*4afb7f9cSSugar Zhang 		snd_soc_update_bits(codec, RK817_CODEC_DDAC_MUTE_MIXCTL,
304*4afb7f9cSSugar Zhang 				    DACMT_ENABLE, DACMT_DISABLE);
305*4afb7f9cSSugar Zhang 
306*4afb7f9cSSugar Zhang 	return 0;
307*4afb7f9cSSugar Zhang }
308*4afb7f9cSSugar Zhang 
rk817_startup(struct udevice * dev)309*4afb7f9cSSugar Zhang static int rk817_startup(struct udevice *dev)
310*4afb7f9cSSugar Zhang {
311*4afb7f9cSSugar Zhang 	struct rk817_codec_priv *rk817 = dev_get_priv(dev);
312*4afb7f9cSSugar Zhang 
313*4afb7f9cSSugar Zhang 	rk817_playback_path_put(rk817, SPK_HP);
314*4afb7f9cSSugar Zhang 	rk817_digital_mute(rk817, 0);
315*4afb7f9cSSugar Zhang 
316*4afb7f9cSSugar Zhang 	return 0;
317*4afb7f9cSSugar Zhang }
318*4afb7f9cSSugar Zhang 
319*4afb7f9cSSugar Zhang static const struct snd_soc_dai_ops rk817_codec_ops = {
320*4afb7f9cSSugar Zhang 	.hw_params = rk817_hw_params,
321*4afb7f9cSSugar Zhang 	.startup = rk817_startup,
322*4afb7f9cSSugar Zhang };
323*4afb7f9cSSugar Zhang 
rk817_codec_probe(struct udevice * dev)324*4afb7f9cSSugar Zhang static int rk817_codec_probe(struct udevice *dev)
325*4afb7f9cSSugar Zhang {
326*4afb7f9cSSugar Zhang 	struct rk8xx_priv *rk817 = dev_get_priv(dev->parent);
327*4afb7f9cSSugar Zhang 	struct rk817_codec_priv *rk817_codec = dev_get_priv(dev);
328*4afb7f9cSSugar Zhang 
329*4afb7f9cSSugar Zhang 	if (!rk817) {
330*4afb7f9cSSugar Zhang 		printf("%s : rk817 is null\n", __func__);
331*4afb7f9cSSugar Zhang 		return -EINVAL;
332*4afb7f9cSSugar Zhang 	}
333*4afb7f9cSSugar Zhang 
334*4afb7f9cSSugar Zhang 	switch (rk817->variant) {
335*4afb7f9cSSugar Zhang 	case RK809_ID:
336*4afb7f9cSSugar Zhang 	case RK817_ID:
337*4afb7f9cSSugar Zhang 		break;
338*4afb7f9cSSugar Zhang 	default:
339*4afb7f9cSSugar Zhang 		return -EINVAL;
340*4afb7f9cSSugar Zhang 	}
341*4afb7f9cSSugar Zhang 
342*4afb7f9cSSugar Zhang 	rk817_codec->dev = dev;
343*4afb7f9cSSugar Zhang 	rk817_codec->hp_volume = INITIAL_VOLUME;
344*4afb7f9cSSugar Zhang 	rk817_codec->spk_volume = INITIAL_VOLUME;
345*4afb7f9cSSugar Zhang 	rk817_codec->playback_path = OFF;
346*4afb7f9cSSugar Zhang 	rk817_reset(rk817_codec);
347*4afb7f9cSSugar Zhang 
348*4afb7f9cSSugar Zhang 	return 0;
349*4afb7f9cSSugar Zhang }
350*4afb7f9cSSugar Zhang 
351*4afb7f9cSSugar Zhang static const struct udevice_id rk817_codec_ids[] = {
352*4afb7f9cSSugar Zhang 	{ .compatible = "rockchip,rk817-codec" },
353*4afb7f9cSSugar Zhang 	{ }
354*4afb7f9cSSugar Zhang };
355*4afb7f9cSSugar Zhang 
356*4afb7f9cSSugar Zhang U_BOOT_DRIVER(rk817) = {
357*4afb7f9cSSugar Zhang 	.name = "rk817_codec",
358*4afb7f9cSSugar Zhang 	.id = UCLASS_CODEC,
359*4afb7f9cSSugar Zhang 	.of_match = rk817_codec_ids,
360*4afb7f9cSSugar Zhang 	.probe = rk817_codec_probe,
361*4afb7f9cSSugar Zhang 	.priv_auto_alloc_size = sizeof(struct rk817_codec_priv),
362*4afb7f9cSSugar Zhang 	.ops = &rk817_codec_ops,
363*4afb7f9cSSugar Zhang };
364*4afb7f9cSSugar Zhang 
365*4afb7f9cSSugar Zhang UCLASS_DRIVER(codec) = {
366*4afb7f9cSSugar Zhang 	.id = UCLASS_CODEC,
367*4afb7f9cSSugar Zhang 	.name = "codec",
368*4afb7f9cSSugar Zhang };
369