xref: /rk3399_rockchip-uboot/drivers/serial/serial_xuartlite.c (revision 49a23e4a414ef9cfb92b1de193d7fa700fb55bf1)
11378df79SJean-Christophe PLAGNIOL-VILLARD /*
2*49a23e4aSMichal Simek  * (C) Copyright 2008-2011 Michal Simek <monstr@monstr.eu>
353ea981cSMichal Simek  * Clean driver and add xilinx constant from header file
41378df79SJean-Christophe PLAGNIOL-VILLARD  *
553ea981cSMichal Simek  * (C) Copyright 2004 Atmark Techno, Inc.
61378df79SJean-Christophe PLAGNIOL-VILLARD  * Yasushi SHOJI <yashi@atmark-techno.com>
71378df79SJean-Christophe PLAGNIOL-VILLARD  *
81378df79SJean-Christophe PLAGNIOL-VILLARD  * See file CREDITS for list of people who contributed to this
91378df79SJean-Christophe PLAGNIOL-VILLARD  * project.
101378df79SJean-Christophe PLAGNIOL-VILLARD  *
111378df79SJean-Christophe PLAGNIOL-VILLARD  * This program is free software; you can redistribute it and/or
121378df79SJean-Christophe PLAGNIOL-VILLARD  * modify it under the terms of the GNU General Public License as
131378df79SJean-Christophe PLAGNIOL-VILLARD  * published by the Free Software Foundation; either version 2 of
141378df79SJean-Christophe PLAGNIOL-VILLARD  * the License, or (at your option) any later version.
151378df79SJean-Christophe PLAGNIOL-VILLARD  *
161378df79SJean-Christophe PLAGNIOL-VILLARD  * This program is distributed in the hope that it will be useful,
171378df79SJean-Christophe PLAGNIOL-VILLARD  * but WITHOUT ANY WARRANTY; without even the implied warranty of
181378df79SJean-Christophe PLAGNIOL-VILLARD  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
191378df79SJean-Christophe PLAGNIOL-VILLARD  * GNU General Public License for more details.
201378df79SJean-Christophe PLAGNIOL-VILLARD  *
211378df79SJean-Christophe PLAGNIOL-VILLARD  * You should have received a copy of the GNU General Public License
221378df79SJean-Christophe PLAGNIOL-VILLARD  * along with this program; if not, write to the Free Software
231378df79SJean-Christophe PLAGNIOL-VILLARD  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
241378df79SJean-Christophe PLAGNIOL-VILLARD  * MA 02111-1307 USA
251378df79SJean-Christophe PLAGNIOL-VILLARD  */
261378df79SJean-Christophe PLAGNIOL-VILLARD 
271378df79SJean-Christophe PLAGNIOL-VILLARD #include <config.h>
28*49a23e4aSMichal Simek #include <common.h>
2953ea981cSMichal Simek #include <asm/io.h>
30*49a23e4aSMichal Simek #include <linux/compiler.h>
31*49a23e4aSMichal Simek #include <serial.h>
321378df79SJean-Christophe PLAGNIOL-VILLARD 
3353ea981cSMichal Simek #define SR_TX_FIFO_FULL		0x08 /* transmit FIFO full */
3453ea981cSMichal Simek #define SR_RX_FIFO_VALID_DATA	0x01 /* data in receive FIFO */
3553ea981cSMichal Simek #define SR_RX_FIFO_FULL		0x02 /* receive FIFO full */
361378df79SJean-Christophe PLAGNIOL-VILLARD 
37*49a23e4aSMichal Simek struct uartlite {
38*49a23e4aSMichal Simek 	unsigned int rx_fifo;
39*49a23e4aSMichal Simek 	unsigned int tx_fifo;
40*49a23e4aSMichal Simek 	unsigned int status;
41*49a23e4aSMichal Simek };
421378df79SJean-Christophe PLAGNIOL-VILLARD 
43*49a23e4aSMichal Simek static const struct uartlite *userial_ports[4] = {
44*49a23e4aSMichal Simek #ifdef XILINX_UARTLITE_BASEADDR
45*49a23e4aSMichal Simek 	[0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR,
46*49a23e4aSMichal Simek #endif
47*49a23e4aSMichal Simek #ifdef XILINX_UARTLITE_BASEADDR1
48*49a23e4aSMichal Simek 	[1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1,
49*49a23e4aSMichal Simek #endif
50*49a23e4aSMichal Simek #ifdef XILINX_UARTLITE_BASEADDR2
51*49a23e4aSMichal Simek 	[2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2,
52*49a23e4aSMichal Simek #endif
53*49a23e4aSMichal Simek #ifdef XILINX_UARTLITE_BASEADDR3
54*49a23e4aSMichal Simek 	[3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3
55*49a23e4aSMichal Simek #endif
56*49a23e4aSMichal Simek };
57*49a23e4aSMichal Simek 
58*49a23e4aSMichal Simek void uartlite_serial_putc(const char c, const int port)
59*49a23e4aSMichal Simek {
60*49a23e4aSMichal Simek 	struct uartlite *regs = userial_ports[port];
61*49a23e4aSMichal Simek 
62*49a23e4aSMichal Simek 	if (c == '\n')
63*49a23e4aSMichal Simek 		uartlite_serial_putc('\r', port);
64*49a23e4aSMichal Simek 
65*49a23e4aSMichal Simek 	while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
66*49a23e4aSMichal Simek 		;
67*49a23e4aSMichal Simek 	out_be32(&regs->tx_fifo, c & 0xff);
68*49a23e4aSMichal Simek }
69*49a23e4aSMichal Simek 
70*49a23e4aSMichal Simek void uartlite_serial_puts(const char *s, const int port)
71*49a23e4aSMichal Simek {
72*49a23e4aSMichal Simek 	while (*s)
73*49a23e4aSMichal Simek 		uartlite_serial_putc(*s++, port);
74*49a23e4aSMichal Simek }
75*49a23e4aSMichal Simek 
76*49a23e4aSMichal Simek int uartlite_serial_getc(const int port)
77*49a23e4aSMichal Simek {
78*49a23e4aSMichal Simek 	struct uartlite *regs = userial_ports[port];
79*49a23e4aSMichal Simek 
80*49a23e4aSMichal Simek 	while (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
81*49a23e4aSMichal Simek 		;
82*49a23e4aSMichal Simek 	return in_be32(&regs->rx_fifo) & 0xff;
83*49a23e4aSMichal Simek }
84*49a23e4aSMichal Simek 
85*49a23e4aSMichal Simek int uartlite_serial_tstc(const int port)
86*49a23e4aSMichal Simek {
87*49a23e4aSMichal Simek 	struct uartlite *regs = userial_ports[port];
88*49a23e4aSMichal Simek 
89*49a23e4aSMichal Simek 	return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
90*49a23e4aSMichal Simek }
91*49a23e4aSMichal Simek 
92*49a23e4aSMichal Simek #if !defined(CONFIG_SERIAL_MULTI)
931378df79SJean-Christophe PLAGNIOL-VILLARD int serial_init(void)
941378df79SJean-Christophe PLAGNIOL-VILLARD {
951378df79SJean-Christophe PLAGNIOL-VILLARD 	/* FIXME: Nothing for now. We should initialize fifo, etc */
961378df79SJean-Christophe PLAGNIOL-VILLARD 	return 0;
971378df79SJean-Christophe PLAGNIOL-VILLARD }
981378df79SJean-Christophe PLAGNIOL-VILLARD 
991378df79SJean-Christophe PLAGNIOL-VILLARD void serial_setbrg(void)
1001378df79SJean-Christophe PLAGNIOL-VILLARD {
1011378df79SJean-Christophe PLAGNIOL-VILLARD 	/* FIXME: what's this for? */
1021378df79SJean-Christophe PLAGNIOL-VILLARD }
1031378df79SJean-Christophe PLAGNIOL-VILLARD 
1041378df79SJean-Christophe PLAGNIOL-VILLARD void serial_putc(const char c)
1051378df79SJean-Christophe PLAGNIOL-VILLARD {
106*49a23e4aSMichal Simek 	uartlite_serial_putc(c, 0);
1071378df79SJean-Christophe PLAGNIOL-VILLARD }
1081378df79SJean-Christophe PLAGNIOL-VILLARD 
1091378df79SJean-Christophe PLAGNIOL-VILLARD void serial_puts(const char *s)
1101378df79SJean-Christophe PLAGNIOL-VILLARD {
111*49a23e4aSMichal Simek 	uartlite_serial_puts(s, 0);
1121378df79SJean-Christophe PLAGNIOL-VILLARD }
1131378df79SJean-Christophe PLAGNIOL-VILLARD 
1141378df79SJean-Christophe PLAGNIOL-VILLARD int serial_getc(void)
1151378df79SJean-Christophe PLAGNIOL-VILLARD {
116*49a23e4aSMichal Simek 	return uartlite_serial_getc(0);
1171378df79SJean-Christophe PLAGNIOL-VILLARD }
1181378df79SJean-Christophe PLAGNIOL-VILLARD 
1191378df79SJean-Christophe PLAGNIOL-VILLARD int serial_tstc(void)
1201378df79SJean-Christophe PLAGNIOL-VILLARD {
121*49a23e4aSMichal Simek 	return uartlite_serial_tstc(0);
1221378df79SJean-Christophe PLAGNIOL-VILLARD }
123*49a23e4aSMichal Simek #endif
124*49a23e4aSMichal Simek 
125*49a23e4aSMichal Simek #if defined(CONFIG_SERIAL_MULTI)
126*49a23e4aSMichal Simek /* Multi serial device functions */
127*49a23e4aSMichal Simek #define DECLARE_ESERIAL_FUNCTIONS(port) \
128*49a23e4aSMichal Simek 	int userial##port##_init(void) \
129*49a23e4aSMichal Simek 				{ return(0); } \
130*49a23e4aSMichal Simek 	void userial##port##_setbrg(void) {} \
131*49a23e4aSMichal Simek 	int userial##port##_getc(void) \
132*49a23e4aSMichal Simek 				{ return uartlite_serial_getc(port); } \
133*49a23e4aSMichal Simek 	int userial##port##_tstc(void) \
134*49a23e4aSMichal Simek 				{ return uartlite_serial_tstc(port); } \
135*49a23e4aSMichal Simek 	void userial##port##_putc(const char c) \
136*49a23e4aSMichal Simek 				{ uartlite_serial_putc(c, port); } \
137*49a23e4aSMichal Simek 	void userial##port##_puts(const char *s) \
138*49a23e4aSMichal Simek 				{ uartlite_serial_puts(s, port); }
139*49a23e4aSMichal Simek 
140*49a23e4aSMichal Simek /* Serial device descriptor */
141*49a23e4aSMichal Simek #define INIT_ESERIAL_STRUCTURE(port, name) {\
142*49a23e4aSMichal Simek 	name,\
143*49a23e4aSMichal Simek 	userial##port##_init,\
144*49a23e4aSMichal Simek 	NULL,\
145*49a23e4aSMichal Simek 	userial##port##_setbrg,\
146*49a23e4aSMichal Simek 	userial##port##_getc,\
147*49a23e4aSMichal Simek 	userial##port##_tstc,\
148*49a23e4aSMichal Simek 	userial##port##_putc,\
149*49a23e4aSMichal Simek 	userial##port##_puts, }
150*49a23e4aSMichal Simek 
151*49a23e4aSMichal Simek DECLARE_ESERIAL_FUNCTIONS(0);
152*49a23e4aSMichal Simek struct serial_device uartlite_serial0_device =
153*49a23e4aSMichal Simek 	INIT_ESERIAL_STRUCTURE(0, "ttyUL0");
154*49a23e4aSMichal Simek DECLARE_ESERIAL_FUNCTIONS(1);
155*49a23e4aSMichal Simek struct serial_device uartlite_serial1_device =
156*49a23e4aSMichal Simek 	INIT_ESERIAL_STRUCTURE(1, "ttyUL1");
157*49a23e4aSMichal Simek DECLARE_ESERIAL_FUNCTIONS(2);
158*49a23e4aSMichal Simek struct serial_device uartlite_serial2_device =
159*49a23e4aSMichal Simek 	INIT_ESERIAL_STRUCTURE(2, "ttyUL2");
160*49a23e4aSMichal Simek DECLARE_ESERIAL_FUNCTIONS(3);
161*49a23e4aSMichal Simek struct serial_device uartlite_serial3_device =
162*49a23e4aSMichal Simek 	INIT_ESERIAL_STRUCTURE(3, "ttyUL3");
163*49a23e4aSMichal Simek 
164*49a23e4aSMichal Simek __weak struct serial_device *default_serial_console(void)
165*49a23e4aSMichal Simek {
166*49a23e4aSMichal Simek # ifdef XILINX_UARTLITE_BASEADDR
167*49a23e4aSMichal Simek 	return &uartlite_serial0_device;
168*49a23e4aSMichal Simek # endif /* XILINX_UARTLITE_BASEADDR */
169*49a23e4aSMichal Simek # ifdef XILINX_UARTLITE_BASEADDR1
170*49a23e4aSMichal Simek 	return &uartlite_serial1_device;
171*49a23e4aSMichal Simek # endif /* XILINX_UARTLITE_BASEADDR1 */
172*49a23e4aSMichal Simek # ifdef XILINX_UARTLITE_BASEADDR2
173*49a23e4aSMichal Simek 	return &uartlite_serial2_device;
174*49a23e4aSMichal Simek # endif /* XILINX_UARTLITE_BASEADDR2 */
175*49a23e4aSMichal Simek # ifdef XILINX_UARTLITE_BASEADDR3
176*49a23e4aSMichal Simek 	return &uartlite_serial3_device;
177*49a23e4aSMichal Simek # endif /* XILINX_UARTLITE_BASEADDR3 */
178*49a23e4aSMichal Simek }
179*49a23e4aSMichal Simek #endif /* CONFIG_SERIAL_MULTI */
180