1 /* 2 * Copyright (C) 2012-2015 Panasonic Corporation 3 * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <linux/serial_reg.h> 9 #include <asm/io.h> 10 #include <asm/errno.h> 11 #include <dm/device.h> 12 #include <dm/platform_data/serial-uniphier.h> 13 #include <serial.h> 14 #include <fdtdec.h> 15 16 /* 17 * Note: Register map is slightly different from that of 16550. 18 */ 19 struct uniphier_serial { 20 u32 rx; /* In: Receive buffer */ 21 #define tx rx /* Out: Transmit buffer */ 22 u32 ier; /* Interrupt Enable Register */ 23 u32 iir; /* In: Interrupt ID Register */ 24 u32 char_fcr; /* Charactor / FIFO Control Register */ 25 u32 lcr_mcr; /* Line/Modem Control Register */ 26 #define LCR_SHIFT 8 27 #define LCR_MASK (0xff << (LCR_SHIFT)) 28 u32 lsr; /* In: Line Status Register */ 29 u32 msr; /* In: Modem Status Register */ 30 u32 __rsv0; 31 u32 __rsv1; 32 u32 dlr; /* Divisor Latch Register */ 33 }; 34 35 struct uniphier_serial_private_data { 36 struct uniphier_serial __iomem *membase; 37 }; 38 39 #define uniphier_serial_port(dev) \ 40 ((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase 41 42 static int uniphier_serial_setbrg(struct udevice *dev, int baudrate) 43 { 44 struct uniphier_serial_platform_data *plat = dev_get_platdata(dev); 45 struct uniphier_serial __iomem *port = uniphier_serial_port(dev); 46 const unsigned int mode_x_div = 16; 47 unsigned int divisor; 48 u32 tmp; 49 50 tmp = readl(&port->lcr_mcr); 51 tmp &= ~LCR_MASK; 52 tmp |= UART_LCR_WLEN8 << LCR_SHIFT; 53 writel(tmp, &port->lcr_mcr); 54 55 divisor = DIV_ROUND_CLOSEST(plat->uartclk, mode_x_div * baudrate); 56 57 writel(divisor, &port->dlr); 58 59 return 0; 60 } 61 62 static int uniphier_serial_getc(struct udevice *dev) 63 { 64 struct uniphier_serial __iomem *port = uniphier_serial_port(dev); 65 66 if (!(readl(&port->lsr) & UART_LSR_DR)) 67 return -EAGAIN; 68 69 return readl(&port->rx); 70 } 71 72 static int uniphier_serial_putc(struct udevice *dev, const char c) 73 { 74 struct uniphier_serial __iomem *port = uniphier_serial_port(dev); 75 76 if (!(readl(&port->lsr) & UART_LSR_THRE)) 77 return -EAGAIN; 78 79 writel(c, &port->tx); 80 81 return 0; 82 } 83 84 static int uniphier_serial_pending(struct udevice *dev, bool input) 85 { 86 struct uniphier_serial __iomem *port = uniphier_serial_port(dev); 87 88 if (input) 89 return readl(&port->lsr) & UART_LSR_DR; 90 else 91 return !(readl(&port->lsr) & UART_LSR_THRE); 92 } 93 94 static int uniphier_serial_probe(struct udevice *dev) 95 { 96 struct uniphier_serial_private_data *priv = dev_get_priv(dev); 97 struct uniphier_serial_platform_data *plat = dev_get_platdata(dev); 98 99 priv->membase = map_sysmem(plat->base, sizeof(struct uniphier_serial)); 100 101 if (!priv->membase) 102 return -ENOMEM; 103 104 return 0; 105 } 106 107 static int uniphier_serial_remove(struct udevice *dev) 108 { 109 unmap_sysmem(uniphier_serial_port(dev)); 110 111 return 0; 112 } 113 114 #ifdef CONFIG_OF_CONTROL 115 static const struct udevice_id uniphier_uart_of_match[] = { 116 { .compatible = "panasonic,uniphier-uart" }, 117 {}, 118 }; 119 120 static int uniphier_serial_ofdata_to_platdata(struct udevice *dev) 121 { 122 struct uniphier_serial_platform_data *plat = dev_get_platdata(dev); 123 DECLARE_GLOBAL_DATA_PTR; 124 125 plat->base = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg"); 126 plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset, 127 "clock-frequency", 0); 128 129 return 0; 130 } 131 #endif 132 133 static const struct dm_serial_ops uniphier_serial_ops = { 134 .setbrg = uniphier_serial_setbrg, 135 .getc = uniphier_serial_getc, 136 .putc = uniphier_serial_putc, 137 .pending = uniphier_serial_pending, 138 }; 139 140 U_BOOT_DRIVER(uniphier_serial) = { 141 .name = DRIVER_NAME, 142 .id = UCLASS_SERIAL, 143 .of_match = of_match_ptr(uniphier_uart_of_match), 144 .ofdata_to_platdata = of_match_ptr(uniphier_serial_ofdata_to_platdata), 145 .probe = uniphier_serial_probe, 146 .remove = uniphier_serial_remove, 147 .priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data), 148 .platdata_auto_alloc_size = 149 sizeof(struct uniphier_serial_platform_data), 150 .ops = &uniphier_serial_ops, 151 .flags = DM_FLAG_PRE_RELOC, 152 }; 153