1 /* 2 * COM1 NS16550 support 3 * originally from linux source (arch/powerpc/boot/ns16550.c) 4 * modified to use CONFIG_SYS_ISA_MEM and new defines 5 */ 6 7 #include <common.h> 8 #include <clk.h> 9 #include <dm.h> 10 #include <errno.h> 11 #include <ns16550.h> 12 #include <serial.h> 13 #include <watchdog.h> 14 #include <linux/types.h> 15 #include <asm/io.h> 16 17 DECLARE_GLOBAL_DATA_PTR; 18 19 #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ 20 #define UART_MCRVAL (UART_MCR_DTR | \ 21 UART_MCR_RTS) /* RTS/DTR */ 22 23 #ifndef CONFIG_DM_SERIAL 24 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED 25 #define serial_out(x, y) outb(x, (ulong)y) 26 #define serial_in(y) inb((ulong)y) 27 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0) 28 #define serial_out(x, y) out_be32(y, x) 29 #define serial_in(y) in_be32(y) 30 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0) 31 #define serial_out(x, y) out_le32(y, x) 32 #define serial_in(y) in_le32(y) 33 #else 34 #define serial_out(x, y) writeb(x, y) 35 #define serial_in(y) readb(y) 36 #endif 37 #endif /* !CONFIG_DM_SERIAL */ 38 39 #if defined(CONFIG_SOC_KEYSTONE) 40 #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 41 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) 42 #undef UART_MCRVAL 43 #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL 44 #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) 45 #else 46 #define UART_MCRVAL (UART_MCR_RTS) 47 #endif 48 #endif 49 50 #ifndef CONFIG_SYS_NS16550_IER 51 #define CONFIG_SYS_NS16550_IER 0x00 52 #endif /* CONFIG_SYS_NS16550_IER */ 53 54 static inline void serial_out_shift(void *addr, int shift, int value) 55 { 56 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED 57 outb(value, (ulong)addr); 58 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) 59 out_le32(addr, value); 60 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) 61 out_be32(addr, value); 62 #elif defined(CONFIG_SYS_NS16550_MEM32) 63 writel(value, addr); 64 #elif defined(CONFIG_SYS_BIG_ENDIAN) 65 writeb(value, addr + (1 << shift) - 1); 66 #else 67 writeb(value, addr); 68 #endif 69 } 70 71 static inline int serial_in_shift(void *addr, int shift) 72 { 73 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED 74 return inb((ulong)addr); 75 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) 76 return in_le32(addr); 77 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) 78 return in_be32(addr); 79 #elif defined(CONFIG_SYS_NS16550_MEM32) 80 return readl(addr); 81 #elif defined(CONFIG_SYS_BIG_ENDIAN) 82 return readb(addr + (1 << shift) - 1); 83 #else 84 return readb(addr); 85 #endif 86 } 87 88 #ifdef CONFIG_DM_SERIAL 89 90 #ifndef CONFIG_SYS_NS16550_CLK 91 #define CONFIG_SYS_NS16550_CLK 0 92 #endif 93 94 static void ns16550_writeb(NS16550_t port, int offset, int value) 95 { 96 struct ns16550_platdata *plat = port->plat; 97 unsigned char *addr; 98 99 offset *= 1 << plat->reg_shift; 100 addr = (unsigned char *)plat->base + offset; 101 102 /* 103 * As far as we know it doesn't make sense to support selection of 104 * these options at run-time, so use the existing CONFIG options. 105 */ 106 serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value); 107 } 108 109 static int ns16550_readb(NS16550_t port, int offset) 110 { 111 struct ns16550_platdata *plat = port->plat; 112 unsigned char *addr; 113 114 offset *= 1 << plat->reg_shift; 115 addr = (unsigned char *)plat->base + offset; 116 117 return serial_in_shift(addr + plat->reg_offset, plat->reg_shift); 118 } 119 120 static u32 ns16550_getfcr(NS16550_t port) 121 { 122 struct ns16550_platdata *plat = port->plat; 123 124 return plat->fcr; 125 } 126 127 /* We can clean these up once everything is moved to driver model */ 128 #define serial_out(value, addr) \ 129 ns16550_writeb(com_port, \ 130 (unsigned char *)addr - (unsigned char *)com_port, value) 131 #define serial_in(addr) \ 132 ns16550_readb(com_port, \ 133 (unsigned char *)addr - (unsigned char *)com_port) 134 #else 135 static u32 ns16550_getfcr(NS16550_t port) 136 { 137 return UART_FCR_DEFVAL; 138 } 139 #endif 140 141 int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate) 142 { 143 const unsigned int mode_x_div = 16; 144 145 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); 146 } 147 148 static void NS16550_setbrg(NS16550_t com_port, int baud_divisor) 149 { 150 serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); 151 serial_out(baud_divisor & 0xff, &com_port->dll); 152 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); 153 serial_out(UART_LCRVAL, &com_port->lcr); 154 } 155 156 void NS16550_init(NS16550_t com_port, int baud_divisor) 157 { 158 #if (defined(CONFIG_SPL_BUILD) && \ 159 (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX))) 160 /* 161 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode 162 * before SPL starts only THRE bit is set. We have to empty the 163 * transmitter before initialization starts. 164 */ 165 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE)) 166 == UART_LSR_THRE) { 167 if (baud_divisor != -1) 168 NS16550_setbrg(com_port, baud_divisor); 169 serial_out(0, &com_port->mdr1); 170 } 171 #endif 172 173 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT)) 174 ; 175 176 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); 177 #if defined(CONFIG_ARCH_OMAP2PLUS) 178 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ 179 #endif 180 serial_out(UART_MCRVAL, &com_port->mcr); 181 serial_out(ns16550_getfcr(com_port), &com_port->fcr); 182 if (baud_divisor != -1) 183 NS16550_setbrg(com_port, baud_divisor); 184 #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) 185 /* /16 is proper to hit 115200 with 48MHz */ 186 serial_out(0, &com_port->mdr1); 187 #endif 188 #if defined(CONFIG_SOC_KEYSTONE) 189 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC); 190 #endif 191 } 192 193 #ifndef CONFIG_NS16550_MIN_FUNCTIONS 194 void NS16550_reinit(NS16550_t com_port, int baud_divisor) 195 { 196 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); 197 NS16550_setbrg(com_port, 0); 198 serial_out(UART_MCRVAL, &com_port->mcr); 199 serial_out(ns16550_getfcr(com_port), &com_port->fcr); 200 NS16550_setbrg(com_port, baud_divisor); 201 } 202 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ 203 204 void NS16550_putc(NS16550_t com_port, char c) 205 { 206 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0) 207 ; 208 serial_out(c, &com_port->thr); 209 210 /* 211 * Call watchdog_reset() upon newline. This is done here in putc 212 * since the environment code uses a single puts() to print the complete 213 * environment upon "printenv". So we can't put this watchdog call 214 * in puts(). 215 */ 216 if (c == '\n') 217 WATCHDOG_RESET(); 218 } 219 220 #ifndef CONFIG_NS16550_MIN_FUNCTIONS 221 char NS16550_getc(NS16550_t com_port) 222 { 223 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) { 224 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY) 225 extern void usbtty_poll(void); 226 usbtty_poll(); 227 #endif 228 WATCHDOG_RESET(); 229 } 230 return serial_in(&com_port->rbr); 231 } 232 233 int NS16550_tstc(NS16550_t com_port) 234 { 235 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0; 236 } 237 238 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ 239 240 #ifdef CONFIG_DEBUG_UART_NS16550 241 242 #include <debug_uart.h> 243 244 static inline void _debug_uart_init(void) 245 { 246 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; 247 int baud_divisor; 248 249 if (gd && gd->flags & GD_FLG_DISABLE_CONSOLE) 250 return; 251 252 if (gd && gd->serial.using_pre_serial) 253 return; 254 255 /* 256 * We copy the code from above because it is already horribly messy. 257 * Trying to refactor to nicely remove the duplication doesn't seem 258 * feasible. The better fix is to move all users of this driver to 259 * driver model. 260 */ 261 baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, 262 CONFIG_BAUDRATE); 263 serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); 264 serial_dout(&com_port->mcr, UART_MCRVAL); 265 serial_dout(&com_port->fcr, UART_FCR_DEFVAL); 266 267 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); 268 serial_dout(&com_port->dll, baud_divisor & 0xff); 269 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); 270 serial_dout(&com_port->lcr, UART_LCRVAL); 271 } 272 273 static inline void _debug_uart_putc(int ch) 274 { 275 struct NS16550 *com_port; 276 277 if (gd && gd->flags & GD_FLG_DISABLE_CONSOLE) 278 return; 279 280 if (gd && gd->serial.addr) 281 com_port = (struct NS16550 *)gd->serial.addr; 282 else 283 com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; 284 285 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) 286 ; 287 serial_dout(&com_port->thr, ch); 288 } 289 290 static inline int _debug_uart_getc(void) 291 { 292 struct NS16550 *com_port; 293 294 if (gd && gd->flags & GD_FLG_DISABLE_CONSOLE) 295 return 0; 296 297 if (gd && gd->serial.addr) 298 com_port = (struct NS16550 *)gd->serial.addr; 299 else 300 com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; 301 302 while (!(serial_din(&com_port->lsr) & UART_LSR_DR)) 303 ; 304 305 return serial_din(&com_port->rbr); 306 } 307 308 static inline int _debug_uart_tstc(int input) 309 { 310 struct NS16550 *com_port; 311 312 if (gd && gd->flags & GD_FLG_DISABLE_CONSOLE) 313 return 0; 314 315 if (gd && gd->serial.addr) 316 com_port = (struct NS16550 *)gd->serial.addr; 317 else 318 com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; 319 320 if (input) 321 return serial_din(&com_port->lsr) & UART_LSR_DR ? 1 : 0; 322 else 323 return serial_din(&com_port->lsr) & UART_LSR_THRE ? 0 : 1; 324 } 325 326 static inline int _debug_uart_clrc(void) 327 { 328 struct NS16550 *com_port; 329 330 if (gd && gd->flags & GD_FLG_DISABLE_CONSOLE) 331 return 0; 332 333 if (gd && gd->serial.addr) 334 com_port = (struct NS16550 *)gd->serial.addr; 335 else 336 com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; 337 338 /* 339 * Wait fifo flush. 340 * 341 * UART_USR: bit2 trans_fifo_empty: 342 * 0 = Transmit FIFO is not empty 343 * 1 = Transmit FIFO is empty 344 */ 345 while (!(serial_din(&com_port->rbr + 0x1f) & 0x04)) 346 ; 347 348 return 0; 349 } 350 351 /* should use gd->baudrate, it can be updated by env callback: on_baudrate() */ 352 static inline int _debug_uart_setbrg(void) 353 { 354 struct NS16550 *com_port; 355 int baud_divisor; 356 357 if (gd && gd->flags & GD_FLG_DISABLE_CONSOLE) 358 return 0; 359 360 if (gd && gd->serial.addr) { 361 com_port = (struct NS16550 *)gd->serial.addr; 362 baud_divisor = ns16550_calc_divisor(com_port, 363 CONFIG_DEBUG_UART_CLOCK, gd->baudrate); 364 } else { 365 com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; 366 baud_divisor = ns16550_calc_divisor(com_port, 367 CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); 368 } 369 370 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); 371 serial_dout(&com_port->dll, baud_divisor & 0xff); 372 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); 373 serial_dout(&com_port->lcr, UART_LCRVAL); 374 375 return 0; 376 } 377 378 DEBUG_UART_FUNCS 379 380 #endif 381 382 #ifdef CONFIG_DEBUG_UART_OMAP 383 384 #include <debug_uart.h> 385 386 static inline void _debug_uart_init(void) 387 { 388 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; 389 int baud_divisor; 390 391 baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, 392 CONFIG_BAUDRATE); 393 serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); 394 serial_dout(&com_port->mdr1, 0x7); 395 serial_dout(&com_port->mcr, UART_MCRVAL); 396 serial_dout(&com_port->fcr, UART_FCR_DEFVAL); 397 398 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); 399 serial_dout(&com_port->dll, baud_divisor & 0xff); 400 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); 401 serial_dout(&com_port->lcr, UART_LCRVAL); 402 serial_dout(&com_port->mdr1, 0x0); 403 } 404 405 static inline void _debug_uart_putc(int ch) 406 { 407 struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; 408 409 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) 410 ; 411 serial_dout(&com_port->thr, ch); 412 } 413 414 DEBUG_UART_FUNCS 415 416 #endif 417 418 #ifdef CONFIG_DM_SERIAL 419 static int ns16550_serial_putc(struct udevice *dev, const char ch) 420 { 421 struct NS16550 *const com_port = dev_get_priv(dev); 422 423 /* 424 * Use fifo function. 425 * 426 * UART_USR: bit1 trans_fifo_not_full: 427 * 0 = Transmit FIFO is full; 428 * 1 = Transmit FIFO is not full; 429 */ 430 while (!(serial_in(&com_port->rbr + 0x1f) & 0x02)) 431 ; 432 serial_out(ch, &com_port->thr); 433 434 /* 435 * Call watchdog_reset() upon newline. This is done here in putc 436 * since the environment code uses a single puts() to print the complete 437 * environment upon "printenv". So we can't put this watchdog call 438 * in puts(). 439 */ 440 if (ch == '\n') 441 WATCHDOG_RESET(); 442 443 return 0; 444 } 445 446 static int ns16550_serial_pending(struct udevice *dev, bool input) 447 { 448 struct NS16550 *const com_port = dev_get_priv(dev); 449 450 if (input) 451 return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0; 452 else 453 return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1; 454 } 455 456 static int ns16550_serial_getc(struct udevice *dev) 457 { 458 struct NS16550 *const com_port = dev_get_priv(dev); 459 460 if (!(serial_in(&com_port->lsr) & UART_LSR_DR)) 461 return -EAGAIN; 462 463 return serial_in(&com_port->rbr); 464 } 465 466 static int ns16550_serial_setbrg(struct udevice *dev, int baudrate) 467 { 468 struct NS16550 *const com_port = dev_get_priv(dev); 469 struct ns16550_platdata *plat = com_port->plat; 470 int clock_divisor; 471 472 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate); 473 474 NS16550_setbrg(com_port, clock_divisor); 475 476 return 0; 477 } 478 479 static int ns16550_serial_clear(struct udevice *dev) 480 { 481 struct NS16550 *const com_port = dev_get_priv(dev); 482 483 /* 484 * Wait fifo flush. 485 * 486 * UART_USR: bit2 trans_fifo_empty: 487 * 0 = Transmit FIFO is not empty 488 * 1 = Transmit FIFO is empty 489 */ 490 while (!(serial_in(&com_port->rbr + 0x1f) & 0x04)) 491 ; 492 493 return 0; 494 } 495 496 int ns16550_serial_probe(struct udevice *dev) 497 { 498 struct NS16550 *const com_port = dev_get_priv(dev); 499 500 com_port->plat = dev_get_platdata(dev); 501 NS16550_init(com_port, -1); 502 503 return 0; 504 } 505 506 #if CONFIG_IS_ENABLED(OF_CONTROL) 507 enum { 508 PORT_NS16550 = 0, 509 PORT_JZ4780, 510 }; 511 #endif 512 513 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) 514 int ns16550_serial_ofdata_to_platdata(struct udevice *dev) 515 { 516 struct ns16550_platdata *plat = dev->platdata; 517 const u32 port_type = dev_get_driver_data(dev); 518 fdt_addr_t addr; 519 struct clk clk; 520 int err; 521 522 /* try Processor Local Bus device first */ 523 addr = dev_read_addr(dev); 524 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI) 525 if (addr == FDT_ADDR_T_NONE) { 526 /* then try pci device */ 527 struct fdt_pci_addr pci_addr; 528 u32 bar; 529 int ret; 530 531 /* we prefer to use a memory-mapped register */ 532 ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev), 533 FDT_PCI_SPACE_MEM32, "reg", 534 &pci_addr); 535 if (ret) { 536 /* try if there is any i/o-mapped register */ 537 ret = fdtdec_get_pci_addr(gd->fdt_blob, 538 dev_of_offset(dev), 539 FDT_PCI_SPACE_IO, 540 "reg", &pci_addr); 541 if (ret) 542 return ret; 543 } 544 545 ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar); 546 if (ret) 547 return ret; 548 549 addr = bar; 550 } 551 #endif 552 553 if (addr == FDT_ADDR_T_NONE) 554 return -EINVAL; 555 556 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED 557 plat->base = addr; 558 #else 559 plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE); 560 #endif 561 562 plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0); 563 plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0); 564 565 err = clk_get_by_index(dev, 0, &clk); 566 if (!err) { 567 err = clk_get_rate(&clk); 568 if (!IS_ERR_VALUE(err)) 569 plat->clock = err; 570 } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) { 571 printf("ns16550 failed to get clock, err=%d\n", err); 572 return err; 573 } 574 575 if (!plat->clock) 576 plat->clock = dev_read_u32_default(dev, "clock-frequency", 577 CONFIG_SYS_NS16550_CLK); 578 if (!plat->clock) { 579 debug("ns16550 clock not defined\n"); 580 return -EINVAL; 581 } 582 583 plat->fcr = UART_FCR_DEFVAL; 584 if (port_type == PORT_JZ4780) 585 plat->fcr |= UART_FCR_UME; 586 587 return 0; 588 } 589 #endif 590 591 const struct dm_serial_ops ns16550_serial_ops = { 592 .putc = ns16550_serial_putc, 593 .pending = ns16550_serial_pending, 594 .getc = ns16550_serial_getc, 595 .setbrg = ns16550_serial_setbrg, 596 .clear = ns16550_serial_clear, 597 }; 598 599 #if CONFIG_IS_ENABLED(SERIAL_PRESENT) 600 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) 601 /* 602 * Please consider existing compatible strings before adding a new 603 * one to keep this table compact. Or you may add a generic "ns16550" 604 * compatible string to your dts. 605 */ 606 static const struct udevice_id ns16550_serial_ids[] = { 607 { .compatible = "ns16550", .data = PORT_NS16550 }, 608 { .compatible = "ns16550a", .data = PORT_NS16550 }, 609 { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 }, 610 { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 }, 611 { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 }, 612 { .compatible = "ti,omap2-uart", .data = PORT_NS16550 }, 613 { .compatible = "ti,omap3-uart", .data = PORT_NS16550 }, 614 { .compatible = "ti,omap4-uart", .data = PORT_NS16550 }, 615 { .compatible = "ti,am3352-uart", .data = PORT_NS16550 }, 616 { .compatible = "ti,am4372-uart", .data = PORT_NS16550 }, 617 { .compatible = "ti,dra742-uart", .data = PORT_NS16550 }, 618 {} 619 }; 620 #endif /* OF_CONTROL && !OF_PLATDATA */ 621 622 /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */ 623 #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL) 624 U_BOOT_DRIVER(ns16550_serial) = { 625 .name = "ns16550_serial", 626 .id = UCLASS_SERIAL, 627 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) 628 .of_match = ns16550_serial_ids, 629 .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata, 630 .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), 631 #endif 632 .priv_auto_alloc_size = sizeof(struct NS16550), 633 .probe = ns16550_serial_probe, 634 .ops = &ns16550_serial_ops, 635 .flags = DM_FLAG_PRE_RELOC, 636 }; 637 #endif 638 #endif /* SERIAL_PRESENT */ 639 640 #endif /* CONFIG_DM_SERIAL */ 641