xref: /rk3399_rockchip-uboot/drivers/serial/ns16550.c (revision 01b8c4d110abb0dcbe36dc5b6b10d93b2b8e2667)
1 /*
2  * COM1 NS16550 support
3  * originally from linux source (arch/powerpc/boot/ns16550.c)
4  * modified to use CONFIG_SYS_ISA_MEM and new defines
5  */
6 
7 #include <common.h>
8 #include <clk.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <ns16550.h>
12 #include <serial.h>
13 #include <watchdog.h>
14 #include <linux/types.h>
15 #include <asm/io.h>
16 
17 DECLARE_GLOBAL_DATA_PTR;
18 
19 #define UART_LCRVAL UART_LCR_8N1		/* 8 data, 1 stop, no parity */
20 #define UART_MCRVAL (UART_MCR_DTR | \
21 		     UART_MCR_RTS)		/* RTS/DTR */
22 
23 #ifndef CONFIG_DM_SERIAL
24 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
25 #define serial_out(x, y)	outb(x, (ulong)y)
26 #define serial_in(y)		inb((ulong)y)
27 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
28 #define serial_out(x, y)	out_be32(y, x)
29 #define serial_in(y)		in_be32(y)
30 #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
31 #define serial_out(x, y)	out_le32(y, x)
32 #define serial_in(y)		in_le32(y)
33 #else
34 #define serial_out(x, y)	writeb(x, y)
35 #define serial_in(y)		readb(y)
36 #endif
37 #endif /* !CONFIG_DM_SERIAL */
38 
39 #if defined(CONFIG_SOC_KEYSTONE)
40 #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE   0
41 #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
42 #undef UART_MCRVAL
43 #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
44 #define UART_MCRVAL             (UART_MCR_RTS | UART_MCR_AFE)
45 #else
46 #define UART_MCRVAL             (UART_MCR_RTS)
47 #endif
48 #endif
49 
50 #ifndef CONFIG_SYS_NS16550_IER
51 #define CONFIG_SYS_NS16550_IER  0x00
52 #endif /* CONFIG_SYS_NS16550_IER */
53 
54 static inline void serial_out_shift(void *addr, int shift, int value)
55 {
56 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
57 	outb(value, (ulong)addr);
58 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
59 	out_le32(addr, value);
60 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
61 	out_be32(addr, value);
62 #elif defined(CONFIG_SYS_NS16550_MEM32)
63 	writel(value, addr);
64 #elif defined(CONFIG_SYS_BIG_ENDIAN)
65 	writeb(value, addr + (1 << shift) - 1);
66 #else
67 	writeb(value, addr);
68 #endif
69 }
70 
71 static inline int serial_in_shift(void *addr, int shift)
72 {
73 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
74 	return inb((ulong)addr);
75 #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
76 	return in_le32(addr);
77 #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
78 	return in_be32(addr);
79 #elif defined(CONFIG_SYS_NS16550_MEM32)
80 	return readl(addr);
81 #elif defined(CONFIG_SYS_BIG_ENDIAN)
82 	return readb(addr + (1 << shift) - 1);
83 #else
84 	return readb(addr);
85 #endif
86 }
87 
88 #ifdef CONFIG_DM_SERIAL
89 
90 #ifndef CONFIG_SYS_NS16550_CLK
91 #define CONFIG_SYS_NS16550_CLK  24000000
92 #endif
93 
94 static void ns16550_writeb(NS16550_t port, int offset, int value)
95 {
96 	struct ns16550_platdata *plat = port->plat;
97 	unsigned char *addr;
98 
99 	offset *= 1 << plat->reg_shift;
100 	addr = (unsigned char *)plat->base + offset;
101 
102 	/*
103 	 * As far as we know it doesn't make sense to support selection of
104 	 * these options at run-time, so use the existing CONFIG options.
105 	 */
106 	serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
107 }
108 
109 static int ns16550_readb(NS16550_t port, int offset)
110 {
111 	struct ns16550_platdata *plat = port->plat;
112 	unsigned char *addr;
113 
114 	offset *= 1 << plat->reg_shift;
115 	addr = (unsigned char *)plat->base + offset;
116 
117 	return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
118 }
119 
120 static u32 ns16550_getfcr(NS16550_t port)
121 {
122 	struct ns16550_platdata *plat = port->plat;
123 
124 	return plat->fcr;
125 }
126 
127 /* We can clean these up once everything is moved to driver model */
128 #define serial_out(value, addr)	\
129 	ns16550_writeb(com_port, \
130 		(unsigned char *)addr - (unsigned char *)com_port, value)
131 #define serial_in(addr) \
132 	ns16550_readb(com_port, \
133 		(unsigned char *)addr - (unsigned char *)com_port)
134 #else
135 static u32 ns16550_getfcr(NS16550_t port)
136 {
137 	return UART_FCR_DEFVAL;
138 }
139 #endif
140 
141 int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
142 {
143 	const unsigned int mode_x_div = 16;
144 
145 	return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
146 }
147 
148 static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
149 {
150 	serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
151 	serial_out(baud_divisor & 0xff, &com_port->dll);
152 	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
153 	serial_out(UART_LCRVAL, &com_port->lcr);
154 }
155 
156 void NS16550_init(NS16550_t com_port, int baud_divisor)
157 {
158 #if (defined(CONFIG_SPL_BUILD) && \
159 		(defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
160 	/*
161 	 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
162 	 * before SPL starts only THRE bit is set. We have to empty the
163 	 * transmitter before initialization starts.
164 	 */
165 	if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
166 	     == UART_LSR_THRE) {
167 		if (baud_divisor != -1)
168 			NS16550_setbrg(com_port, baud_divisor);
169 		serial_out(0, &com_port->mdr1);
170 	}
171 #endif
172 
173 	while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
174 		;
175 
176 	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
177 #if defined(CONFIG_ARCH_OMAP2PLUS)
178 	serial_out(0x7, &com_port->mdr1);	/* mode select reset TL16C750*/
179 #endif
180 	serial_out(UART_MCRVAL, &com_port->mcr);
181 	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
182 	if (baud_divisor != -1)
183 		NS16550_setbrg(com_port, baud_divisor);
184 #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX)
185 	/* /16 is proper to hit 115200 with 48MHz */
186 	serial_out(0, &com_port->mdr1);
187 #endif
188 #if defined(CONFIG_SOC_KEYSTONE)
189 	serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
190 #endif
191 }
192 
193 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
194 void NS16550_reinit(NS16550_t com_port, int baud_divisor)
195 {
196 	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
197 	NS16550_setbrg(com_port, 0);
198 	serial_out(UART_MCRVAL, &com_port->mcr);
199 	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
200 	NS16550_setbrg(com_port, baud_divisor);
201 }
202 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
203 
204 void NS16550_putc(NS16550_t com_port, char c)
205 {
206 	while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
207 		;
208 	serial_out(c, &com_port->thr);
209 
210 	/*
211 	 * Call watchdog_reset() upon newline. This is done here in putc
212 	 * since the environment code uses a single puts() to print the complete
213 	 * environment upon "printenv". So we can't put this watchdog call
214 	 * in puts().
215 	 */
216 	if (c == '\n')
217 		WATCHDOG_RESET();
218 }
219 
220 #ifndef CONFIG_NS16550_MIN_FUNCTIONS
221 char NS16550_getc(NS16550_t com_port)
222 {
223 	while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
224 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
225 		extern void usbtty_poll(void);
226 		usbtty_poll();
227 #endif
228 		WATCHDOG_RESET();
229 	}
230 	return serial_in(&com_port->rbr);
231 }
232 
233 int NS16550_tstc(NS16550_t com_port)
234 {
235 	return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
236 }
237 
238 #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
239 
240 #ifdef CONFIG_DEBUG_UART_NS16550
241 
242 #include <debug_uart.h>
243 
244 static inline void _debug_uart_init(void)
245 {
246 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
247 	int baud_divisor;
248 
249 	/*
250 	 * We copy the code from above because it is already horribly messy.
251 	 * Trying to refactor to nicely remove the duplication doesn't seem
252 	 * feasible. The better fix is to move all users of this driver to
253 	 * driver model.
254 	 */
255 	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
256 					    CONFIG_BAUDRATE);
257 
258 	if (gd && gd->serial.using_pre_serial) {
259 		com_port = (struct NS16550 *)gd->serial.addr;
260 		baud_divisor = ns16550_calc_divisor(com_port,
261 			CONFIG_DEBUG_UART_CLOCK, gd->serial.baudrate);
262 	}
263 
264 	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
265 	serial_dout(&com_port->mcr, UART_MCRVAL);
266 	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
267 
268 	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
269 	serial_dout(&com_port->dll, baud_divisor & 0xff);
270 	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
271 	serial_dout(&com_port->lcr, UART_LCRVAL);
272 }
273 
274 static inline void _debug_uart_putc(int ch)
275 {
276 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
277 
278 	if (gd && gd->serial.using_pre_serial)
279 		com_port = (struct NS16550 *)gd->serial.addr;
280 
281 	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
282 		;
283 	serial_dout(&com_port->thr, ch);
284 }
285 
286 DEBUG_UART_FUNCS
287 
288 #endif
289 
290 #ifdef CONFIG_DEBUG_UART_OMAP
291 
292 #include <debug_uart.h>
293 
294 static inline void _debug_uart_init(void)
295 {
296 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
297 	int baud_divisor;
298 
299 	baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
300 					    CONFIG_BAUDRATE);
301 
302 	if (gd && gd->serial.using_pre_serial) {
303 		com_port = (struct NS16550 *)gd->serial.addr;
304 		baud_divisor = ns16550_calc_divisor(com_port,
305 			CONFIG_DEBUG_UART_CLOCK, gd->serial.baudrate);
306 	}
307 
308 	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
309 	serial_dout(&com_port->mdr1, 0x7);
310 	serial_dout(&com_port->mcr, UART_MCRVAL);
311 	serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
312 
313 	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
314 	serial_dout(&com_port->dll, baud_divisor & 0xff);
315 	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
316 	serial_dout(&com_port->lcr, UART_LCRVAL);
317 	serial_dout(&com_port->mdr1, 0x0);
318 }
319 
320 static inline void _debug_uart_putc(int ch)
321 {
322 	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
323 
324 	if (gd && gd->serial.using_pre_serial)
325 		com_port = (struct NS16550 *)gd->serial.addr;
326 
327 	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
328 		;
329 	serial_dout(&com_port->thr, ch);
330 }
331 
332 DEBUG_UART_FUNCS
333 
334 #endif
335 
336 #ifdef CONFIG_DM_SERIAL
337 static int ns16550_serial_putc(struct udevice *dev, const char ch)
338 {
339 	struct NS16550 *const com_port = dev_get_priv(dev);
340 
341 #ifdef CONFIG_ARCH_ROCKCHIP
342 	/*
343 	 * Use fifo function.
344 	 *
345 	 * UART_USR: bit1 trans_fifo_not_full:
346 	 *	0 = Transmit FIFO is full;
347 	 *	1 = Transmit FIFO is not full;
348 	 */
349 	while (!(serial_in(&com_port->rbr + 0x1f) & 0x02))
350 		;
351 #else
352 	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
353 		return -EAGAIN;
354 #endif
355 	serial_out(ch, &com_port->thr);
356 
357 	/*
358 	 * Call watchdog_reset() upon newline. This is done here in putc
359 	 * since the environment code uses a single puts() to print the complete
360 	 * environment upon "printenv". So we can't put this watchdog call
361 	 * in puts().
362 	 */
363 	if (ch == '\n')
364 		WATCHDOG_RESET();
365 
366 	return 0;
367 }
368 
369 static int ns16550_serial_pending(struct udevice *dev, bool input)
370 {
371 	struct NS16550 *const com_port = dev_get_priv(dev);
372 
373 	if (input)
374 		return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
375 	else
376 		return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
377 }
378 
379 static int ns16550_serial_getc(struct udevice *dev)
380 {
381 	struct NS16550 *const com_port = dev_get_priv(dev);
382 
383 	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
384 		return -EAGAIN;
385 
386 	return serial_in(&com_port->rbr);
387 }
388 
389 static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
390 {
391 	struct NS16550 *const com_port = dev_get_priv(dev);
392 	struct ns16550_platdata *plat = com_port->plat;
393 	int clock_divisor;
394 
395 	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
396 
397 	NS16550_setbrg(com_port, clock_divisor);
398 
399 	return 0;
400 }
401 
402 static int ns16550_serial_clear(struct udevice *dev)
403 {
404 #ifdef CONFIG_ARCH_ROCKCHIP
405 	struct NS16550 *const com_port = dev_get_priv(dev);
406 
407 	/*
408 	 * Wait fifo flush.
409 	 *
410 	 * UART_USR: bit2 trans_fifo_empty:
411 	 *	0 = Transmit FIFO is not empty
412 	 *	1 = Transmit FIFO is empty
413 	 */
414 	while (!(serial_in(&com_port->rbr + 0x1f) & 0x04))
415 		;
416 #endif
417 	return 0;
418 }
419 
420 int ns16550_serial_probe(struct udevice *dev)
421 {
422 	struct NS16550 *const com_port = dev_get_priv(dev);
423 
424 	com_port->plat = dev_get_platdata(dev);
425 	NS16550_init(com_port, -1);
426 
427 	return 0;
428 }
429 
430 #if CONFIG_IS_ENABLED(OF_CONTROL)
431 enum {
432 	PORT_NS16550 = 0,
433 	PORT_JZ4780,
434 };
435 #endif
436 
437 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
438 int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
439 {
440 	struct ns16550_platdata *plat = dev->platdata;
441 	const u32 port_type = dev_get_driver_data(dev);
442 	fdt_addr_t addr;
443 	struct clk clk;
444 	int err;
445 
446 	/* try Processor Local Bus device first */
447 	addr = dev_read_addr(dev);
448 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
449 	if (addr == FDT_ADDR_T_NONE) {
450 		/* then try pci device */
451 		struct fdt_pci_addr pci_addr;
452 		u32 bar;
453 		int ret;
454 
455 		/* we prefer to use a memory-mapped register */
456 		ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev),
457 					  FDT_PCI_SPACE_MEM32, "reg",
458 					  &pci_addr);
459 		if (ret) {
460 			/* try if there is any i/o-mapped register */
461 			ret = fdtdec_get_pci_addr(gd->fdt_blob,
462 						  dev_of_offset(dev),
463 						  FDT_PCI_SPACE_IO,
464 						  "reg", &pci_addr);
465 			if (ret)
466 				return ret;
467 		}
468 
469 		ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
470 		if (ret)
471 			return ret;
472 
473 		addr = bar;
474 	}
475 #endif
476 
477 	if (addr == FDT_ADDR_T_NONE)
478 		return -EINVAL;
479 
480 #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
481 	plat->base = addr;
482 #else
483 
484 	if (gd && gd->serial.using_pre_serial && gd->serial.id == dev->req_seq)
485 		addr = gd->serial.addr;
486 
487 	plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
488 #endif
489 
490 	plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
491 	plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
492 
493 	err = clk_get_by_index(dev, 0, &clk);
494 	if (!err) {
495 		err = clk_get_rate(&clk);
496 		if (!IS_ERR_VALUE(err))
497 			plat->clock = err;
498 	} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
499 		printf("ns16550 failed to get clock, err=%d\n", err);
500 		return err;
501 	}
502 
503 	if (!plat->clock)
504 		plat->clock = dev_read_u32_default(dev, "clock-frequency",
505 						   CONFIG_SYS_NS16550_CLK);
506 	if (!plat->clock) {
507 		debug("ns16550 clock not defined\n");
508 		return -EINVAL;
509 	}
510 
511 	plat->fcr = UART_FCR_DEFVAL;
512 	if (port_type == PORT_JZ4780)
513 		plat->fcr |= UART_FCR_UME;
514 
515 	return 0;
516 }
517 #endif
518 
519 const struct dm_serial_ops ns16550_serial_ops = {
520 	.putc = ns16550_serial_putc,
521 	.pending = ns16550_serial_pending,
522 	.getc = ns16550_serial_getc,
523 	.setbrg = ns16550_serial_setbrg,
524 	.clear = ns16550_serial_clear,
525 };
526 
527 #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
528 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
529 /*
530  * Please consider existing compatible strings before adding a new
531  * one to keep this table compact. Or you may add a generic "ns16550"
532  * compatible string to your dts.
533  */
534 static const struct udevice_id ns16550_serial_ids[] = {
535 	{ .compatible = "ns16550",		.data = PORT_NS16550 },
536 	{ .compatible = "ns16550a",		.data = PORT_NS16550 },
537 	{ .compatible = "ingenic,jz4780-uart",	.data = PORT_JZ4780  },
538 	{ .compatible = "nvidia,tegra20-uart",	.data = PORT_NS16550 },
539 	{ .compatible = "snps,dw-apb-uart",	.data = PORT_NS16550 },
540 	{ .compatible = "ti,omap2-uart",	.data = PORT_NS16550 },
541 	{ .compatible = "ti,omap3-uart",	.data = PORT_NS16550 },
542 	{ .compatible = "ti,omap4-uart",	.data = PORT_NS16550 },
543 	{ .compatible = "ti,am3352-uart",	.data = PORT_NS16550 },
544 	{ .compatible = "ti,am4372-uart",	.data = PORT_NS16550 },
545 	{ .compatible = "ti,dra742-uart",	.data = PORT_NS16550 },
546 	{}
547 };
548 #endif /* OF_CONTROL && !OF_PLATDATA */
549 
550 /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
551 #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
552 U_BOOT_DRIVER(ns16550_serial) = {
553 	.name	= "ns16550_serial",
554 	.id	= UCLASS_SERIAL,
555 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
556 	.of_match = ns16550_serial_ids,
557 	.ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
558 	.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
559 #endif
560 	.priv_auto_alloc_size = sizeof(struct NS16550),
561 	.probe = ns16550_serial_probe,
562 	.ops	= &ns16550_serial_ops,
563 	.flags	= DM_FLAG_PRE_RELOC,
564 };
565 #endif
566 #endif /* SERIAL_PRESENT */
567 
568 #endif /* CONFIG_DM_SERIAL */
569