xref: /rk3399_rockchip-uboot/drivers/serial/mcfuart.c (revision c7e8410e3c174bfde72aa548f7fe5b4e43ccc4fb)
1 /*
2  * (C) Copyright 2004-2007 Freescale Semiconductor, Inc.
3  * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  *
23  */
24 
25 /*
26  * Minimal serial functions needed to use one of the uart ports
27  * as serial console interface.
28  */
29 
30 #include <common.h>
31 #include <asm/immap.h>
32 #include <asm/uart.h>
33 
34 DECLARE_GLOBAL_DATA_PTR;
35 
36 #ifdef CONFIG_MCFSERIAL
37 int serial_init(void)
38 {
39 	volatile uart_t *uart;
40 	u32 counter;
41 
42 	uart = (volatile uart_t *)(CFG_UART_BASE);
43 
44 	/* write to SICR: SIM2 = uart mode,dcd does not affect rx */
45 	uart->ucr = UART_UCR_RESET_RX;
46 	uart->ucr = UART_UCR_RESET_TX;
47 	uart->ucr = UART_UCR_RESET_ERROR;
48 	uart->ucr = UART_UCR_RESET_MR;
49 	__asm__("nop");
50 
51 	uart->uimr = 0;
52 
53 	/* write to CSR: RX/TX baud rate from timers */
54 	uart->ucsr = (UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK);
55 
56 	uart->umr = (UART_UMR_BC_8 | UART_UMR_PM_NONE);
57 	uart->umr = UART_UMR_SB_STOP_BITS_1;
58 
59 	/* Setting up BaudRate */
60 	counter = (u32) (gd->bus_clk / (gd->baudrate));
61 	counter >>= 5;
62 
63 	/* write to CTUR: divide counter upper byte */
64 	uart->ubg1 = (u8) ((counter & 0xff00) >> 8);
65 	/* write to CTLR: divide counter lower byte */
66 	uart->ubg2 = (u8) (counter & 0x00ff);
67 
68 	uart->ucr = (UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED);
69 
70 	return (0);
71 }
72 
73 void serial_putc(const char c)
74 {
75 	volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE);
76 
77 	if (c == '\n')
78 		serial_putc('\r');
79 
80 	/* Wait for last character to go. */
81 	while (!(uart->usr & UART_USR_TXRDY)) ;
82 
83 	uart->utb = c;
84 }
85 
86 void serial_puts(const char *s)
87 {
88 	while (*s) {
89 		serial_putc(*s++);
90 	}
91 }
92 
93 int serial_getc(void)
94 {
95 	volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE);
96 
97 	/* Wait for a character to arrive. */
98 	while (!(uart->usr & UART_USR_RXRDY)) ;
99 	return uart->urb;
100 }
101 
102 int serial_tstc(void)
103 {
104 	volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE);
105 
106 	return (uart->usr & UART_USR_RXRDY);
107 }
108 
109 void serial_setbrg(void)
110 {
111 	volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE);
112 	u32 counter;
113 
114 	counter = ((gd->bus_clk / gd->baudrate)) >> 5;
115 	counter++;
116 
117 	/* write to CTUR: divide counter upper byte */
118 	uart->ubg1 = ((counter & 0xff00) >> 8);
119 	/* write to CTLR: divide counter lower byte */
120 	uart->ubg2 = (counter & 0x00ff);
121 
122 	uart->ucr = UART_UCR_RESET_RX;
123 	uart->ucr = UART_UCR_RESET_TX;
124 
125 	uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED;
126 }
127 #endif				/* CONFIG_MCFSERIAL */
128