xref: /rk3399_rockchip-uboot/drivers/serial/arm_dcc.c (revision 66e8f9da6879fe37f3159b3997bff874842dc51d)
1 /*
2  * Copyright (C) 2004-2007 ARM Limited.
3  * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
4  *
5  * This program is free software; you can redistribute it and/or
6  * modify it under the terms of the GNU General Public License version 2
7  * as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
17  *
18  * As a special exception, if other files instantiate templates or use macros
19  * or inline functions from this file, or you compile this file and link it
20  * with other works to produce a work based on this file, this file does not
21  * by itself cause the resulting work to be covered by the GNU General Public
22  * License. However the source code for this file must still be made available
23  * in accordance with section (3) of the GNU General Public License.
24 
25  * This exception does not invalidate any other reasons why a work based on
26  * this file might be covered by the GNU General Public License.
27  */
28 
29 #include <common.h>
30 #include <devices.h>
31 
32 #if defined(CONFIG_CPU_V6)
33 /*
34  * ARMV6
35  */
36 #define DCC_RBIT	(1 << 30)
37 #define DCC_WBIT	(1 << 29)
38 
39 #define write_dcc(x)	\
40 		__asm__ volatile ("mcr p14, 0, %0, c0, c5, 0\n" : : "r" (x))
41 
42 #define read_dcc(x)	\
43 		__asm__ volatile ("mrc p14, 0, %0, c0, c5, 0\n" : "=r" (x))
44 
45 #define status_dcc(x)	\
46 		__asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x))
47 
48 #else
49 #define DCC_RBIT	(1 << 0)
50 #define DCC_WBIT	(1 << 1)
51 
52 #define write_dcc(x)	\
53 		__asm__ volatile ("mcr p14, 0, %0, c1, c0, 0\n" : : "r" (x))
54 
55 #define read_dcc(x)	\
56 		__asm__ volatile ("mrc p14, 0, %0, c1, c0, 0\n" : "=r" (x))
57 
58 #define status_dcc(x)	\
59 		__asm__ volatile ("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (x))
60 
61 #endif
62 
63 #define can_read_dcc(x)	do {	\
64 		status_dcc(x);	\
65 		x &= DCC_RBIT;	\
66 		} while (0);
67 
68 #define can_write_dcc(x) do {	\
69 		status_dcc(x);	\
70 		x &= DCC_WBIT;	\
71 		x = (x == 0);	\
72 		} while (0);
73 
74 #define TIMEOUT_COUNT 0x4000000
75 
76 #ifndef CONFIG_ARM_DCC_MULTI
77 #define arm_dcc_init serial_init
78 void serial_setbrg(void) {}
79 #define arm_dcc_getc serial_getc
80 #define arm_dcc_putc serial_putc
81 #define arm_dcc_puts serial_puts
82 #define arm_dcc_tstc serial_tstc
83 #endif
84 
85 int arm_dcc_init(void)
86 {
87 	return 0;
88 }
89 
90 int arm_dcc_getc(void)
91 {
92 	int ch;
93 	register unsigned int reg;
94 
95 	do {
96 		can_read_dcc(reg);
97 	} while (!reg);
98 	read_dcc(ch);
99 
100 	return ch;
101 }
102 
103 void arm_dcc_putc(char ch)
104 {
105 	register unsigned int reg;
106 	unsigned int timeout_count = TIMEOUT_COUNT;
107 
108 	while (--timeout_count) {
109 		can_write_dcc(reg);
110 		if (reg)
111 			break;
112 	}
113 	if (timeout_count == 0)
114 		return;
115 	else
116 		write_dcc(ch);
117 }
118 
119 void arm_dcc_puts(const char *s)
120 {
121 	while (*s)
122 		arm_dcc_putc(*s++);
123 }
124 
125 int arm_dcc_tstc(void)
126 {
127 	register unsigned int reg;
128 
129 	can_read_dcc(reg);
130 
131 	return reg;
132 }
133 
134 #ifdef CONFIG_ARM_DCC_MULTI
135 static device_t arm_dcc_dev;
136 
137 int drv_arm_dcc_init(void)
138 {
139 	int rc;
140 
141 	/* Device initialization */
142 	memset(&arm_dcc_dev, 0, sizeof(arm_dcc_dev));
143 
144 	strcpy(arm_dcc_dev.name, "dcc");
145 	arm_dcc_dev.ext = 0;	/* No extensions */
146 	arm_dcc_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_OUTPUT;
147 	arm_dcc_dev.tstc = arm_dcc_tstc;	/* 'tstc' function */
148 	arm_dcc_dev.getc = arm_dcc_getc;	/* 'getc' function */
149 	arm_dcc_dev.putc = arm_dcc_putc;	/* 'putc' function */
150 	arm_dcc_dev.puts = arm_dcc_puts;	/* 'puts' function */
151 
152 	return device_register(&arm_dcc_dev);
153 }
154 #endif
155