195c6bc7dSMatthias Fuchs /*
295c6bc7dSMatthias Fuchs * (C) Copyright 2007
395c6bc7dSMatthias Fuchs * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com.
495c6bc7dSMatthias Fuchs *
5*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+
695c6bc7dSMatthias Fuchs */
795c6bc7dSMatthias Fuchs
895c6bc7dSMatthias Fuchs /*
995c6bc7dSMatthias Fuchs * Epson RX8025 RTC driver.
1095c6bc7dSMatthias Fuchs */
1195c6bc7dSMatthias Fuchs
1295c6bc7dSMatthias Fuchs #include <common.h>
1395c6bc7dSMatthias Fuchs #include <command.h>
1495c6bc7dSMatthias Fuchs #include <rtc.h>
1595c6bc7dSMatthias Fuchs #include <i2c.h>
1695c6bc7dSMatthias Fuchs
17871c18ddSMichal Simek #if defined(CONFIG_CMD_DATE)
1895c6bc7dSMatthias Fuchs
1995c6bc7dSMatthias Fuchs /*---------------------------------------------------------------------*/
2095c6bc7dSMatthias Fuchs #undef DEBUG_RTC
2195c6bc7dSMatthias Fuchs
2295c6bc7dSMatthias Fuchs #ifdef DEBUG_RTC
2395c6bc7dSMatthias Fuchs #define DEBUGR(fmt,args...) printf(fmt ,##args)
2495c6bc7dSMatthias Fuchs #else
2595c6bc7dSMatthias Fuchs #define DEBUGR(fmt,args...)
2695c6bc7dSMatthias Fuchs #endif
2795c6bc7dSMatthias Fuchs /*---------------------------------------------------------------------*/
2895c6bc7dSMatthias Fuchs
296d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #ifndef CONFIG_SYS_I2C_RTC_ADDR
306d0f6bcfSJean-Christophe PLAGNIOL-VILLARD # define CONFIG_SYS_I2C_RTC_ADDR 0x32
3195c6bc7dSMatthias Fuchs #endif
3295c6bc7dSMatthias Fuchs
3395c6bc7dSMatthias Fuchs /*
3495c6bc7dSMatthias Fuchs * RTC register addresses
3595c6bc7dSMatthias Fuchs */
3695c6bc7dSMatthias Fuchs #define RTC_SEC_REG_ADDR 0x00
3795c6bc7dSMatthias Fuchs #define RTC_MIN_REG_ADDR 0x01
3895c6bc7dSMatthias Fuchs #define RTC_HR_REG_ADDR 0x02
3995c6bc7dSMatthias Fuchs #define RTC_DAY_REG_ADDR 0x03
4095c6bc7dSMatthias Fuchs #define RTC_DATE_REG_ADDR 0x04
4195c6bc7dSMatthias Fuchs #define RTC_MON_REG_ADDR 0x05
4295c6bc7dSMatthias Fuchs #define RTC_YR_REG_ADDR 0x06
4395c6bc7dSMatthias Fuchs
4495c6bc7dSMatthias Fuchs #define RTC_CTL1_REG_ADDR 0x0e
4595c6bc7dSMatthias Fuchs #define RTC_CTL2_REG_ADDR 0x0f
4695c6bc7dSMatthias Fuchs
4795c6bc7dSMatthias Fuchs /*
4895c6bc7dSMatthias Fuchs * Control register 1 bits
4995c6bc7dSMatthias Fuchs */
5095c6bc7dSMatthias Fuchs #define RTC_CTL1_BIT_2412 0x20
5195c6bc7dSMatthias Fuchs
5295c6bc7dSMatthias Fuchs /*
5395c6bc7dSMatthias Fuchs * Control register 2 bits
5495c6bc7dSMatthias Fuchs */
5595c6bc7dSMatthias Fuchs #define RTC_CTL2_BIT_PON 0x10
5695c6bc7dSMatthias Fuchs #define RTC_CTL2_BIT_VDET 0x40
5795c6bc7dSMatthias Fuchs #define RTC_CTL2_BIT_XST 0x20
5895c6bc7dSMatthias Fuchs #define RTC_CTL2_BIT_VDSL 0x80
5995c6bc7dSMatthias Fuchs
6095c6bc7dSMatthias Fuchs /*
6195c6bc7dSMatthias Fuchs * Note: the RX8025 I2C RTC requires register
6295c6bc7dSMatthias Fuchs * reads and write to consist of a single bus
6395c6bc7dSMatthias Fuchs * cycle. It is not allowed to write the register
6495c6bc7dSMatthias Fuchs * address in a first cycle that is terminated by
6595c6bc7dSMatthias Fuchs * a STOP condition. The chips needs a 'restart'
6695c6bc7dSMatthias Fuchs * sequence (start sequence without a prior stop).
6795c6bc7dSMatthias Fuchs * This driver has been written for a 4xx board.
6895c6bc7dSMatthias Fuchs * U-Boot's 4xx i2c driver is currently not capable
6995c6bc7dSMatthias Fuchs * to generate such cycles to some work arounds
7095c6bc7dSMatthias Fuchs * are used.
7195c6bc7dSMatthias Fuchs */
7295c6bc7dSMatthias Fuchs
7395c6bc7dSMatthias Fuchs /* static uchar rtc_read (uchar reg); */
7495c6bc7dSMatthias Fuchs #define rtc_read(reg) buf[((reg) + 1) & 0xf]
7595c6bc7dSMatthias Fuchs
7695c6bc7dSMatthias Fuchs static void rtc_write (uchar reg, uchar val);
7795c6bc7dSMatthias Fuchs
7895c6bc7dSMatthias Fuchs /*
7995c6bc7dSMatthias Fuchs * Get the current time from the RTC
8095c6bc7dSMatthias Fuchs */
rtc_get(struct rtc_time * tmp)81b73a19e1SYuri Tikhonov int rtc_get (struct rtc_time *tmp)
8295c6bc7dSMatthias Fuchs {
83b73a19e1SYuri Tikhonov int rel = 0;
8495c6bc7dSMatthias Fuchs uchar sec, min, hour, mday, wday, mon, year, ctl2;
8595c6bc7dSMatthias Fuchs uchar buf[16];
8695c6bc7dSMatthias Fuchs
876d0f6bcfSJean-Christophe PLAGNIOL-VILLARD if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 16))
8895c6bc7dSMatthias Fuchs printf("Error reading from RTC\n");
8995c6bc7dSMatthias Fuchs
9095c6bc7dSMatthias Fuchs sec = rtc_read(RTC_SEC_REG_ADDR);
9195c6bc7dSMatthias Fuchs min = rtc_read(RTC_MIN_REG_ADDR);
9295c6bc7dSMatthias Fuchs hour = rtc_read(RTC_HR_REG_ADDR);
9395c6bc7dSMatthias Fuchs wday = rtc_read(RTC_DAY_REG_ADDR);
9495c6bc7dSMatthias Fuchs mday = rtc_read(RTC_DATE_REG_ADDR);
9595c6bc7dSMatthias Fuchs mon = rtc_read(RTC_MON_REG_ADDR);
9695c6bc7dSMatthias Fuchs year = rtc_read(RTC_YR_REG_ADDR);
9795c6bc7dSMatthias Fuchs
9895c6bc7dSMatthias Fuchs DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
9995c6bc7dSMatthias Fuchs "hr: %02x min: %02x sec: %02x\n",
10095c6bc7dSMatthias Fuchs year, mon, mday, wday, hour, min, sec);
10195c6bc7dSMatthias Fuchs
10295c6bc7dSMatthias Fuchs /* dump status */
10395c6bc7dSMatthias Fuchs ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
104b73a19e1SYuri Tikhonov if (ctl2 & RTC_CTL2_BIT_PON) {
10595c6bc7dSMatthias Fuchs printf("RTC: power-on detected\n");
106b73a19e1SYuri Tikhonov rel = -1;
107b73a19e1SYuri Tikhonov }
10895c6bc7dSMatthias Fuchs
109b73a19e1SYuri Tikhonov if (ctl2 & RTC_CTL2_BIT_VDET) {
11095c6bc7dSMatthias Fuchs printf("RTC: voltage drop detected\n");
111b73a19e1SYuri Tikhonov rel = -1;
112b73a19e1SYuri Tikhonov }
11395c6bc7dSMatthias Fuchs
114b73a19e1SYuri Tikhonov if (!(ctl2 & RTC_CTL2_BIT_XST)) {
11595c6bc7dSMatthias Fuchs printf("RTC: oscillator stop detected\n");
116b73a19e1SYuri Tikhonov rel = -1;
117b73a19e1SYuri Tikhonov }
11895c6bc7dSMatthias Fuchs
11995c6bc7dSMatthias Fuchs tmp->tm_sec = bcd2bin (sec & 0x7F);
12095c6bc7dSMatthias Fuchs tmp->tm_min = bcd2bin (min & 0x7F);
1215875d358SYuri Tikhonov if (rtc_read(RTC_CTL1_REG_ADDR) & RTC_CTL1_BIT_2412)
12295c6bc7dSMatthias Fuchs tmp->tm_hour = bcd2bin (hour & 0x3F);
1235875d358SYuri Tikhonov else
1245875d358SYuri Tikhonov tmp->tm_hour = bcd2bin (hour & 0x1F) % 12 +
1255875d358SYuri Tikhonov ((hour & 0x20) ? 12 : 0);
12695c6bc7dSMatthias Fuchs tmp->tm_mday = bcd2bin (mday & 0x3F);
12795c6bc7dSMatthias Fuchs tmp->tm_mon = bcd2bin (mon & 0x1F);
12895c6bc7dSMatthias Fuchs tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
12995c6bc7dSMatthias Fuchs tmp->tm_wday = bcd2bin (wday & 0x07);
13095c6bc7dSMatthias Fuchs tmp->tm_yday = 0;
13195c6bc7dSMatthias Fuchs tmp->tm_isdst= 0;
13295c6bc7dSMatthias Fuchs
13395c6bc7dSMatthias Fuchs DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
13495c6bc7dSMatthias Fuchs tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
13595c6bc7dSMatthias Fuchs tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
136b73a19e1SYuri Tikhonov
137b73a19e1SYuri Tikhonov return rel;
13895c6bc7dSMatthias Fuchs }
13995c6bc7dSMatthias Fuchs
14095c6bc7dSMatthias Fuchs /*
14195c6bc7dSMatthias Fuchs * Set the RTC
14295c6bc7dSMatthias Fuchs */
rtc_set(struct rtc_time * tmp)143d1e23194SJean-Christophe PLAGNIOL-VILLARD int rtc_set (struct rtc_time *tmp)
14495c6bc7dSMatthias Fuchs {
14595c6bc7dSMatthias Fuchs DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
14695c6bc7dSMatthias Fuchs tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
14795c6bc7dSMatthias Fuchs tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
14895c6bc7dSMatthias Fuchs
14995c6bc7dSMatthias Fuchs if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
15095c6bc7dSMatthias Fuchs printf("WARNING: year should be between 1970 and 2069!\n");
15195c6bc7dSMatthias Fuchs
15295c6bc7dSMatthias Fuchs rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
15395c6bc7dSMatthias Fuchs rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon));
15495c6bc7dSMatthias Fuchs rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday));
15595c6bc7dSMatthias Fuchs rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
15695c6bc7dSMatthias Fuchs rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
15795c6bc7dSMatthias Fuchs rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
15895c6bc7dSMatthias Fuchs rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
15995c6bc7dSMatthias Fuchs
16095c6bc7dSMatthias Fuchs rtc_write (RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412);
161d1e23194SJean-Christophe PLAGNIOL-VILLARD
162d1e23194SJean-Christophe PLAGNIOL-VILLARD return 0;
16395c6bc7dSMatthias Fuchs }
16495c6bc7dSMatthias Fuchs
16595c6bc7dSMatthias Fuchs /*
16695c6bc7dSMatthias Fuchs * Reset the RTC. We setting the date back to 1970-01-01.
16795c6bc7dSMatthias Fuchs */
rtc_reset(void)16895c6bc7dSMatthias Fuchs void rtc_reset (void)
16995c6bc7dSMatthias Fuchs {
17095c6bc7dSMatthias Fuchs struct rtc_time tmp;
17195c6bc7dSMatthias Fuchs uchar buf[16];
17295c6bc7dSMatthias Fuchs uchar ctl2;
17395c6bc7dSMatthias Fuchs
1746d0f6bcfSJean-Christophe PLAGNIOL-VILLARD if (i2c_read(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 16))
17595c6bc7dSMatthias Fuchs printf("Error reading from RTC\n");
17695c6bc7dSMatthias Fuchs
17795c6bc7dSMatthias Fuchs ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
17895c6bc7dSMatthias Fuchs ctl2 &= ~(RTC_CTL2_BIT_PON | RTC_CTL2_BIT_VDET);
17995c6bc7dSMatthias Fuchs ctl2 |= RTC_CTL2_BIT_XST | RTC_CTL2_BIT_VDSL;
18095c6bc7dSMatthias Fuchs rtc_write (RTC_CTL2_REG_ADDR, ctl2);
18195c6bc7dSMatthias Fuchs
18295c6bc7dSMatthias Fuchs tmp.tm_year = 1970;
18395c6bc7dSMatthias Fuchs tmp.tm_mon = 1;
18495c6bc7dSMatthias Fuchs tmp.tm_mday= 1;
18595c6bc7dSMatthias Fuchs tmp.tm_hour = 0;
18695c6bc7dSMatthias Fuchs tmp.tm_min = 0;
18795c6bc7dSMatthias Fuchs tmp.tm_sec = 0;
18895c6bc7dSMatthias Fuchs
18995c6bc7dSMatthias Fuchs rtc_set(&tmp);
19095c6bc7dSMatthias Fuchs
19195c6bc7dSMatthias Fuchs printf ( "RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
19295c6bc7dSMatthias Fuchs tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
19395c6bc7dSMatthias Fuchs tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
19495c6bc7dSMatthias Fuchs
19595c6bc7dSMatthias Fuchs return;
19695c6bc7dSMatthias Fuchs }
19795c6bc7dSMatthias Fuchs
19895c6bc7dSMatthias Fuchs /*
19995c6bc7dSMatthias Fuchs * Helper functions
20095c6bc7dSMatthias Fuchs */
rtc_write(uchar reg,uchar val)20195c6bc7dSMatthias Fuchs static void rtc_write (uchar reg, uchar val)
20295c6bc7dSMatthias Fuchs {
20395c6bc7dSMatthias Fuchs uchar buf[2];
20495c6bc7dSMatthias Fuchs buf[0] = reg << 4;
20595c6bc7dSMatthias Fuchs buf[1] = val;
2066d0f6bcfSJean-Christophe PLAGNIOL-VILLARD if (i2c_write(CONFIG_SYS_I2C_RTC_ADDR, 0, 0, buf, 2) != 0)
20795c6bc7dSMatthias Fuchs printf("Error writing to RTC\n");
20895c6bc7dSMatthias Fuchs
20995c6bc7dSMatthias Fuchs }
21095c6bc7dSMatthias Fuchs
2111b769881SJean-Christophe PLAGNIOL-VILLARD #endif /* CONFIG_RTC_RX8025 && CONFIG_CMD_DATE */
212