10c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
20c698dcaSJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2001
30c698dcaSJean-Christophe PLAGNIOL-VILLARD * Denis Peter MPL AG Switzerland. d.peter@mpl.ch
40c698dcaSJean-Christophe PLAGNIOL-VILLARD *
51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+
60c698dcaSJean-Christophe PLAGNIOL-VILLARD */
70c698dcaSJean-Christophe PLAGNIOL-VILLARD
80c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
90c698dcaSJean-Christophe PLAGNIOL-VILLARD * Date & Time support for the MC146818 (PIXX4) RTC
100c698dcaSJean-Christophe PLAGNIOL-VILLARD */
110c698dcaSJean-Christophe PLAGNIOL-VILLARD
120c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <common.h>
130c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <command.h>
14ed2ac0d5SBin Meng #include <dm.h>
150c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <rtc.h>
160c698dcaSJean-Christophe PLAGNIOL-VILLARD
17*3f14f814SSimon Glass #if defined(CONFIG_X86) || defined(CONFIG_MALTA)
1821831001SGraeme Russ #include <asm/io.h>
1921831001SGraeme Russ #define in8(p) inb(p)
2021831001SGraeme Russ #define out8(p, v) outb(v, p)
2121831001SGraeme Russ #endif
2221831001SGraeme Russ
23871c18ddSMichal Simek #if defined(CONFIG_CMD_DATE)
240c698dcaSJean-Christophe PLAGNIOL-VILLARD
25c6577f72SSimon Glass /* Set this to 1 to clear the CMOS RAM */
26c6577f72SSimon Glass #define CLEAR_CMOS 0
27c6577f72SSimon Glass
286d0f6bcfSJean-Christophe PLAGNIOL-VILLARD #define RTC_PORT_MC146818 CONFIG_SYS_ISA_IO_BASE_ADDRESS + 0x70
290c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_SECONDS 0x00
300c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_SECONDS_ALARM 0x01
310c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MINUTES 0x02
320c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MINUTES_ALARM 0x03
330c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_HOURS 0x04
340c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_HOURS_ALARM 0x05
350c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DAY_OF_WEEK 0x06
360c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DATE_OF_MONTH 0x07
370c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MONTH 0x08
380c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_YEAR 0x09
39ed2ac0d5SBin Meng #define RTC_CONFIG_A 0x0a
40ed2ac0d5SBin Meng #define RTC_CONFIG_B 0x0b
41ed2ac0d5SBin Meng #define RTC_CONFIG_C 0x0c
42ed2ac0d5SBin Meng #define RTC_CONFIG_D 0x0d
43c6577f72SSimon Glass #define RTC_REG_SIZE 0x80
440c698dcaSJean-Christophe PLAGNIOL-VILLARD
45c6577f72SSimon Glass #define RTC_CONFIG_A_REF_CLCK_32KHZ (1 << 5)
46c6577f72SSimon Glass #define RTC_CONFIG_A_RATE_1024HZ 6
47c6577f72SSimon Glass
48c6577f72SSimon Glass #define RTC_CONFIG_B_24H (1 << 1)
49c6577f72SSimon Glass
50c6577f72SSimon Glass #define RTC_CONFIG_D_VALID_RAM_AND_TIME 0x80
510c698dcaSJean-Christophe PLAGNIOL-VILLARD
mc146818_read8(int reg)52ed2ac0d5SBin Meng static int mc146818_read8(int reg)
530c698dcaSJean-Christophe PLAGNIOL-VILLARD {
54fc4860c0SSimon Glass #ifdef CONFIG_SYS_RTC_REG_BASE_ADDR
55c6577f72SSimon Glass return in8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg);
560c698dcaSJean-Christophe PLAGNIOL-VILLARD #else
57fc4860c0SSimon Glass int ofs = 0;
58fc4860c0SSimon Glass
59fc4860c0SSimon Glass if (reg >= 128) {
60fc4860c0SSimon Glass ofs = 2;
61fc4860c0SSimon Glass reg -= 128;
62fc4860c0SSimon Glass }
63fc4860c0SSimon Glass out8(RTC_PORT_MC146818 + ofs, reg);
64fc4860c0SSimon Glass
65fc4860c0SSimon Glass return in8(RTC_PORT_MC146818 + ofs + 1);
66fc4860c0SSimon Glass #endif
670c698dcaSJean-Christophe PLAGNIOL-VILLARD }
680c698dcaSJean-Christophe PLAGNIOL-VILLARD
mc146818_write8(int reg,uchar val)69ed2ac0d5SBin Meng static void mc146818_write8(int reg, uchar val)
700c698dcaSJean-Christophe PLAGNIOL-VILLARD {
71fc4860c0SSimon Glass #ifdef CONFIG_SYS_RTC_REG_BASE_ADDR
72fc4860c0SSimon Glass out8(CONFIG_SYS_RTC_REG_BASE_ADDR + reg, val);
73fc4860c0SSimon Glass #else
74fc4860c0SSimon Glass int ofs = 0;
75fc4860c0SSimon Glass
76fc4860c0SSimon Glass if (reg >= 128) {
77fc4860c0SSimon Glass ofs = 2;
78fc4860c0SSimon Glass reg -= 128;
790c698dcaSJean-Christophe PLAGNIOL-VILLARD }
80fc4860c0SSimon Glass out8(RTC_PORT_MC146818 + ofs, reg);
81fc4860c0SSimon Glass out8(RTC_PORT_MC146818 + ofs + 1, val);
820c698dcaSJean-Christophe PLAGNIOL-VILLARD #endif
83fc4860c0SSimon Glass }
84fc4860c0SSimon Glass
mc146818_get(struct rtc_time * tmp)85ed2ac0d5SBin Meng static int mc146818_get(struct rtc_time *tmp)
86ed2ac0d5SBin Meng {
87ed2ac0d5SBin Meng uchar sec, min, hour, mday, wday, mon, year;
88ed2ac0d5SBin Meng
89ed2ac0d5SBin Meng /* here check if rtc can be accessed */
90ed2ac0d5SBin Meng while ((mc146818_read8(RTC_CONFIG_A) & 0x80) == 0x80)
91ed2ac0d5SBin Meng ;
92ed2ac0d5SBin Meng
93ed2ac0d5SBin Meng sec = mc146818_read8(RTC_SECONDS);
94ed2ac0d5SBin Meng min = mc146818_read8(RTC_MINUTES);
95ed2ac0d5SBin Meng hour = mc146818_read8(RTC_HOURS);
96ed2ac0d5SBin Meng mday = mc146818_read8(RTC_DATE_OF_MONTH);
97ed2ac0d5SBin Meng wday = mc146818_read8(RTC_DAY_OF_WEEK);
98ed2ac0d5SBin Meng mon = mc146818_read8(RTC_MONTH);
99ed2ac0d5SBin Meng year = mc146818_read8(RTC_YEAR);
100ed2ac0d5SBin Meng #ifdef RTC_DEBUG
101ed2ac0d5SBin Meng printf("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x hr: %02x min: %02x sec: %02x\n",
102ed2ac0d5SBin Meng year, mon, mday, wday, hour, min, sec);
103ed2ac0d5SBin Meng printf("Alarms: month: %02x hour: %02x min: %02x sec: %02x\n",
104ed2ac0d5SBin Meng mc146818_read8(RTC_CONFIG_D) & 0x3f,
105ed2ac0d5SBin Meng mc146818_read8(RTC_HOURS_ALARM),
106ed2ac0d5SBin Meng mc146818_read8(RTC_MINUTES_ALARM),
107ed2ac0d5SBin Meng mc146818_read8(RTC_SECONDS_ALARM));
108ed2ac0d5SBin Meng #endif
109ed2ac0d5SBin Meng tmp->tm_sec = bcd2bin(sec & 0x7f);
110ed2ac0d5SBin Meng tmp->tm_min = bcd2bin(min & 0x7f);
111ed2ac0d5SBin Meng tmp->tm_hour = bcd2bin(hour & 0x3f);
112ed2ac0d5SBin Meng tmp->tm_mday = bcd2bin(mday & 0x3f);
113ed2ac0d5SBin Meng tmp->tm_mon = bcd2bin(mon & 0x1f);
114ed2ac0d5SBin Meng tmp->tm_year = bcd2bin(year);
115ed2ac0d5SBin Meng tmp->tm_wday = bcd2bin(wday & 0x07);
116ed2ac0d5SBin Meng
117ed2ac0d5SBin Meng if (tmp->tm_year < 70)
118ed2ac0d5SBin Meng tmp->tm_year += 2000;
119ed2ac0d5SBin Meng else
120ed2ac0d5SBin Meng tmp->tm_year += 1900;
121ed2ac0d5SBin Meng
122ed2ac0d5SBin Meng tmp->tm_yday = 0;
123ed2ac0d5SBin Meng tmp->tm_isdst = 0;
124ed2ac0d5SBin Meng #ifdef RTC_DEBUG
125ed2ac0d5SBin Meng printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
126ed2ac0d5SBin Meng tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
127ed2ac0d5SBin Meng tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
128ed2ac0d5SBin Meng #endif
129ed2ac0d5SBin Meng
130ed2ac0d5SBin Meng return 0;
131ed2ac0d5SBin Meng }
132ed2ac0d5SBin Meng
mc146818_set(struct rtc_time * tmp)133ed2ac0d5SBin Meng static int mc146818_set(struct rtc_time *tmp)
134ed2ac0d5SBin Meng {
135ed2ac0d5SBin Meng #ifdef RTC_DEBUG
136ed2ac0d5SBin Meng printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
137ed2ac0d5SBin Meng tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
138ed2ac0d5SBin Meng tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
139ed2ac0d5SBin Meng #endif
140ed2ac0d5SBin Meng /* Disable the RTC to update the regs */
141ed2ac0d5SBin Meng mc146818_write8(RTC_CONFIG_B, 0x82);
142ed2ac0d5SBin Meng
143ed2ac0d5SBin Meng mc146818_write8(RTC_YEAR, bin2bcd(tmp->tm_year % 100));
144ed2ac0d5SBin Meng mc146818_write8(RTC_MONTH, bin2bcd(tmp->tm_mon));
145ed2ac0d5SBin Meng mc146818_write8(RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday));
146ed2ac0d5SBin Meng mc146818_write8(RTC_DATE_OF_MONTH, bin2bcd(tmp->tm_mday));
147ed2ac0d5SBin Meng mc146818_write8(RTC_HOURS, bin2bcd(tmp->tm_hour));
148ed2ac0d5SBin Meng mc146818_write8(RTC_MINUTES, bin2bcd(tmp->tm_min));
149ed2ac0d5SBin Meng mc146818_write8(RTC_SECONDS, bin2bcd(tmp->tm_sec));
150ed2ac0d5SBin Meng
151ed2ac0d5SBin Meng /* Enable the RTC to update the regs */
152ed2ac0d5SBin Meng mc146818_write8(RTC_CONFIG_B, 0x02);
153ed2ac0d5SBin Meng
154ed2ac0d5SBin Meng return 0;
155ed2ac0d5SBin Meng }
156ed2ac0d5SBin Meng
mc146818_reset(void)157ed2ac0d5SBin Meng static void mc146818_reset(void)
158ed2ac0d5SBin Meng {
159ed2ac0d5SBin Meng /* Disable the RTC to update the regs */
160ed2ac0d5SBin Meng mc146818_write8(RTC_CONFIG_B, 0x82);
161ed2ac0d5SBin Meng
162ed2ac0d5SBin Meng /* Normal OP */
163ed2ac0d5SBin Meng mc146818_write8(RTC_CONFIG_A, 0x20);
164ed2ac0d5SBin Meng mc146818_write8(RTC_CONFIG_B, 0x00);
165ed2ac0d5SBin Meng mc146818_write8(RTC_CONFIG_B, 0x00);
166ed2ac0d5SBin Meng
167ed2ac0d5SBin Meng /* Enable the RTC to update the regs */
168ed2ac0d5SBin Meng mc146818_write8(RTC_CONFIG_B, 0x02);
169ed2ac0d5SBin Meng }
170ed2ac0d5SBin Meng
mc146818_init(void)171ed2ac0d5SBin Meng static void mc146818_init(void)
172ed2ac0d5SBin Meng {
173ed2ac0d5SBin Meng #if CLEAR_CMOS
174ed2ac0d5SBin Meng int i;
175ed2ac0d5SBin Meng
176ed2ac0d5SBin Meng rtc_write8(RTC_SECONDS_ALARM, 0);
177ed2ac0d5SBin Meng rtc_write8(RTC_MINUTES_ALARM, 0);
178ed2ac0d5SBin Meng rtc_write8(RTC_HOURS_ALARM, 0);
179ed2ac0d5SBin Meng for (i = RTC_CONFIG_A; i < RTC_REG_SIZE; i++)
180ed2ac0d5SBin Meng rtc_write8(i, 0);
181ed2ac0d5SBin Meng printf("RTC: zeroing CMOS RAM\n");
182ed2ac0d5SBin Meng #endif
183ed2ac0d5SBin Meng
184ed2ac0d5SBin Meng /* Setup the real time clock */
185ed2ac0d5SBin Meng mc146818_write8(RTC_CONFIG_B, RTC_CONFIG_B_24H);
186ed2ac0d5SBin Meng /* Setup the frequency it operates at */
187ed2ac0d5SBin Meng mc146818_write8(RTC_CONFIG_A, RTC_CONFIG_A_REF_CLCK_32KHZ |
188ed2ac0d5SBin Meng RTC_CONFIG_A_RATE_1024HZ);
189ed2ac0d5SBin Meng /* Ensure all reserved bits are 0 in register D */
190ed2ac0d5SBin Meng mc146818_write8(RTC_CONFIG_D, RTC_CONFIG_D_VALID_RAM_AND_TIME);
191ed2ac0d5SBin Meng
192ed2ac0d5SBin Meng /* Clear any pending interrupts */
193ed2ac0d5SBin Meng mc146818_read8(RTC_CONFIG_C);
194ed2ac0d5SBin Meng }
1951bcb5c3aSSimon Glass #endif /* CONFIG_CMD_DATE */
196ed2ac0d5SBin Meng
197ed2ac0d5SBin Meng #ifdef CONFIG_DM_RTC
198ed2ac0d5SBin Meng
rtc_mc146818_get(struct udevice * dev,struct rtc_time * time)199ed2ac0d5SBin Meng static int rtc_mc146818_get(struct udevice *dev, struct rtc_time *time)
200ed2ac0d5SBin Meng {
201ed2ac0d5SBin Meng return mc146818_get(time);
202ed2ac0d5SBin Meng }
203ed2ac0d5SBin Meng
rtc_mc146818_set(struct udevice * dev,const struct rtc_time * time)204ed2ac0d5SBin Meng static int rtc_mc146818_set(struct udevice *dev, const struct rtc_time *time)
205ed2ac0d5SBin Meng {
206ed2ac0d5SBin Meng return mc146818_set((struct rtc_time *)time);
207ed2ac0d5SBin Meng }
208ed2ac0d5SBin Meng
rtc_mc146818_reset(struct udevice * dev)209ed2ac0d5SBin Meng static int rtc_mc146818_reset(struct udevice *dev)
210ed2ac0d5SBin Meng {
211ed2ac0d5SBin Meng mc146818_reset();
212ed2ac0d5SBin Meng
213ed2ac0d5SBin Meng return 0;
214ed2ac0d5SBin Meng }
215ed2ac0d5SBin Meng
rtc_mc146818_read8(struct udevice * dev,unsigned int reg)216ed2ac0d5SBin Meng static int rtc_mc146818_read8(struct udevice *dev, unsigned int reg)
217ed2ac0d5SBin Meng {
218ed2ac0d5SBin Meng return mc146818_read8(reg);
219ed2ac0d5SBin Meng }
220ed2ac0d5SBin Meng
rtc_mc146818_write8(struct udevice * dev,unsigned int reg,int val)221ed2ac0d5SBin Meng static int rtc_mc146818_write8(struct udevice *dev, unsigned int reg, int val)
222ed2ac0d5SBin Meng {
223ed2ac0d5SBin Meng mc146818_write8(reg, val);
224ed2ac0d5SBin Meng
225ed2ac0d5SBin Meng return 0;
226ed2ac0d5SBin Meng }
227ed2ac0d5SBin Meng
rtc_mc146818_probe(struct udevice * dev)228b26eb886SSimon Glass static int rtc_mc146818_probe(struct udevice *dev)
229ed2ac0d5SBin Meng {
230ed2ac0d5SBin Meng mc146818_init();
231ed2ac0d5SBin Meng
232ed2ac0d5SBin Meng return 0;
233ed2ac0d5SBin Meng }
234ed2ac0d5SBin Meng
235ed2ac0d5SBin Meng static const struct rtc_ops rtc_mc146818_ops = {
236ed2ac0d5SBin Meng .get = rtc_mc146818_get,
237ed2ac0d5SBin Meng .set = rtc_mc146818_set,
238ed2ac0d5SBin Meng .reset = rtc_mc146818_reset,
239ed2ac0d5SBin Meng .read8 = rtc_mc146818_read8,
240ed2ac0d5SBin Meng .write8 = rtc_mc146818_write8,
241ed2ac0d5SBin Meng };
242ed2ac0d5SBin Meng
243ed2ac0d5SBin Meng static const struct udevice_id rtc_mc146818_ids[] = {
244ed2ac0d5SBin Meng { .compatible = "motorola,mc146818" },
245ed2ac0d5SBin Meng { }
246ed2ac0d5SBin Meng };
247ed2ac0d5SBin Meng
248ed2ac0d5SBin Meng U_BOOT_DRIVER(rtc_mc146818) = {
249ed2ac0d5SBin Meng .name = "rtc_mc146818",
250ed2ac0d5SBin Meng .id = UCLASS_RTC,
251ed2ac0d5SBin Meng .of_match = rtc_mc146818_ids,
252b26eb886SSimon Glass .probe = rtc_mc146818_probe,
253ed2ac0d5SBin Meng .ops = &rtc_mc146818_ops,
254ed2ac0d5SBin Meng };
255ed2ac0d5SBin Meng
256ed2ac0d5SBin Meng #else /* !CONFIG_DM_RTC */
257ed2ac0d5SBin Meng
rtc_get(struct rtc_time * tmp)258ed2ac0d5SBin Meng int rtc_get(struct rtc_time *tmp)
259ed2ac0d5SBin Meng {
260ed2ac0d5SBin Meng return mc146818_get(tmp);
261ed2ac0d5SBin Meng }
262ed2ac0d5SBin Meng
rtc_set(struct rtc_time * tmp)263ed2ac0d5SBin Meng int rtc_set(struct rtc_time *tmp)
264ed2ac0d5SBin Meng {
265ed2ac0d5SBin Meng return mc146818_set(tmp);
266ed2ac0d5SBin Meng }
267ed2ac0d5SBin Meng
rtc_reset(void)268ed2ac0d5SBin Meng void rtc_reset(void)
269ed2ac0d5SBin Meng {
270ed2ac0d5SBin Meng mc146818_reset();
271ed2ac0d5SBin Meng }
272ed2ac0d5SBin Meng
rtc_read8(int reg)273ed2ac0d5SBin Meng int rtc_read8(int reg)
274ed2ac0d5SBin Meng {
275ed2ac0d5SBin Meng return mc146818_read8(reg);
276ed2ac0d5SBin Meng }
277ed2ac0d5SBin Meng
rtc_write8(int reg,uchar val)278ed2ac0d5SBin Meng void rtc_write8(int reg, uchar val)
279ed2ac0d5SBin Meng {
280ed2ac0d5SBin Meng mc146818_write8(reg, val);
281ed2ac0d5SBin Meng }
282ed2ac0d5SBin Meng
rtc_read32(int reg)283fc4860c0SSimon Glass u32 rtc_read32(int reg)
284fc4860c0SSimon Glass {
285fc4860c0SSimon Glass u32 value = 0;
286fc4860c0SSimon Glass int i;
287fc4860c0SSimon Glass
288fc4860c0SSimon Glass for (i = 0; i < sizeof(value); i++)
289fc4860c0SSimon Glass value |= rtc_read8(reg + i) << (i << 3);
290fc4860c0SSimon Glass
291fc4860c0SSimon Glass return value;
292fc4860c0SSimon Glass }
293fc4860c0SSimon Glass
rtc_write32(int reg,u32 value)294fc4860c0SSimon Glass void rtc_write32(int reg, u32 value)
295fc4860c0SSimon Glass {
296fc4860c0SSimon Glass int i;
297fc4860c0SSimon Glass
298fc4860c0SSimon Glass for (i = 0; i < sizeof(value); i++)
299fc4860c0SSimon Glass rtc_write8(reg + i, (value >> (i << 3)) & 0xff);
300fc4860c0SSimon Glass }
3010c698dcaSJean-Christophe PLAGNIOL-VILLARD
rtc_init(void)302c6577f72SSimon Glass void rtc_init(void)
303c6577f72SSimon Glass {
304ed2ac0d5SBin Meng mc146818_init();
305c6577f72SSimon Glass }
306ed2ac0d5SBin Meng
307ed2ac0d5SBin Meng #endif /* CONFIG_DM_RTC */
308