1*0c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 2*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * (C) Copyright 2006 3*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * Markus Klotzbuecher, mk@denx.de 4*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * 5*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * See file CREDITS for list of people who contributed to this 6*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * project. 7*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * 8*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * This program is free software; you can redistribute it and/or 9*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * modify it under the terms of the GNU General Public License as 10*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * published by the Free Software Foundation; either version 2 of 11*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * the License, or (at your option) any later version. 12*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * 13*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * This program is distributed in the hope that it will be useful, 14*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * GNU General Public License for more details. 17*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * 18*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * You should have received a copy of the GNU General Public License 19*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * along with this program; if not, write to the Free Software 20*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * MA 02111-1307 USA 22*0c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 23*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 24*0c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 25*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim) 26*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * Extremly Accurate DS3231 Real Time Clock (RTC). 27*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * 28*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * copied from ds1337.c 29*0c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 30*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 31*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <common.h> 32*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <command.h> 33*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <rtc.h> 34*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <i2c.h> 35*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 36*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_RTC_DS3231) && defined(CONFIG_CMD_DATE) 37*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 38*0c698dcaSJean-Christophe PLAGNIOL-VILLARD /*---------------------------------------------------------------------*/ 39*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #undef DEBUG_RTC 40*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 41*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #ifdef DEBUG_RTC 42*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define DEBUGR(fmt,args...) printf(fmt ,##args) 43*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #else 44*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define DEBUGR(fmt,args...) 45*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #endif 46*0c698dcaSJean-Christophe PLAGNIOL-VILLARD /*---------------------------------------------------------------------*/ 47*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 48*0c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 49*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * RTC register addresses 50*0c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 51*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_SEC_REG_ADDR 0x0 52*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MIN_REG_ADDR 0x1 53*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_HR_REG_ADDR 0x2 54*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DAY_REG_ADDR 0x3 55*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DATE_REG_ADDR 0x4 56*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MON_REG_ADDR 0x5 57*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_YR_REG_ADDR 0x6 58*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_REG_ADDR 0x0e 59*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_STAT_REG_ADDR 0x0f 60*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 61*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 62*0c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 63*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * RTC control register bits 64*0c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 65*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */ 66*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */ 67*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */ 68*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */ 69*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */ 70*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */ 71*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 72*0c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 73*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * RTC status register bits 74*0c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 75*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */ 76*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */ 77*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */ 78*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 79*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 80*0c698dcaSJean-Christophe PLAGNIOL-VILLARD static uchar rtc_read (uchar reg); 81*0c698dcaSJean-Christophe PLAGNIOL-VILLARD static void rtc_write (uchar reg, uchar val); 82*0c698dcaSJean-Christophe PLAGNIOL-VILLARD static uchar bin2bcd (unsigned int n); 83*0c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned bcd2bin (uchar c); 84*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 85*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 86*0c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 87*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * Get the current time from the RTC 88*0c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 89*0c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_get (struct rtc_time *tmp) 90*0c698dcaSJean-Christophe PLAGNIOL-VILLARD { 91*0c698dcaSJean-Christophe PLAGNIOL-VILLARD uchar sec, min, hour, mday, wday, mon_cent, year, control, status; 92*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 93*0c698dcaSJean-Christophe PLAGNIOL-VILLARD control = rtc_read (RTC_CTL_REG_ADDR); 94*0c698dcaSJean-Christophe PLAGNIOL-VILLARD status = rtc_read (RTC_STAT_REG_ADDR); 95*0c698dcaSJean-Christophe PLAGNIOL-VILLARD sec = rtc_read (RTC_SEC_REG_ADDR); 96*0c698dcaSJean-Christophe PLAGNIOL-VILLARD min = rtc_read (RTC_MIN_REG_ADDR); 97*0c698dcaSJean-Christophe PLAGNIOL-VILLARD hour = rtc_read (RTC_HR_REG_ADDR); 98*0c698dcaSJean-Christophe PLAGNIOL-VILLARD wday = rtc_read (RTC_DAY_REG_ADDR); 99*0c698dcaSJean-Christophe PLAGNIOL-VILLARD mday = rtc_read (RTC_DATE_REG_ADDR); 100*0c698dcaSJean-Christophe PLAGNIOL-VILLARD mon_cent = rtc_read (RTC_MON_REG_ADDR); 101*0c698dcaSJean-Christophe PLAGNIOL-VILLARD year = rtc_read (RTC_YR_REG_ADDR); 102*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 103*0c698dcaSJean-Christophe PLAGNIOL-VILLARD DEBUGR ("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " 104*0c698dcaSJean-Christophe PLAGNIOL-VILLARD "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n", 105*0c698dcaSJean-Christophe PLAGNIOL-VILLARD year, mon_cent, mday, wday, hour, min, sec, control, status); 106*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 107*0c698dcaSJean-Christophe PLAGNIOL-VILLARD if (status & RTC_STAT_BIT_OSF) { 108*0c698dcaSJean-Christophe PLAGNIOL-VILLARD printf ("### Warning: RTC oscillator has stopped\n"); 109*0c698dcaSJean-Christophe PLAGNIOL-VILLARD /* clear the OSF flag */ 110*0c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_STAT_REG_ADDR, 111*0c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF); 112*0c698dcaSJean-Christophe PLAGNIOL-VILLARD } 113*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 114*0c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_sec = bcd2bin (sec & 0x7F); 115*0c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_min = bcd2bin (min & 0x7F); 116*0c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour = bcd2bin (hour & 0x3F); 117*0c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_mday = bcd2bin (mday & 0x3F); 118*0c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_mon = bcd2bin (mon_cent & 0x1F); 119*0c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900); 120*0c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_wday = bcd2bin ((wday - 1) & 0x07); 121*0c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_yday = 0; 122*0c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_isdst= 0; 123*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 124*0c698dcaSJean-Christophe PLAGNIOL-VILLARD DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 125*0c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 126*0c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 127*0c698dcaSJean-Christophe PLAGNIOL-VILLARD } 128*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 129*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 130*0c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 131*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * Set the RTC 132*0c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 133*0c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_set (struct rtc_time *tmp) 134*0c698dcaSJean-Christophe PLAGNIOL-VILLARD { 135*0c698dcaSJean-Christophe PLAGNIOL-VILLARD uchar century; 136*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 137*0c698dcaSJean-Christophe PLAGNIOL-VILLARD DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", 138*0c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, 139*0c698dcaSJean-Christophe PLAGNIOL-VILLARD tmp->tm_hour, tmp->tm_min, tmp->tm_sec); 140*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 141*0c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100)); 142*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 143*0c698dcaSJean-Christophe PLAGNIOL-VILLARD century = (tmp->tm_year >= 2000) ? 0x80 : 0; 144*0c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century); 145*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 146*0c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1)); 147*0c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday)); 148*0c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour)); 149*0c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min)); 150*0c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec)); 151*0c698dcaSJean-Christophe PLAGNIOL-VILLARD } 152*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 153*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 154*0c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 155*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * Reset the RTC. We also enable the oscillator output on the 156*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * SQW/INTB* pin and program it for 32,768 Hz output. Note that 157*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * according to the datasheet, turning on the square wave output 158*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * increases the current drain on the backup battery from about 159*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * 600 nA to 2uA. 160*0c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 161*0c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_reset (void) 162*0c698dcaSJean-Christophe PLAGNIOL-VILLARD { 163*0c698dcaSJean-Christophe PLAGNIOL-VILLARD rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2); 164*0c698dcaSJean-Christophe PLAGNIOL-VILLARD } 165*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 166*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 167*0c698dcaSJean-Christophe PLAGNIOL-VILLARD /* 168*0c698dcaSJean-Christophe PLAGNIOL-VILLARD * Helper functions 169*0c698dcaSJean-Christophe PLAGNIOL-VILLARD */ 170*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 171*0c698dcaSJean-Christophe PLAGNIOL-VILLARD static 172*0c698dcaSJean-Christophe PLAGNIOL-VILLARD uchar rtc_read (uchar reg) 173*0c698dcaSJean-Christophe PLAGNIOL-VILLARD { 174*0c698dcaSJean-Christophe PLAGNIOL-VILLARD return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg)); 175*0c698dcaSJean-Christophe PLAGNIOL-VILLARD } 176*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 177*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 178*0c698dcaSJean-Christophe PLAGNIOL-VILLARD static void rtc_write (uchar reg, uchar val) 179*0c698dcaSJean-Christophe PLAGNIOL-VILLARD { 180*0c698dcaSJean-Christophe PLAGNIOL-VILLARD i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val); 181*0c698dcaSJean-Christophe PLAGNIOL-VILLARD } 182*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 183*0c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned bcd2bin (uchar n) 184*0c698dcaSJean-Christophe PLAGNIOL-VILLARD { 185*0c698dcaSJean-Christophe PLAGNIOL-VILLARD return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F)); 186*0c698dcaSJean-Christophe PLAGNIOL-VILLARD } 187*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 188*0c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char bin2bcd (unsigned int n) 189*0c698dcaSJean-Christophe PLAGNIOL-VILLARD { 190*0c698dcaSJean-Christophe PLAGNIOL-VILLARD return (((n / 10) << 4) | (n % 10)); 191*0c698dcaSJean-Christophe PLAGNIOL-VILLARD } 192*0c698dcaSJean-Christophe PLAGNIOL-VILLARD 193*0c698dcaSJean-Christophe PLAGNIOL-VILLARD #endif 194