xref: /rk3399_rockchip-uboot/drivers/rtc/ds1337.c (revision b73a19e1609d0f705cbab8014ca17aefe89e4c76)
10c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
20c698dcaSJean-Christophe PLAGNIOL-VILLARD  * (C) Copyright 2001, 2002
30c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
40c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Keith Outwater, keith_outwater@mvis.com`
50c698dcaSJean-Christophe PLAGNIOL-VILLARD  *
60c698dcaSJean-Christophe PLAGNIOL-VILLARD  * See file CREDITS for list of people who contributed to this
70c698dcaSJean-Christophe PLAGNIOL-VILLARD  * project.
80c698dcaSJean-Christophe PLAGNIOL-VILLARD  *
90c698dcaSJean-Christophe PLAGNIOL-VILLARD  * This program is free software; you can redistribute it and/or
100c698dcaSJean-Christophe PLAGNIOL-VILLARD  * modify it under the terms of the GNU General Public License as
110c698dcaSJean-Christophe PLAGNIOL-VILLARD  * published by the Free Software Foundation; either version 2 of
120c698dcaSJean-Christophe PLAGNIOL-VILLARD  * the License, or (at your option) any later version.
130c698dcaSJean-Christophe PLAGNIOL-VILLARD  *
140c698dcaSJean-Christophe PLAGNIOL-VILLARD  * This program is distributed in the hope that it will be useful,
150c698dcaSJean-Christophe PLAGNIOL-VILLARD  * but WITHOUT ANY WARRANTY; without even the implied warranty of
160c698dcaSJean-Christophe PLAGNIOL-VILLARD  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
170c698dcaSJean-Christophe PLAGNIOL-VILLARD  * GNU General Public License for more details.
180c698dcaSJean-Christophe PLAGNIOL-VILLARD  *
190c698dcaSJean-Christophe PLAGNIOL-VILLARD  * You should have received a copy of the GNU General Public License
200c698dcaSJean-Christophe PLAGNIOL-VILLARD  * along with this program; if not, write to the Free Software
210c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
220c698dcaSJean-Christophe PLAGNIOL-VILLARD  * MA 02111-1307 USA
230c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
240c698dcaSJean-Christophe PLAGNIOL-VILLARD 
250c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
260c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
270c698dcaSJean-Christophe PLAGNIOL-VILLARD  * DS1337 Real Time Clock (RTC).
280c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
290c698dcaSJean-Christophe PLAGNIOL-VILLARD 
300c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <common.h>
310c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <command.h>
320c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <rtc.h>
330c698dcaSJean-Christophe PLAGNIOL-VILLARD #include <i2c.h>
340c698dcaSJean-Christophe PLAGNIOL-VILLARD 
350c698dcaSJean-Christophe PLAGNIOL-VILLARD #if defined(CONFIG_RTC_DS1337) && defined(CONFIG_CMD_DATE)
360c698dcaSJean-Christophe PLAGNIOL-VILLARD 
370c698dcaSJean-Christophe PLAGNIOL-VILLARD /*---------------------------------------------------------------------*/
380c698dcaSJean-Christophe PLAGNIOL-VILLARD #undef DEBUG_RTC
390c698dcaSJean-Christophe PLAGNIOL-VILLARD 
400c698dcaSJean-Christophe PLAGNIOL-VILLARD #ifdef DEBUG_RTC
410c698dcaSJean-Christophe PLAGNIOL-VILLARD #define DEBUGR(fmt,args...) printf(fmt ,##args)
420c698dcaSJean-Christophe PLAGNIOL-VILLARD #else
430c698dcaSJean-Christophe PLAGNIOL-VILLARD #define DEBUGR(fmt,args...)
440c698dcaSJean-Christophe PLAGNIOL-VILLARD #endif
450c698dcaSJean-Christophe PLAGNIOL-VILLARD /*---------------------------------------------------------------------*/
460c698dcaSJean-Christophe PLAGNIOL-VILLARD 
470c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
480c698dcaSJean-Christophe PLAGNIOL-VILLARD  * RTC register addresses
490c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
500c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_SEC_REG_ADDR	0x0
510c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MIN_REG_ADDR	0x1
520c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_HR_REG_ADDR		0x2
530c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DAY_REG_ADDR	0x3
540c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_DATE_REG_ADDR	0x4
550c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_MON_REG_ADDR	0x5
560c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_YR_REG_ADDR		0x6
570c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_REG_ADDR	0x0e
580c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_STAT_REG_ADDR	0x0f
590c698dcaSJean-Christophe PLAGNIOL-VILLARD 
600c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
610c698dcaSJean-Christophe PLAGNIOL-VILLARD  * RTC control register bits
620c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
630c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_A1IE	0x1	/* Alarm 1 interrupt enable     */
640c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_A2IE	0x2	/* Alarm 2 interrupt enable     */
650c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_INTCN	0x4	/* Interrupt control            */
660c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_RS1		0x8	/* Rate select 1                */
670c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_RS2		0x10	/* Rate select 2                */
680c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_CTL_BIT_DOSC	0x80	/* Disable Oscillator           */
690c698dcaSJean-Christophe PLAGNIOL-VILLARD 
700c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
710c698dcaSJean-Christophe PLAGNIOL-VILLARD  * RTC status register bits
720c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
730c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_STAT_BIT_A1F	0x1	/* Alarm 1 flag                 */
740c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_STAT_BIT_A2F	0x2	/* Alarm 2 flag                 */
750c698dcaSJean-Christophe PLAGNIOL-VILLARD #define RTC_STAT_BIT_OSF	0x80	/* Oscillator stop flag         */
760c698dcaSJean-Christophe PLAGNIOL-VILLARD 
770c698dcaSJean-Christophe PLAGNIOL-VILLARD 
780c698dcaSJean-Christophe PLAGNIOL-VILLARD static uchar rtc_read (uchar reg);
790c698dcaSJean-Christophe PLAGNIOL-VILLARD static void rtc_write (uchar reg, uchar val);
800c698dcaSJean-Christophe PLAGNIOL-VILLARD static uchar bin2bcd (unsigned int n);
810c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned bcd2bin (uchar c);
820c698dcaSJean-Christophe PLAGNIOL-VILLARD 
830c698dcaSJean-Christophe PLAGNIOL-VILLARD 
840c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
850c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Get the current time from the RTC
860c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
87*b73a19e1SYuri Tikhonov int rtc_get (struct rtc_time *tmp)
880c698dcaSJean-Christophe PLAGNIOL-VILLARD {
89*b73a19e1SYuri Tikhonov 	int rel = 0;
900c698dcaSJean-Christophe PLAGNIOL-VILLARD 	uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
910c698dcaSJean-Christophe PLAGNIOL-VILLARD 
920c698dcaSJean-Christophe PLAGNIOL-VILLARD 	control = rtc_read (RTC_CTL_REG_ADDR);
930c698dcaSJean-Christophe PLAGNIOL-VILLARD 	status = rtc_read (RTC_STAT_REG_ADDR);
940c698dcaSJean-Christophe PLAGNIOL-VILLARD 	sec = rtc_read (RTC_SEC_REG_ADDR);
950c698dcaSJean-Christophe PLAGNIOL-VILLARD 	min = rtc_read (RTC_MIN_REG_ADDR);
960c698dcaSJean-Christophe PLAGNIOL-VILLARD 	hour = rtc_read (RTC_HR_REG_ADDR);
970c698dcaSJean-Christophe PLAGNIOL-VILLARD 	wday = rtc_read (RTC_DAY_REG_ADDR);
980c698dcaSJean-Christophe PLAGNIOL-VILLARD 	mday = rtc_read (RTC_DATE_REG_ADDR);
990c698dcaSJean-Christophe PLAGNIOL-VILLARD 	mon_cent = rtc_read (RTC_MON_REG_ADDR);
1000c698dcaSJean-Christophe PLAGNIOL-VILLARD 	year = rtc_read (RTC_YR_REG_ADDR);
1010c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1020c698dcaSJean-Christophe PLAGNIOL-VILLARD 	DEBUGR ("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
1030c698dcaSJean-Christophe PLAGNIOL-VILLARD 		"hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
1040c698dcaSJean-Christophe PLAGNIOL-VILLARD 		year, mon_cent, mday, wday, hour, min, sec, control, status);
1050c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1060c698dcaSJean-Christophe PLAGNIOL-VILLARD 	if (status & RTC_STAT_BIT_OSF) {
1070c698dcaSJean-Christophe PLAGNIOL-VILLARD 		printf ("### Warning: RTC oscillator has stopped\n");
1080c698dcaSJean-Christophe PLAGNIOL-VILLARD 		/* clear the OSF flag */
1090c698dcaSJean-Christophe PLAGNIOL-VILLARD 		rtc_write (RTC_STAT_REG_ADDR,
1100c698dcaSJean-Christophe PLAGNIOL-VILLARD 			   rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
111*b73a19e1SYuri Tikhonov 		rel = -1;
1120c698dcaSJean-Christophe PLAGNIOL-VILLARD 	}
1130c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1140c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_sec  = bcd2bin (sec & 0x7F);
1150c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_min  = bcd2bin (min & 0x7F);
1160c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_hour = bcd2bin (hour & 0x3F);
1170c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_mday = bcd2bin (mday & 0x3F);
1180c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_mon  = bcd2bin (mon_cent & 0x1F);
1190c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 2000 : 1900);
1200c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
1210c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_yday = 0;
1220c698dcaSJean-Christophe PLAGNIOL-VILLARD 	tmp->tm_isdst= 0;
1230c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1240c698dcaSJean-Christophe PLAGNIOL-VILLARD 	DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
1250c698dcaSJean-Christophe PLAGNIOL-VILLARD 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
1260c698dcaSJean-Christophe PLAGNIOL-VILLARD 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
127*b73a19e1SYuri Tikhonov 
128*b73a19e1SYuri Tikhonov 	return rel;
1290c698dcaSJean-Christophe PLAGNIOL-VILLARD }
1300c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1310c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1320c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
1330c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Set the RTC
1340c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
1350c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_set (struct rtc_time *tmp)
1360c698dcaSJean-Christophe PLAGNIOL-VILLARD {
1370c698dcaSJean-Christophe PLAGNIOL-VILLARD 	uchar century;
1380c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1390c698dcaSJean-Christophe PLAGNIOL-VILLARD 	DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
1400c698dcaSJean-Christophe PLAGNIOL-VILLARD 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
1410c698dcaSJean-Christophe PLAGNIOL-VILLARD 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
1420c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1430c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
1440c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1450c698dcaSJean-Christophe PLAGNIOL-VILLARD 	century = (tmp->tm_year >= 2000) ? 0x80 : 0;
1460c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon) | century);
1470c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1480c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
1490c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
1500c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
1510c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
1520c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
1530c698dcaSJean-Christophe PLAGNIOL-VILLARD }
1540c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1550c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1560c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
1570c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Reset the RTC.  We also enable the oscillator output on the
1580c698dcaSJean-Christophe PLAGNIOL-VILLARD  * SQW/INTB* pin and program it for 32,768 Hz output. Note that
1590c698dcaSJean-Christophe PLAGNIOL-VILLARD  * according to the datasheet, turning on the square wave output
1600c698dcaSJean-Christophe PLAGNIOL-VILLARD  * increases the current drain on the backup battery from about
1610c698dcaSJean-Christophe PLAGNIOL-VILLARD  * 600 nA to 2uA.
1620c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
1630c698dcaSJean-Christophe PLAGNIOL-VILLARD void rtc_reset (void)
1640c698dcaSJean-Christophe PLAGNIOL-VILLARD {
1650c698dcaSJean-Christophe PLAGNIOL-VILLARD 	rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
1660c698dcaSJean-Christophe PLAGNIOL-VILLARD }
1670c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1680c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1690c698dcaSJean-Christophe PLAGNIOL-VILLARD /*
1700c698dcaSJean-Christophe PLAGNIOL-VILLARD  * Helper functions
1710c698dcaSJean-Christophe PLAGNIOL-VILLARD  */
1720c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1730c698dcaSJean-Christophe PLAGNIOL-VILLARD static
1740c698dcaSJean-Christophe PLAGNIOL-VILLARD uchar rtc_read (uchar reg)
1750c698dcaSJean-Christophe PLAGNIOL-VILLARD {
1760c698dcaSJean-Christophe PLAGNIOL-VILLARD 	return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg));
1770c698dcaSJean-Christophe PLAGNIOL-VILLARD }
1780c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1790c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1800c698dcaSJean-Christophe PLAGNIOL-VILLARD static void rtc_write (uchar reg, uchar val)
1810c698dcaSJean-Christophe PLAGNIOL-VILLARD {
1820c698dcaSJean-Christophe PLAGNIOL-VILLARD 	i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val);
1830c698dcaSJean-Christophe PLAGNIOL-VILLARD }
1840c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1850c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned bcd2bin (uchar n)
1860c698dcaSJean-Christophe PLAGNIOL-VILLARD {
1870c698dcaSJean-Christophe PLAGNIOL-VILLARD 	return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
1880c698dcaSJean-Christophe PLAGNIOL-VILLARD }
1890c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1900c698dcaSJean-Christophe PLAGNIOL-VILLARD static unsigned char bin2bcd (unsigned int n)
1910c698dcaSJean-Christophe PLAGNIOL-VILLARD {
1920c698dcaSJean-Christophe PLAGNIOL-VILLARD 	return (((n / 10) << 4) | (n % 10));
1930c698dcaSJean-Christophe PLAGNIOL-VILLARD }
1940c698dcaSJean-Christophe PLAGNIOL-VILLARD 
1950c698dcaSJean-Christophe PLAGNIOL-VILLARD #endif
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