1 /* 2 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #include <common.h> 8 #include <linux/bug.h> 9 #include <linux/delay.h> 10 11 #include "flash.h" 12 #include "flash_com.h" 13 #include "sfc.h" 14 #include "sfc_nand.h" 15 #include "rkflash_debug.h" 16 17 static struct nand_info spi_nand_tbl[] = { 18 /* TC58CVG0S0HxAIx */ 19 {0x98C2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 18, 8, 0xB0, 0XFF, 4, 8}, 20 /* TC58CVG1S0HxAIx */ 21 {0x98CB, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x02, 0xD8, 0x00, 19, 8, 0xB0, 0XFF, 4, 8}, 22 /* MX35LF1GE4AB */ 23 {0xC212, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8}, 24 /* MX35LF2GE4AB */ 25 {0xC222, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0, 4, 8}, 26 /* GD5F1GQ4UAYIG */ 27 {0xC8F1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8}, 28 /* GD5F2GQ40BY2GR */ 29 {0xC8D2, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8}, 30 /* MT29F1G01ZAC */ 31 {0x2C12, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0, 4, 8}, 32 /* GD5F1GQ4U */ 33 {0xC8B1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8}, 34 /* GD5F2GQ4U */ 35 {0xC8B2, 4, 64, 2, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 19, 1, 0xB0, 0, 4, 8}, 36 /* GD5F1GQ4U */ 37 {0xC8D1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xB0, 0, 4, 8}, 38 /* IS37SML01G1 */ 39 {0xC821, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x00, 18, 1, 0xB0, 0XFF, 8, 12}, 40 /* W25N01GV */ 41 {0xEFAA, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x0C, 18, 1, 0xFF, 0XFF, 4, 20}, 42 }; 43 44 static u8 id_byte[8]; 45 static struct nand_info *p_nand_info; 46 static u32 gp_page_buf[SFC_NAND_PAGE_MAX_SIZE / 4]; 47 static struct SFNAND_DEV sfc_nand_dev; 48 49 static struct nand_info *spi_nand_get_info(u8 *nand_id) 50 { 51 u32 i; 52 u32 id = (nand_id[0] << 8) | (nand_id[1] << 0); 53 54 for (i = 0; i < ARRAY_SIZE(spi_nand_tbl); i++) { 55 if (spi_nand_tbl[i].id == id) 56 return &spi_nand_tbl[i]; 57 } 58 return NULL; 59 } 60 61 static int sfc_nand_write_en(void) 62 { 63 int ret; 64 union SFCCMD_DATA sfcmd; 65 66 sfcmd.d32 = 0; 67 sfcmd.b.cmd = CMD_WRITE_EN; 68 ret = sfc_request(sfcmd.d32, 0, 0, NULL); 69 return ret; 70 } 71 72 static int sfc_nand_rw_preset(void) 73 { 74 int ret; 75 union SFCCTRL_DATA sfctrl; 76 union SFCCMD_DATA sfcmd; 77 u8 status = 0xFF; 78 79 sfcmd.d32 = 0; 80 sfcmd.b.cmd = 0; 81 sfcmd.b.datasize = 1; 82 sfcmd.b.rw = SFC_WRITE; 83 84 sfctrl.b.datalines = 2; 85 ret = sfc_request(sfcmd.d32, sfctrl.d32, 0, &status); 86 return ret; 87 } 88 89 static int sfc_nand_read_feature(u8 addr, u8 *data) 90 { 91 int ret; 92 union SFCCMD_DATA sfcmd; 93 94 sfcmd.d32 = 0; 95 sfcmd.b.cmd = 0x0F; 96 sfcmd.b.datasize = 1; 97 sfcmd.b.addrbits = SFC_ADDR_XBITS; 98 *data = 0; 99 100 ret = sfc_request(sfcmd.d32, 0x8 << 16, addr, data); 101 if (ret != SFC_OK) 102 return ret; 103 return SFC_OK; 104 } 105 106 static int sfc_nand_write_feature(u32 addr, u8 status) 107 { 108 int ret; 109 union SFCCMD_DATA sfcmd; 110 111 sfc_nand_write_en(); 112 113 sfcmd.d32 = 0; 114 sfcmd.b.cmd = 0x1F; 115 sfcmd.b.datasize = 1; 116 sfcmd.b.addrbits = SFC_ADDR_XBITS; 117 sfcmd.b.rw = SFC_WRITE; 118 119 ret = sfc_request(sfcmd.d32, 0x8 << 16, addr, &status); 120 if (ret != SFC_OK) 121 return ret; 122 return ret; 123 } 124 125 static int sfc_nand_wait_busy(u8 *data, int timeout) 126 { 127 int ret; 128 int i; 129 u8 status; 130 131 *data = 0; 132 for (i = 0; i < timeout; i++) { 133 ret = sfc_nand_read_feature(0xC0, &status); 134 if (ret != SFC_OK) 135 return ret; 136 *data = status; 137 if (!(status & (1 << 0))) 138 return SFC_OK; 139 sfc_delay(1); 140 } 141 return -1; 142 } 143 144 static u32 sfc_nand_erase_block(u8 cs, u32 addr) 145 { 146 int ret; 147 union SFCCMD_DATA sfcmd; 148 u8 status; 149 150 sfcmd.d32 = 0; 151 sfcmd.b.cmd = p_nand_info->block_erase_cmd; 152 sfcmd.b.addrbits = SFC_ADDR_24BITS; 153 sfc_nand_write_en(); 154 ret = sfc_request(sfcmd.d32, 0, addr, NULL); 155 if (ret != SFC_OK) 156 return ret; 157 ret = sfc_nand_wait_busy(&status, 1000 * 1000); 158 if (status & (1 << 2)) 159 return SFC_NAND_PROG_ERASE_ERROR; 160 return ret; 161 } 162 163 static u32 sfc_nand_prog_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare) 164 { 165 int ret; 166 union SFCCMD_DATA sfcmd; 167 union SFCCTRL_DATA sfctrl; 168 u8 status; 169 u32 data_sz = 2048; 170 u32 spare_offs_1 = p_nand_info->spare_offs_1; 171 u32 spare_offs_2 = p_nand_info->spare_offs_2; 172 173 memcpy(gp_page_buf, p_data, data_sz); 174 gp_page_buf[(data_sz + spare_offs_1) / 4] = p_spare[0]; 175 gp_page_buf[(data_sz + spare_offs_2) / 4] = p_spare[1]; 176 177 sfc_nand_write_en(); 178 if (sfc_nand_dev.prog_lines == DATA_LINES_X4 && 179 p_nand_info->QE_address == 0xFF && 180 sfc_get_version() != SFC_VER_3) 181 sfc_nand_rw_preset(); 182 183 sfcmd.d32 = 0; 184 sfcmd.b.cmd = sfc_nand_dev.page_prog_cmd; 185 sfcmd.b.addrbits = SFC_ADDR_XBITS; 186 sfcmd.b.datasize = SFC_NAND_PAGE_MAX_SIZE; 187 sfcmd.b.rw = SFC_WRITE; 188 189 sfctrl.d32 = 0; 190 sfctrl.b.datalines = sfc_nand_dev.prog_lines; 191 sfctrl.b.addrbits = 16; 192 sfc_request(sfcmd.d32, sfctrl.d32, 0, gp_page_buf); 193 194 sfcmd.d32 = 0; 195 sfcmd.b.cmd = p_nand_info->page_prog_cmd; 196 sfcmd.b.addrbits = SFC_ADDR_24BITS; 197 sfcmd.b.datasize = 0; 198 sfcmd.b.rw = SFC_WRITE; 199 ret = sfc_request(sfcmd.d32, 0, addr, p_data); 200 if (ret != SFC_OK) 201 return ret; 202 ret = sfc_nand_wait_busy(&status, 1000 * 1000); 203 if (status & (1 << 3)) 204 return SFC_NAND_PROG_ERASE_ERROR; 205 return ret; 206 } 207 208 static u32 sfc_nand_read_page(u8 cs, u32 addr, u32 *p_data, u32 *p_spare) 209 { 210 int ret; 211 union SFCCMD_DATA sfcmd; 212 union SFCCTRL_DATA sfctrl; 213 u8 status; 214 u8 ecc; 215 u32 data_sz = 2048; 216 u32 spare_offs_1 = p_nand_info->spare_offs_1; 217 u32 spare_offs_2 = p_nand_info->spare_offs_2; 218 219 sfcmd.d32 = 0; 220 sfcmd.b.cmd = p_nand_info->page_read_cmd; 221 sfcmd.b.datasize = 0; 222 sfcmd.b.addrbits = SFC_ADDR_24BITS; 223 sfc_request(sfcmd.d32, 0, addr, p_data); 224 225 sfc_nand_wait_busy(&status, 1000 * 1000); 226 ecc = (status >> 4) & 0x03; 227 if (sfc_nand_dev.read_lines == DATA_LINES_X4 && 228 p_nand_info->QE_address == 0xFF && 229 sfc_get_version() != SFC_VER_3) 230 sfc_nand_rw_preset(); 231 232 sfcmd.d32 = 0; 233 sfcmd.b.cmd = sfc_nand_dev.page_read_cmd; 234 sfcmd.b.datasize = SFC_NAND_PAGE_MAX_SIZE; 235 sfcmd.b.addrbits = SFC_ADDR_24BITS; 236 sfctrl.d32 = 0; 237 sfctrl.b.datalines = sfc_nand_dev.read_lines; 238 239 memset(gp_page_buf, 0, SFC_NAND_PAGE_MAX_SIZE); 240 ret = sfc_request(sfcmd.d32, sfctrl.d32, 0, gp_page_buf); 241 242 memcpy(p_data, gp_page_buf, data_sz); 243 p_spare[0] = gp_page_buf[(data_sz + spare_offs_1) / 4]; 244 p_spare[1] = gp_page_buf[(data_sz + spare_offs_2) / 4]; 245 if (ret != SFC_OK) 246 return SFC_NAND_ECC_ERROR; 247 248 /* 249 * ecc status: 250 * 0, No bit errors were detected 251 * 1, Bit errors were detected and corrected. If max_ecc_bits equals 1, 252 * Bit error count exceed the bit flip detection threshold. 253 * 2, Multiple bit errors were detected and not corrected. 254 * 3, If max_ecc_bits equals 1, reserved, else bit errors were detected 255 * and corrected, bit error count exceed the bit flip detection 256 * threshold 257 */ 258 259 if (ecc == 0) { 260 ret = SFC_NAND_ECC_OK; 261 } else if (ecc == 1) { 262 if (p_nand_info->max_ecc_bits == 1) 263 ret = SFC_NAND_ECC_REFRESH; 264 else 265 ret = SFC_NAND_ECC_OK; 266 } else if (ecc == 2) { 267 ret = SFC_NAND_ECC_ERROR; 268 } else { 269 if (p_nand_info->max_ecc_bits == 1) 270 ret = SFC_NAND_ECC_ERROR; 271 else 272 ret = SFC_NAND_ECC_REFRESH; 273 } 274 275 if (ret != SFC_NAND_ECC_OK) { 276 PRINT_SFC_E("%s[0x%x], ret=0x%x\n", __func__, addr, ret); 277 if (p_data) 278 PRINT_SFC_HEX("data:", p_data, 4, 8); 279 if (p_spare) 280 PRINT_SFC_HEX("spare:", p_spare, 4, 2); 281 } 282 return ret; 283 } 284 285 static int sfc_nand_read_id_raw(u8 *data) 286 { 287 int ret; 288 union SFCCMD_DATA sfcmd; 289 290 sfcmd.d32 = 0; 291 sfcmd.b.cmd = CMD_READ_JEDECID; 292 sfcmd.b.datasize = 3; 293 sfcmd.b.addrbits = SFC_ADDR_XBITS; 294 295 ret = sfc_request(sfcmd.d32, 0x8 << 16, 0, data); 296 297 return ret; 298 } 299 300 /* 301 * Read the 1st page's 1st byte of a phy_blk 302 * If not FF, it's bad blk 303 */ 304 static int sfc_nand_get_bad_block_list(u16 *table, u32 die) 305 { 306 u16 blk; 307 u32 bad_cnt, page; 308 u32 blk_per_die; 309 u32 *pread; 310 u32 *pspare_read; 311 312 PRINT_SFC_E("%s\n", __func__); 313 pread = ftl_malloc(2048); 314 pspare_read = ftl_malloc(8); 315 bad_cnt = 0; 316 blk_per_die = p_nand_info->plane_per_die * 317 p_nand_info->blk_per_plane; 318 for (blk = 0; blk < blk_per_die; blk++) { 319 page = (blk + blk_per_die * die) * 320 p_nand_info->page_per_blk; 321 sfc_nand_read_page(0, page, pread, pspare_read); 322 323 if (pread[0] != 0xFFFFFFFF || 324 pspare_read[0] != 0xFFFFFFFF) { 325 table[bad_cnt++] = blk; 326 PRINT_SFC_E("die[%d], bad_blk[%d]\n", die, blk); 327 } 328 } 329 ftl_free(pread); 330 ftl_free(pspare_read); 331 return (int)bad_cnt; 332 } 333 334 #if SFC_NAND_STRESS_TEST_EN 335 336 #define SFC_NAND_PAGE_SIZE 2048 337 #define SFC_NAND_SPARE_SIZE 8 338 339 static u16 bad_blk_list[1024]; 340 static u32 pwrite[SFC_NAND_PAGE_SIZE / 4]; 341 static u32 pread[SFC_NAND_PAGE_SIZE / 4]; 342 static u32 pspare_write[SFC_NAND_SPARE_SIZE / 4]; 343 static u32 pspare_read[SFC_NAND_SPARE_SIZE / 4]; 344 static u32 bad_blk_num; 345 static u32 bad_page_num; 346 347 static void sfc_nand_test(void) 348 { 349 u32 i, blk, page, bad_cnt, page_addr; 350 int ret; 351 u32 pages_num = 64; 352 u32 blk_addr = 64; 353 u32 is_bad_blk = 0; 354 355 PRINT_SFC_E("%s\n", __func__); 356 357 bad_blk_num = 0; 358 bad_page_num = 0; 359 bad_cnt = sfc_nand_get_bad_block_list(bad_blk_list, 0); 360 361 for (blk = 0; blk < 1024; blk++) { 362 for (i = 0; i < bad_cnt; i++) { 363 if (bad_blk_list[i] == blk) 364 break; 365 } 366 if (i < bad_cnt) 367 continue; 368 is_bad_blk = 0; 369 PRINT_SFC_E("Flash prog block: %x\n", blk); 370 sfc_nand_erase_block(0, blk * blk_addr); 371 for (page = 0; page < pages_num; page++) { 372 page_addr = blk * blk_addr + page; 373 for (i = 0; i < 512; i++) 374 pwrite[i] = (page_addr << 16) + i; 375 pspare_write[0] = pwrite[0] + 0x5AF0; 376 pspare_write[1] = pspare_write[0] + 1; 377 sfc_nand_prog_page(0, page_addr, pwrite, pspare_write); 378 memset(pread, 0, 2048); 379 memset(pspare_read, 0, 8); 380 ret = sfc_nand_read_page(0, page_addr, pread, 381 pspare_read); 382 if (ret != SFC_NAND_ECC_OK) 383 is_bad_blk = 1; 384 for (i = 0; i < 512; i++) { 385 if (pwrite[i] != pread[i]) { 386 is_bad_blk = 1; 387 break; 388 } 389 } 390 for (i = 0; i < 2; i++) { 391 if (pspare_write[i] != pspare_read[i]) { 392 is_bad_blk = 1; 393 break; 394 } 395 } 396 if (is_bad_blk) { 397 bad_page_num++; 398 PRINT_SFC_E("ERR:page%x, ret=%x\n", 399 page_addr, ret); 400 PRINT_SFC_HEX("data:", pread, 4, 8); 401 PRINT_SFC_HEX("spare:", pspare_read, 4, 2); 402 } 403 } 404 sfc_nand_erase_block(0, blk * blk_addr); 405 if (is_bad_blk) 406 bad_blk_num++; 407 } 408 PRINT_SFC_E("bad_blk_num = %d, bad_page_num = %d\n", 409 bad_blk_num, bad_page_num); 410 411 PRINT_SFC_E("Flash Test Finish!!!\n"); 412 while (1) 413 ; 414 } 415 #endif 416 417 static void ftl_flash_init(void) 418 { 419 /* para init */ 420 g_nand_phy_info.nand_type = 1; 421 g_nand_phy_info.die_num = 1; 422 g_nand_phy_info.plane_per_die = p_nand_info->plane_per_die; 423 g_nand_phy_info.blk_per_plane = p_nand_info->blk_per_plane; 424 g_nand_phy_info.page_per_blk = p_nand_info->page_per_blk; 425 g_nand_phy_info.page_per_slc_blk = p_nand_info->page_per_blk; 426 g_nand_phy_info.byte_per_sec = 512; 427 g_nand_phy_info.sec_per_page = p_nand_info->sec_per_page; 428 g_nand_phy_info.sec_per_blk = p_nand_info->sec_per_page * 429 p_nand_info->page_per_blk; 430 g_nand_phy_info.reserved_blk = 8; 431 g_nand_phy_info.blk_per_die = p_nand_info->plane_per_die * 432 p_nand_info->blk_per_plane; 433 g_nand_phy_info.ecc_bits = p_nand_info->max_ecc_bits; 434 435 /* driver register */ 436 g_nand_ops.get_bad_blk_list = sfc_nand_get_bad_block_list; 437 g_nand_ops.erase_blk = sfc_nand_erase_block; 438 g_nand_ops.prog_page = sfc_nand_prog_page; 439 g_nand_ops.read_page = sfc_nand_read_page; 440 } 441 442 static int spi_nand_enable_QE(void) 443 { 444 int ret = SFC_OK; 445 u8 status; 446 int bit_offset = p_nand_info->QE_bits; 447 448 if (bit_offset == 0xFF) 449 return SFC_OK; 450 451 ret = sfc_nand_read_feature(p_nand_info->QE_address, &status); 452 if (ret != SFC_OK) 453 return ret; 454 455 if (status & (1 << bit_offset)) /* is QE bit set */ 456 return SFC_OK; 457 458 status |= (1 << bit_offset); 459 return sfc_nand_write_feature(p_nand_info->QE_address, status); 460 461 return ret; 462 } 463 464 u32 sfc_nand_init(void) 465 { 466 PRINT_SFC_I("...%s enter...\n", __func__); 467 468 sfc_nand_read_id_raw(id_byte); 469 PRINT_SFC_E("sfc_nand id: %x %x %x\n", 470 id_byte[0], id_byte[1], id_byte[2]); 471 if (id_byte[0] == 0xFF || id_byte[0] == 0x00) 472 return FTL_NO_FLASH; 473 474 p_nand_info = spi_nand_get_info(id_byte); 475 if (!p_nand_info) 476 return FTL_UNSUPPORTED_FLASH; 477 478 sfc_nand_dev.manufacturer = id_byte[0]; 479 sfc_nand_dev.mem_type = id_byte[1]; 480 481 /* disable block lock */ 482 sfc_nand_write_feature(0xA0, 0); 483 sfc_nand_dev.read_lines = DATA_LINES_X1; 484 sfc_nand_dev.prog_lines = DATA_LINES_X1; 485 sfc_nand_dev.page_read_cmd = p_nand_info->read_cache_cmd_1; 486 sfc_nand_dev.page_prog_cmd = p_nand_info->prog_cache_cmd_1; 487 if (p_nand_info->feature & FEA_4BIT_READ) { 488 if (spi_nand_enable_QE() == SFC_OK) { 489 sfc_nand_dev.read_lines = DATA_LINES_X4; 490 sfc_nand_dev.page_read_cmd = 491 p_nand_info->read_cache_cmd_4; 492 } 493 } 494 495 if (p_nand_info->feature & FEA_4BIT_PROG && 496 sfc_nand_dev.read_lines == DATA_LINES_X4) { 497 sfc_nand_dev.prog_lines = DATA_LINES_X4; 498 sfc_nand_dev.page_prog_cmd = p_nand_info->prog_cache_cmd_4; 499 } 500 501 if (1) { 502 u8 status; 503 504 sfc_nand_read_feature(0xA0, &status); 505 PRINT_SFC_I("sfc_nand A0 = 0x%x\n", status); 506 sfc_nand_read_feature(0xB0, &status); 507 PRINT_SFC_I("sfc_nand B0 = 0x%x\n", status); 508 sfc_nand_read_feature(0xC0, &status); 509 PRINT_SFC_I("sfc_nand C0 = 0x%x\n", status); 510 PRINT_SFC_I("read_lines = %x\n", sfc_nand_dev.read_lines); 511 PRINT_SFC_I("prog_lines = %x\n", sfc_nand_dev.prog_lines); 512 PRINT_SFC_I("page_read_cmd = %x\n", sfc_nand_dev.page_read_cmd); 513 PRINT_SFC_I("page_prog_cmd = %x\n", sfc_nand_dev.page_prog_cmd); 514 } 515 ftl_flash_init(); 516 517 #if SFC_NAND_STRESS_TEST_EN 518 sfc_nand_test(); 519 #endif 520 521 return SFC_OK; 522 } 523 524 int sfc_nand_read_id(u8 *data) 525 { 526 memcpy(data, id_byte, 3); 527 return 0; 528 } 529