1 /* 2 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef __FLASH_COM_H 8 #define __FLASH_COM_H 9 10 #include "typedef.h" 11 12 #define NAND_ERROR INVALID_UINT32 13 #define NAND_OK 0 14 15 #define NAND_STS_OK 0 /* bit 0 ecc error or ok */ 16 #define NAND_STS_REFRESH 256 /* need refresh */ 17 #define NAND_STS_EMPTY 512 /* page is not proged */ 18 #define NAND_STS_ECC_ERR NAND_ERROR 19 20 #define FULL_SLC 0 21 #define SLC 1 22 23 #define NAND_FLASH_MLC_PAGE_TAG 0xFFFF 24 #define MAX_FLASH_PAGE_SIZE 0x1000 /* 4KB */ 25 26 #define PAGE_ADDR_BITS 0 27 #define PAGE_ADDR_MASK ((1u << 11) - 1) 28 #define BLOCK_ADDR_BITS 11 29 #define BLOCK_ADDR_MASK ((1u << 14) - 1) 30 #define DIE_ADDR_BITS 25 31 #define DIE_ADDR_MASK ((1u << 3) - 1) 32 #define FLAG_ADDR_BITS 28 33 #define FLAG_ADDR_MASK ((1u << 4) - 1) 34 #define PHY_BLK_DIE_ADDR_BITS 14 35 36 struct nand_req { 37 u32 status; 38 u32 page_addr; /* 31:28 flag, 27:25: die, 24:11 block, 10:0 page */ 39 u32 *p_data; 40 u32 *p_spare; 41 u32 lpa; 42 }; 43 44 struct nand_phy_info { 45 u16 nand_type; /* SLC,MLC,TLC */ 46 u16 die_num; /* number of LUNs */ 47 u16 plane_per_die; 48 u16 blk_per_plane; 49 u16 blk_per_die; 50 u16 page_per_blk; /* in MLC mode */ 51 u16 page_per_slc_blk; /* in SLC mode */ 52 u16 sec_per_page; /* physical page data size */ 53 u16 sec_per_blk; /* physical page data size */ 54 u16 byte_per_sec; /* size of logical sectors */ 55 u16 reserved_blk; /* reserved for boot loader in die 0*/ 56 u8 ecc_bits; 57 }; 58 59 struct nand_ops { 60 s32 (*get_bad_blk_list)(u16 *table, u32 die); 61 u32 (*erase_blk)(u8 cs, u32 page_addr); 62 u32 (*prog_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare); 63 u32 (*read_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare); 64 }; 65 66 #endif 67