1*ba0501acSDingqiang Lin /* 2*ba0501acSDingqiang Lin * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 3*ba0501acSDingqiang Lin * 4*ba0501acSDingqiang Lin * SPDX-License-Identifier: GPL-2.0 5*ba0501acSDingqiang Lin */ 6*ba0501acSDingqiang Lin 7*ba0501acSDingqiang Lin #ifndef __FLASH_COM_H 8*ba0501acSDingqiang Lin #define __FLASH_COM_H 9*ba0501acSDingqiang Lin 10*ba0501acSDingqiang Lin #include "typedef.h" 11*ba0501acSDingqiang Lin 12*ba0501acSDingqiang Lin #define NAND_ERROR INVALID_UINT32 13*ba0501acSDingqiang Lin #define NAND_OK 0 14*ba0501acSDingqiang Lin 15*ba0501acSDingqiang Lin #define NAND_STS_OK 0 /* bit 0 ecc error or ok */ 16*ba0501acSDingqiang Lin #define NAND_STS_REFRESH 256 /* need refresh */ 17*ba0501acSDingqiang Lin #define NAND_STS_EMPTY 512 /* page is not proged */ 18*ba0501acSDingqiang Lin #define NAND_STS_ECC_ERR NAND_ERROR 19*ba0501acSDingqiang Lin 20*ba0501acSDingqiang Lin #define FULL_SLC 0 21*ba0501acSDingqiang Lin #define SLC 1 22*ba0501acSDingqiang Lin 23*ba0501acSDingqiang Lin #define NAND_FLASH_MLC_PAGE_TAG 0xFFFF 24*ba0501acSDingqiang Lin #define MAX_FLASH_PAGE_SIZE 0x1000 /* 4KB */ 25*ba0501acSDingqiang Lin 26*ba0501acSDingqiang Lin #define PAGE_ADDR_BITS 0 27*ba0501acSDingqiang Lin #define PAGE_ADDR_MASK ((1u << 11) - 1) 28*ba0501acSDingqiang Lin #define BLOCK_ADDR_BITS 11 29*ba0501acSDingqiang Lin #define BLOCK_ADDR_MASK ((1u << 14) - 1) 30*ba0501acSDingqiang Lin #define DIE_ADDR_BITS 25 31*ba0501acSDingqiang Lin #define DIE_ADDR_MASK ((1u << 3) - 1) 32*ba0501acSDingqiang Lin #define FLAG_ADDR_BITS 28 33*ba0501acSDingqiang Lin #define FLAG_ADDR_MASK ((1u << 4) - 1) 34*ba0501acSDingqiang Lin #define PHY_BLK_DIE_ADDR_BITS 14 35*ba0501acSDingqiang Lin 36*ba0501acSDingqiang Lin struct nand_req { 37*ba0501acSDingqiang Lin u32 status; 38*ba0501acSDingqiang Lin u32 page_addr; /* 31:28 flag, 27:25: die, 24:11 block, 10:0 page */ 39*ba0501acSDingqiang Lin u32 *p_data; 40*ba0501acSDingqiang Lin u32 *p_spare; 41*ba0501acSDingqiang Lin u32 lpa; 42*ba0501acSDingqiang Lin }; 43*ba0501acSDingqiang Lin 44*ba0501acSDingqiang Lin struct nand_phy_info { 45*ba0501acSDingqiang Lin u16 nand_type; /* SLC,MLC,TLC */ 46*ba0501acSDingqiang Lin u16 die_num; /* number of LUNs */ 47*ba0501acSDingqiang Lin u16 plane_per_die; 48*ba0501acSDingqiang Lin u16 blk_per_plane; 49*ba0501acSDingqiang Lin u16 blk_per_die; 50*ba0501acSDingqiang Lin u16 page_per_blk; /* in MLC mode */ 51*ba0501acSDingqiang Lin u16 page_per_slc_blk; /* in SLC mode */ 52*ba0501acSDingqiang Lin u16 sec_per_page; /* physical page data size */ 53*ba0501acSDingqiang Lin u16 sec_per_blk; /* physical page data size */ 54*ba0501acSDingqiang Lin u16 byte_per_sec; /* size of logical sectors */ 55*ba0501acSDingqiang Lin u16 reserved_blk; /* reserved for boot loader in die 0*/ 56*ba0501acSDingqiang Lin u8 ecc_bits; 57*ba0501acSDingqiang Lin }; 58*ba0501acSDingqiang Lin 59*ba0501acSDingqiang Lin struct nand_ops { 60*ba0501acSDingqiang Lin s32 (*get_bad_blk_list)(u16 *table, u32 die); 61*ba0501acSDingqiang Lin u32 (*erase_blk)(u8 cs, u32 page_addr); 62*ba0501acSDingqiang Lin u32 (*prog_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare); 63*ba0501acSDingqiang Lin u32 (*read_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare); 64*ba0501acSDingqiang Lin }; 65*ba0501acSDingqiang Lin 66*ba0501acSDingqiang Lin #endif 67