1ba0501acSDingqiang Lin /* 2ba0501acSDingqiang Lin * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 3ba0501acSDingqiang Lin * 4ba0501acSDingqiang Lin * SPDX-License-Identifier: GPL-2.0 5ba0501acSDingqiang Lin */ 6ba0501acSDingqiang Lin 7ba0501acSDingqiang Lin #ifndef __FLASH_COM_H 8ba0501acSDingqiang Lin #define __FLASH_COM_H 9ba0501acSDingqiang Lin 10ba0501acSDingqiang Lin #include "typedef.h" 11ba0501acSDingqiang Lin 12ba0501acSDingqiang Lin #define NAND_ERROR INVALID_UINT32 13ba0501acSDingqiang Lin #define NAND_OK 0 14ba0501acSDingqiang Lin 15ba0501acSDingqiang Lin #define NAND_STS_OK 0 /* bit 0 ecc error or ok */ 16ba0501acSDingqiang Lin #define NAND_STS_REFRESH 256 /* need refresh */ 17ba0501acSDingqiang Lin #define NAND_STS_EMPTY 512 /* page is not proged */ 18ba0501acSDingqiang Lin #define NAND_STS_ECC_ERR NAND_ERROR 19ba0501acSDingqiang Lin 20ba0501acSDingqiang Lin #define FULL_SLC 0 21ba0501acSDingqiang Lin #define SLC 1 22ba0501acSDingqiang Lin 23ba0501acSDingqiang Lin #define NAND_FLASH_MLC_PAGE_TAG 0xFFFF 24ba0501acSDingqiang Lin #define MAX_FLASH_PAGE_SIZE 0x1000 /* 4KB */ 25ba0501acSDingqiang Lin 26ba0501acSDingqiang Lin #define PAGE_ADDR_BITS 0 27ba0501acSDingqiang Lin #define PAGE_ADDR_MASK ((1u << 11) - 1) 28ba0501acSDingqiang Lin #define BLOCK_ADDR_BITS 11 29ba0501acSDingqiang Lin #define BLOCK_ADDR_MASK ((1u << 14) - 1) 30ba0501acSDingqiang Lin #define DIE_ADDR_BITS 25 31ba0501acSDingqiang Lin #define DIE_ADDR_MASK ((1u << 3) - 1) 32ba0501acSDingqiang Lin #define FLAG_ADDR_BITS 28 33ba0501acSDingqiang Lin #define FLAG_ADDR_MASK ((1u << 4) - 1) 34ba0501acSDingqiang Lin #define PHY_BLK_DIE_ADDR_BITS 14 35ba0501acSDingqiang Lin 36ba0501acSDingqiang Lin struct nand_req { 37ba0501acSDingqiang Lin u32 status; 38ba0501acSDingqiang Lin u32 page_addr; /* 31:28 flag, 27:25: die, 24:11 block, 10:0 page */ 39ba0501acSDingqiang Lin u32 *p_data; 40ba0501acSDingqiang Lin u32 *p_spare; 41ba0501acSDingqiang Lin u32 lpa; 42ba0501acSDingqiang Lin }; 43ba0501acSDingqiang Lin 44ba0501acSDingqiang Lin struct nand_phy_info { 45ba0501acSDingqiang Lin u16 nand_type; /* SLC,MLC,TLC */ 46ba0501acSDingqiang Lin u16 die_num; /* number of LUNs */ 47ba0501acSDingqiang Lin u16 plane_per_die; 48ba0501acSDingqiang Lin u16 blk_per_plane; 49ba0501acSDingqiang Lin u16 blk_per_die; 50ba0501acSDingqiang Lin u16 page_per_blk; /* in MLC mode */ 51ba0501acSDingqiang Lin u16 page_per_slc_blk; /* in SLC mode */ 52ba0501acSDingqiang Lin u16 sec_per_page; /* physical page data size */ 53ba0501acSDingqiang Lin u16 sec_per_blk; /* physical page data size */ 54ba0501acSDingqiang Lin u16 byte_per_sec; /* size of logical sectors */ 55ba0501acSDingqiang Lin u16 reserved_blk; /* reserved for boot loader in die 0*/ 56ba0501acSDingqiang Lin u8 ecc_bits; 57ba0501acSDingqiang Lin }; 58ba0501acSDingqiang Lin 59ba0501acSDingqiang Lin struct nand_ops { 60ba0501acSDingqiang Lin s32 (*get_bad_blk_list)(u16 *table, u32 die); 61ba0501acSDingqiang Lin u32 (*erase_blk)(u8 cs, u32 page_addr); 62ba0501acSDingqiang Lin u32 (*prog_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare); 63ba0501acSDingqiang Lin u32 (*read_page)(u8 cs, u32 page_addr, u32 *data, u32 *spare); 64*57d18453Sjon.lin void (*bch_sel)(u8 bits); 65*57d18453Sjon.lin void (*set_sec_num)(u8 num); 66ba0501acSDingqiang Lin }; 67ba0501acSDingqiang Lin 68ba0501acSDingqiang Lin #endif 69