15754b8c9SElaine Zhang /*
25754b8c9SElaine Zhang * (C) Copyright 2017 Rockchip Electronics Co., Ltd
35754b8c9SElaine Zhang *
45754b8c9SElaine Zhang * SPDX-License-Identifier: GPL-2.0
55754b8c9SElaine Zhang */
65754b8c9SElaine Zhang
75754b8c9SElaine Zhang #include <common.h>
85754b8c9SElaine Zhang #include <dm.h>
95754b8c9SElaine Zhang #include <reset-uclass.h>
105754b8c9SElaine Zhang #include <linux/io.h>
115754b8c9SElaine Zhang
125754b8c9SElaine Zhang struct rockchip_reset_priv {
135754b8c9SElaine Zhang void __iomem *base;
145754b8c9SElaine Zhang unsigned int sf_reset_offset;
155754b8c9SElaine Zhang unsigned int sf_reset_num;
165754b8c9SElaine Zhang };
175754b8c9SElaine Zhang
rockchip_reset_request(struct reset_ctl * reset_ctl)185754b8c9SElaine Zhang static int rockchip_reset_request(struct reset_ctl *reset_ctl)
195754b8c9SElaine Zhang {
205754b8c9SElaine Zhang struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
215754b8c9SElaine Zhang
225754b8c9SElaine Zhang debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (sf_reset_num=%d)\n", __func__,
235754b8c9SElaine Zhang reset_ctl, reset_ctl->dev, reset_ctl->id, priv->sf_reset_num);
245754b8c9SElaine Zhang
255754b8c9SElaine Zhang if (reset_ctl->id / 16 >= priv->sf_reset_num)
265754b8c9SElaine Zhang return -EINVAL;
275754b8c9SElaine Zhang
285754b8c9SElaine Zhang return 0;
295754b8c9SElaine Zhang }
305754b8c9SElaine Zhang
rockchip_reset_free(struct reset_ctl * reset_ctl)315754b8c9SElaine Zhang static int rockchip_reset_free(struct reset_ctl *reset_ctl)
325754b8c9SElaine Zhang {
335754b8c9SElaine Zhang debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
345754b8c9SElaine Zhang reset_ctl->dev, reset_ctl->id);
355754b8c9SElaine Zhang
365754b8c9SElaine Zhang return 0;
375754b8c9SElaine Zhang }
385754b8c9SElaine Zhang
rockchip_reset_assert(struct reset_ctl * reset_ctl)395754b8c9SElaine Zhang static int rockchip_reset_assert(struct reset_ctl *reset_ctl)
405754b8c9SElaine Zhang {
415754b8c9SElaine Zhang struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
425754b8c9SElaine Zhang int bank = reset_ctl->id / 16;
435754b8c9SElaine Zhang int offset = reset_ctl->id % 16;
445754b8c9SElaine Zhang
455754b8c9SElaine Zhang debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__,
465754b8c9SElaine Zhang reset_ctl, reset_ctl->dev, reset_ctl->id,
475754b8c9SElaine Zhang priv->base + (bank * 4));
485754b8c9SElaine Zhang
495754b8c9SElaine Zhang writel(BIT(offset) | (BIT(offset) << 16), priv->base + (bank * 4));
505754b8c9SElaine Zhang
515754b8c9SElaine Zhang return 0;
525754b8c9SElaine Zhang }
535754b8c9SElaine Zhang
rockchip_reset_deassert(struct reset_ctl * reset_ctl)545754b8c9SElaine Zhang static int rockchip_reset_deassert(struct reset_ctl *reset_ctl)
555754b8c9SElaine Zhang {
565754b8c9SElaine Zhang struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
575754b8c9SElaine Zhang int bank = reset_ctl->id / 16;
585754b8c9SElaine Zhang int offset = reset_ctl->id % 16;
595754b8c9SElaine Zhang
605754b8c9SElaine Zhang debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__,
615754b8c9SElaine Zhang reset_ctl, reset_ctl->dev, reset_ctl->id,
625754b8c9SElaine Zhang priv->base + (bank * 4));
635754b8c9SElaine Zhang
645754b8c9SElaine Zhang writel((BIT(offset) << 16), priv->base + (bank * 4));
655754b8c9SElaine Zhang
665754b8c9SElaine Zhang return 0;
675754b8c9SElaine Zhang }
685754b8c9SElaine Zhang
695754b8c9SElaine Zhang struct reset_ops rockchip_reset_ops = {
705754b8c9SElaine Zhang .request = rockchip_reset_request,
715754b8c9SElaine Zhang .free = rockchip_reset_free,
725754b8c9SElaine Zhang .rst_assert = rockchip_reset_assert,
735754b8c9SElaine Zhang .rst_deassert = rockchip_reset_deassert,
745754b8c9SElaine Zhang };
755754b8c9SElaine Zhang
rockchip_reset_probe(struct udevice * dev)765754b8c9SElaine Zhang static int rockchip_reset_probe(struct udevice *dev)
775754b8c9SElaine Zhang {
785754b8c9SElaine Zhang struct rockchip_reset_priv *priv = dev_get_priv(dev);
795754b8c9SElaine Zhang fdt_addr_t addr;
805754b8c9SElaine Zhang fdt_size_t size;
815754b8c9SElaine Zhang
82*b4ab4a0fSWyon Bi addr = dev_read_addr_size(dev, "reg", &size);
835754b8c9SElaine Zhang if (addr == FDT_ADDR_T_NONE)
845754b8c9SElaine Zhang return -EINVAL;
855754b8c9SElaine Zhang
865754b8c9SElaine Zhang if ((priv->sf_reset_offset == 0) && (priv->sf_reset_num == 0))
875754b8c9SElaine Zhang return -EINVAL;
885754b8c9SElaine Zhang
895754b8c9SElaine Zhang addr += priv->sf_reset_offset;
905754b8c9SElaine Zhang priv->base = ioremap(addr, size);
915754b8c9SElaine Zhang
925754b8c9SElaine Zhang debug("%s(base=%p) (sf_reset_offset=%x, sf_reset_num=%d)\n", __func__,
935754b8c9SElaine Zhang priv->base, priv->sf_reset_offset, priv->sf_reset_num);
945754b8c9SElaine Zhang
955754b8c9SElaine Zhang return 0;
965754b8c9SElaine Zhang }
975754b8c9SElaine Zhang
985754b8c9SElaine Zhang U_BOOT_DRIVER(rockchip_reset) = {
995754b8c9SElaine Zhang .name = "rockchip_reset",
1005754b8c9SElaine Zhang .id = UCLASS_RESET,
1015754b8c9SElaine Zhang .probe = rockchip_reset_probe,
1025754b8c9SElaine Zhang .ops = &rockchip_reset_ops,
1035754b8c9SElaine Zhang .priv_auto_alloc_size = sizeof(struct rockchip_reset_priv),
1045754b8c9SElaine Zhang };
105