1b2f97cf2SHeiko Schocher /*
2b2f97cf2SHeiko Schocher * (C) Copyright 2014
3b2f97cf2SHeiko Schocher * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4b2f97cf2SHeiko Schocher *
5*5052e819SRobert P. J. Day * Basic support for the pwm module on imx6.
6b2f97cf2SHeiko Schocher *
7b2f97cf2SHeiko Schocher * SPDX-License-Identifier: GPL-2.0+
8b2f97cf2SHeiko Schocher */
9b2f97cf2SHeiko Schocher
10b2f97cf2SHeiko Schocher #include <common.h>
11b2f97cf2SHeiko Schocher #include <div64.h>
12b2f97cf2SHeiko Schocher #include <pwm.h>
13b2f97cf2SHeiko Schocher #include <asm/arch/imx-regs.h>
14b2f97cf2SHeiko Schocher #include <asm/io.h>
15b2f97cf2SHeiko Schocher #include "pwm-imx-util.h"
16b2f97cf2SHeiko Schocher
pwm_init(int pwm_id,int div,int invert)17b2f97cf2SHeiko Schocher int pwm_init(int pwm_id, int div, int invert)
18b2f97cf2SHeiko Schocher {
19b2f97cf2SHeiko Schocher struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
20b2f97cf2SHeiko Schocher
2116b0c0ceSAxel Lin if (!pwm)
2216b0c0ceSAxel Lin return -1;
2316b0c0ceSAxel Lin
24b2f97cf2SHeiko Schocher writel(0, &pwm->ir);
25b2f97cf2SHeiko Schocher return 0;
26b2f97cf2SHeiko Schocher }
27b2f97cf2SHeiko Schocher
pwm_config(int pwm_id,int duty_ns,int period_ns)28b2f97cf2SHeiko Schocher int pwm_config(int pwm_id, int duty_ns, int period_ns)
29b2f97cf2SHeiko Schocher {
30b2f97cf2SHeiko Schocher struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
31b2f97cf2SHeiko Schocher unsigned long period_cycles, duty_cycles, prescale;
32b2f97cf2SHeiko Schocher u32 cr;
33b2f97cf2SHeiko Schocher
3416b0c0ceSAxel Lin if (!pwm)
3516b0c0ceSAxel Lin return -1;
3616b0c0ceSAxel Lin
37b2f97cf2SHeiko Schocher pwm_imx_get_parms(period_ns, duty_ns, &period_cycles, &duty_cycles,
38b2f97cf2SHeiko Schocher &prescale);
39b2f97cf2SHeiko Schocher
40b2f97cf2SHeiko Schocher cr = PWMCR_PRESCALER(prescale) |
41b2f97cf2SHeiko Schocher PWMCR_DOZEEN | PWMCR_WAITEN |
42b2f97cf2SHeiko Schocher PWMCR_DBGEN | PWMCR_CLKSRC_IPG_HIGH;
43b2f97cf2SHeiko Schocher
44b2f97cf2SHeiko Schocher writel(cr, &pwm->cr);
45b2f97cf2SHeiko Schocher /* set duty cycles */
46b2f97cf2SHeiko Schocher writel(duty_cycles, &pwm->sar);
47b2f97cf2SHeiko Schocher /* set period cycles */
48b2f97cf2SHeiko Schocher writel(period_cycles, &pwm->pr);
49b2f97cf2SHeiko Schocher return 0;
50b2f97cf2SHeiko Schocher }
51b2f97cf2SHeiko Schocher
pwm_enable(int pwm_id)52b2f97cf2SHeiko Schocher int pwm_enable(int pwm_id)
53b2f97cf2SHeiko Schocher {
54b2f97cf2SHeiko Schocher struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
55b2f97cf2SHeiko Schocher
5616b0c0ceSAxel Lin if (!pwm)
5716b0c0ceSAxel Lin return -1;
5816b0c0ceSAxel Lin
59b2f97cf2SHeiko Schocher setbits_le32(&pwm->cr, PWMCR_EN);
60b2f97cf2SHeiko Schocher return 0;
61b2f97cf2SHeiko Schocher }
62b2f97cf2SHeiko Schocher
pwm_disable(int pwm_id)63b2f97cf2SHeiko Schocher void pwm_disable(int pwm_id)
64b2f97cf2SHeiko Schocher {
65b2f97cf2SHeiko Schocher struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
66b2f97cf2SHeiko Schocher
6716b0c0ceSAxel Lin if (!pwm)
6816b0c0ceSAxel Lin return;
6916b0c0ceSAxel Lin
70b2f97cf2SHeiko Schocher clrbits_le32(&pwm->cr, PWMCR_EN);
71b2f97cf2SHeiko Schocher }
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