1 /* 2 * Copyright (C) 2015 Google, Inc 3 * Written by Simon Glass <sjg@chromium.org> 4 * 5 * Based on Rockchip's drivers/power/pmic/pmic_rk808.c: 6 * Copyright (C) 2012 rockchips 7 * zyw <zyw@rock-chips.com> 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #include <common.h> 13 #include <dm.h> 14 #include <errno.h> 15 #include <power/rk8xx_pmic.h> 16 #include <power/pmic.h> 17 #include <power/regulator.h> 18 19 #ifndef CONFIG_SPL_BUILD 20 #define ENABLE_DRIVER 21 #endif 22 23 /* Field Definitions */ 24 #define RK808_BUCK_VSEL_MASK 0x3f 25 #define RK808_BUCK4_VSEL_MASK 0xf 26 #define RK808_LDO_VSEL_MASK 0x1f 27 28 #define RK818_BUCK_VSEL_MASK 0x3f 29 #define RK818_BUCK4_VSEL_MASK 0x1f 30 #define RK818_LDO_VSEL_MASK 0x1f 31 #define RK818_LDO3_ON_VSEL_MASK 0xf 32 #define RK818_BOOST_ON_VSEL_MASK 0xe0 33 #define RK818_USB_ILIM_SEL_MASK 0x0f 34 #define RK818_USB_CHG_SD_VSEL_MASK 0x70 35 36 37 struct rk8xx_reg_info { 38 uint min_uv; 39 uint step_uv; 40 s8 vsel_reg; 41 u8 vsel_mask; 42 }; 43 44 static const struct rk8xx_reg_info rk808_buck[] = { 45 { 712500, 12500, REG_BUCK1_ON_VSEL, RK808_BUCK_VSEL_MASK, }, 46 { 712500, 12500, REG_BUCK2_ON_VSEL, RK808_BUCK_VSEL_MASK, }, 47 { 712500, 12500, -1, RK808_BUCK_VSEL_MASK, }, 48 { 1800000, 100000, REG_BUCK4_ON_VSEL, RK808_BUCK4_VSEL_MASK, }, 49 }; 50 51 static const struct rk8xx_reg_info rk816_buck[] = { 52 /* buck 1 */ 53 { 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, }, 54 { 1800000, 200000, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, }, 55 { 2300000, 0, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, }, 56 /* buck 2 */ 57 { 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, }, 58 { 1800000, 200000, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, }, 59 { 2300000, 0, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, }, 60 /* buck 3 */ 61 { 712500, 12500, -1, RK818_BUCK_VSEL_MASK, }, 62 /* buck 4 */ 63 { 800000, 100000, REG_BUCK4_ON_VSEL, RK818_BUCK4_VSEL_MASK, }, 64 }; 65 66 static const struct rk8xx_reg_info rk818_buck[] = { 67 { 712500, 12500, REG_BUCK1_ON_VSEL, RK818_BUCK_VSEL_MASK, }, 68 { 712500, 12500, REG_BUCK2_ON_VSEL, RK818_BUCK_VSEL_MASK, }, 69 { 712500, 12500, -1, RK818_BUCK_VSEL_MASK, }, 70 { 1800000, 100000, REG_BUCK4_ON_VSEL, RK818_BUCK4_VSEL_MASK, }, 71 }; 72 73 #ifdef ENABLE_DRIVER 74 static const struct rk8xx_reg_info rk808_ldo[] = { 75 { 1800000, 100000, REG_LDO1_ON_VSEL, RK808_LDO_VSEL_MASK, }, 76 { 1800000, 100000, REG_LDO2_ON_VSEL, RK808_LDO_VSEL_MASK, }, 77 { 800000, 100000, REG_LDO3_ON_VSEL, RK808_BUCK4_VSEL_MASK, }, 78 { 1800000, 100000, REG_LDO4_ON_VSEL, RK808_LDO_VSEL_MASK, }, 79 { 1800000, 100000, REG_LDO5_ON_VSEL, RK808_LDO_VSEL_MASK, }, 80 { 800000, 100000, REG_LDO6_ON_VSEL, RK808_LDO_VSEL_MASK, }, 81 { 800000, 100000, REG_LDO7_ON_VSEL, RK808_LDO_VSEL_MASK, }, 82 { 1800000, 100000, REG_LDO8_ON_VSEL, RK808_LDO_VSEL_MASK, }, 83 }; 84 85 static const struct rk8xx_reg_info rk816_ldo[] = { 86 { 800000, 100000, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, }, 87 { 800000, 100000, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, }, 88 { 800000, 100000, REG_LDO3_ON_VSEL, RK818_LDO_VSEL_MASK, }, 89 { 800000, 100000, REG_LDO4_ON_VSEL, RK818_LDO_VSEL_MASK, }, 90 { 800000, 100000, REG_LDO5_ON_VSEL, RK818_LDO_VSEL_MASK, }, 91 { 800000, 100000, REG_LDO6_ON_VSEL, RK818_LDO_VSEL_MASK, }, 92 }; 93 94 static const struct rk8xx_reg_info rk818_ldo[] = { 95 { 1800000, 100000, REG_LDO1_ON_VSEL, RK818_LDO_VSEL_MASK, }, 96 { 1800000, 100000, REG_LDO2_ON_VSEL, RK818_LDO_VSEL_MASK, }, 97 { 800000, 100000, REG_LDO3_ON_VSEL, RK818_LDO3_ON_VSEL_MASK, }, 98 { 1800000, 100000, REG_LDO4_ON_VSEL, RK818_LDO_VSEL_MASK, }, 99 { 1800000, 100000, REG_LDO5_ON_VSEL, RK818_LDO_VSEL_MASK, }, 100 { 800000, 100000, REG_LDO6_ON_VSEL, RK818_LDO_VSEL_MASK, }, 101 { 800000, 100000, REG_LDO7_ON_VSEL, RK818_LDO_VSEL_MASK, }, 102 { 1800000, 100000, REG_LDO8_ON_VSEL, RK818_LDO_VSEL_MASK, }, 103 }; 104 #endif 105 106 static const u16 rk818_chrg_cur_input_array[] = { 107 450, 800, 850, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000 108 }; 109 110 static const uint rk818_chrg_shutdown_vsel_array[] = { 111 2780000, 2850000, 2920000, 2990000, 3060000, 3130000, 3190000, 3260000 112 }; 113 114 static const struct rk8xx_reg_info *get_buck_reg(struct udevice *pmic, 115 int num, int uvolt) 116 { 117 struct rk8xx_priv *priv = dev_get_priv(pmic); 118 119 switch (priv->variant) { 120 case RK805_ID: 121 case RK816_ID: 122 switch (num) { 123 case 0: 124 case 1: 125 if (uvolt <= 1450000) 126 return &rk816_buck[num * 3 + 0]; 127 else if (uvolt <= 2200000) 128 return &rk816_buck[num * 3 + 1]; 129 else 130 return &rk816_buck[num * 3 + 2]; 131 default: 132 return &rk816_buck[num + 4]; 133 } 134 case RK818_ID: 135 return &rk818_buck[num]; 136 default: 137 return &rk808_buck[num]; 138 } 139 } 140 141 static int _buck_set_value(struct udevice *pmic, int buck, int uvolt) 142 { 143 const struct rk8xx_reg_info *info = get_buck_reg(pmic, buck, uvolt); 144 int mask = info->vsel_mask; 145 int val; 146 147 if (info->vsel_reg == -1) 148 return -ENOSYS; 149 val = (uvolt - info->min_uv) / info->step_uv; 150 debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_reg, mask, 151 val); 152 153 return pmic_clrsetbits(pmic, info->vsel_reg, mask, val); 154 } 155 156 static int _buck_get_enable(struct udevice *pmic, int buck) 157 { 158 struct rk8xx_priv *priv = dev_get_priv(pmic); 159 uint mask = 0; 160 int ret = 0; 161 162 switch (priv->variant) { 163 case RK805_ID: 164 case RK816_ID: 165 if (buck >= 4) { 166 mask = 1 << (buck - 4); 167 ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN2); 168 } else { 169 mask = 1 << buck; 170 ret = pmic_reg_read(pmic, RK816_REG_DCDC_EN1); 171 } 172 break; 173 case RK808_ID: 174 case RK818_ID: 175 mask = 1 << buck; 176 ret = pmic_reg_read(pmic, REG_DCDC_EN); 177 if (ret < 0) 178 return ret; 179 break; 180 } 181 return ret & mask ? true : false; 182 } 183 184 185 static int _buck_set_enable(struct udevice *pmic, int buck, bool enable) 186 { 187 uint mask, value, en_reg; 188 int ret; 189 struct rk8xx_priv *priv = dev_get_priv(pmic); 190 191 switch (priv->variant) { 192 case RK805_ID: 193 case RK816_ID: 194 if (buck >= 4) { 195 buck -= 4; 196 en_reg = RK816_REG_DCDC_EN2; 197 } else { 198 en_reg = RK816_REG_DCDC_EN1; 199 } 200 if (enable) 201 value = ((1 << buck) | (1 << (buck + 4))); 202 else 203 value = ((0 << buck) | (1 << (buck + 4))); 204 ret = pmic_reg_write(pmic, en_reg, value); 205 break; 206 207 case RK808_ID: 208 case RK818_ID: 209 mask = 1 << buck; 210 if (enable) { 211 ret = pmic_clrsetbits(pmic, REG_DCDC_ILMAX, 212 0, 3 << (buck * 2)); 213 if (ret) 214 return ret; 215 ret = pmic_clrsetbits(pmic, REG_DCDC_UV_ACT, 216 1 << buck, 0); 217 if (ret) 218 return ret; 219 } 220 ret = pmic_clrsetbits(pmic, REG_DCDC_EN, mask, 221 enable ? mask : 0); 222 break; 223 default: 224 ret = -EINVAL; 225 } 226 227 return ret; 228 } 229 230 #ifdef ENABLE_DRIVER 231 static const struct rk8xx_reg_info *get_ldo_reg(struct udevice *pmic, 232 int num) 233 { 234 struct rk8xx_priv *priv = dev_get_priv(pmic); 235 236 switch (priv->variant) { 237 case RK805_ID: 238 case RK816_ID: 239 return &rk816_ldo[num]; 240 case RK818_ID: 241 return &rk818_ldo[num]; 242 default: 243 return &rk808_ldo[num]; 244 } 245 } 246 247 static int _ldo_get_enable(struct udevice *pmic, int ldo) 248 { 249 struct rk8xx_priv *priv = dev_get_priv(pmic); 250 uint mask = 0; 251 int ret = 0; 252 253 switch (priv->variant) { 254 case RK805_ID: 255 case RK816_ID: 256 if (ldo >= 4) { 257 mask = 1 << (ldo - 4); 258 ret = pmic_reg_read(pmic, RK816_REG_LDO_EN2); 259 } else { 260 mask = 1 << ldo; 261 ret = pmic_reg_read(pmic, RK816_REG_LDO_EN1); 262 } 263 break; 264 case RK808_ID: 265 case RK818_ID: 266 mask = 1 << ldo; 267 ret = pmic_reg_read(pmic, REG_LDO_EN); 268 if (ret < 0) 269 return ret; 270 break; 271 } 272 return ret & mask ? true : false; 273 } 274 275 276 static int _ldo_set_enable(struct udevice *pmic, int ldo, bool enable) 277 { 278 struct rk8xx_priv *priv = dev_get_priv(pmic); 279 uint mask, value, en_reg; 280 int ret = 0; 281 282 switch (priv->variant) { 283 case RK805_ID: 284 case RK816_ID: 285 if (ldo >= 4) { 286 ldo -= 4; 287 en_reg = RK816_REG_LDO_EN2; 288 } else { 289 en_reg = RK816_REG_LDO_EN1; 290 } 291 if (enable) 292 value = ((1 << ldo) | (1 << (ldo + 4))); 293 else 294 value = ((0 << ldo) | (1 << (ldo + 4))); 295 296 ret = pmic_reg_write(pmic, en_reg, value); 297 break; 298 case RK808_ID: 299 case RK818_ID: 300 mask = 1 << ldo; 301 ret = pmic_clrsetbits(pmic, REG_LDO_EN, mask, 302 enable ? mask : 0); 303 break; 304 } 305 306 return ret; 307 } 308 309 static int buck_get_value(struct udevice *dev) 310 { 311 int buck = dev->driver_data - 1; 312 const struct rk8xx_reg_info *info = get_buck_reg(dev->parent, buck, 0); 313 int mask = info->vsel_mask; 314 int ret, val; 315 316 if (info->vsel_reg == -1) 317 return -ENOSYS; 318 ret = pmic_reg_read(dev->parent, info->vsel_reg); 319 if (ret < 0) 320 return ret; 321 val = ret & mask; 322 323 return info->min_uv + val * info->step_uv; 324 } 325 326 static int buck_set_value(struct udevice *dev, int uvolt) 327 { 328 int buck = dev->driver_data - 1; 329 330 return _buck_set_value(dev->parent, buck, uvolt); 331 } 332 333 static int buck_set_enable(struct udevice *dev, bool enable) 334 { 335 int buck = dev->driver_data - 1; 336 337 return _buck_set_enable(dev->parent, buck, enable); 338 } 339 340 static int buck_get_enable(struct udevice *dev) 341 { 342 int buck = dev->driver_data - 1; 343 344 return _buck_get_enable(dev->parent, buck); 345 } 346 347 static int ldo_get_value(struct udevice *dev) 348 { 349 int ldo = dev->driver_data - 1; 350 const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo); 351 int mask = info->vsel_mask; 352 int ret, val; 353 354 if (info->vsel_reg == -1) 355 return -ENOSYS; 356 ret = pmic_reg_read(dev->parent, info->vsel_reg); 357 if (ret < 0) 358 return ret; 359 val = ret & mask; 360 361 return info->min_uv + val * info->step_uv; 362 } 363 364 static int ldo_set_value(struct udevice *dev, int uvolt) 365 { 366 int ldo = dev->driver_data - 1; 367 const struct rk8xx_reg_info *info = get_ldo_reg(dev->parent, ldo); 368 int mask = info->vsel_mask; 369 int val; 370 371 if (info->vsel_reg == -1) 372 return -ENOSYS; 373 val = (uvolt - info->min_uv) / info->step_uv; 374 debug("%s: reg=%x, mask=%x, val=%x\n", __func__, info->vsel_reg, mask, 375 val); 376 377 return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val); 378 } 379 380 static int ldo_set_enable(struct udevice *dev, bool enable) 381 { 382 int ldo = dev->driver_data - 1; 383 384 return _ldo_set_enable(dev->parent, ldo, enable); 385 } 386 387 static int ldo_get_enable(struct udevice *dev) 388 { 389 int ldo = dev->driver_data - 1; 390 391 return _ldo_get_enable(dev->parent, ldo); 392 } 393 394 static int switch_set_enable(struct udevice *dev, bool enable) 395 { 396 int sw = dev->driver_data - 1; 397 uint mask; 398 399 mask = 1 << (sw + 5); 400 401 return pmic_clrsetbits(dev->parent, REG_DCDC_EN, mask, 402 enable ? mask : 0); 403 } 404 405 static int switch_get_enable(struct udevice *dev) 406 { 407 int sw = dev->driver_data - 1; 408 int ret; 409 uint mask; 410 411 mask = 1 << (sw + 5); 412 413 ret = pmic_reg_read(dev->parent, REG_DCDC_EN); 414 if (ret < 0) 415 return ret; 416 417 return ret & mask ? true : false; 418 } 419 420 static int rk8xx_buck_probe(struct udevice *dev) 421 { 422 struct dm_regulator_uclass_platdata *uc_pdata; 423 424 uc_pdata = dev_get_uclass_platdata(dev); 425 426 uc_pdata->type = REGULATOR_TYPE_BUCK; 427 uc_pdata->mode_count = 0; 428 429 return 0; 430 } 431 432 static int rk8xx_ldo_probe(struct udevice *dev) 433 { 434 struct dm_regulator_uclass_platdata *uc_pdata; 435 436 uc_pdata = dev_get_uclass_platdata(dev); 437 438 uc_pdata->type = REGULATOR_TYPE_LDO; 439 uc_pdata->mode_count = 0; 440 441 return 0; 442 } 443 444 static int rk8xx_switch_probe(struct udevice *dev) 445 { 446 struct dm_regulator_uclass_platdata *uc_pdata; 447 448 uc_pdata = dev_get_uclass_platdata(dev); 449 450 uc_pdata->type = REGULATOR_TYPE_FIXED; 451 uc_pdata->mode_count = 0; 452 453 return 0; 454 } 455 456 static const struct dm_regulator_ops rk8xx_buck_ops = { 457 .get_value = buck_get_value, 458 .set_value = buck_set_value, 459 .get_enable = buck_get_enable, 460 .set_enable = buck_set_enable, 461 }; 462 463 static const struct dm_regulator_ops rk8xx_ldo_ops = { 464 .get_value = ldo_get_value, 465 .set_value = ldo_set_value, 466 .get_enable = ldo_get_enable, 467 .set_enable = ldo_set_enable, 468 }; 469 470 static const struct dm_regulator_ops rk8xx_switch_ops = { 471 .get_enable = switch_get_enable, 472 .set_enable = switch_set_enable, 473 }; 474 475 U_BOOT_DRIVER(rk8xx_buck) = { 476 .name = "rk8xx_buck", 477 .id = UCLASS_REGULATOR, 478 .ops = &rk8xx_buck_ops, 479 .probe = rk8xx_buck_probe, 480 }; 481 482 U_BOOT_DRIVER(rk8xx_ldo) = { 483 .name = "rk8xx_ldo", 484 .id = UCLASS_REGULATOR, 485 .ops = &rk8xx_ldo_ops, 486 .probe = rk8xx_ldo_probe, 487 }; 488 489 U_BOOT_DRIVER(rk8xx_switch) = { 490 .name = "rk8xx_switch", 491 .id = UCLASS_REGULATOR, 492 .ops = &rk8xx_switch_ops, 493 .probe = rk8xx_switch_probe, 494 }; 495 #endif 496 497 int rk8xx_spl_configure_buck(struct udevice *pmic, int buck, int uvolt) 498 { 499 int ret; 500 501 ret = _buck_set_value(pmic, buck, uvolt); 502 if (ret) 503 return ret; 504 505 return _buck_set_enable(pmic, buck, true); 506 } 507 508 int rk818_spl_configure_usb_input_current(struct udevice *pmic, int current_ma) 509 { 510 uint i; 511 512 for (i = 0; i < ARRAY_SIZE(rk818_chrg_cur_input_array); i++) 513 if (current_ma <= rk818_chrg_cur_input_array[i]) 514 break; 515 516 return pmic_clrsetbits(pmic, REG_USB_CTRL, RK818_USB_ILIM_SEL_MASK, i); 517 } 518 519 int rk818_spl_configure_usb_chrg_shutdown(struct udevice *pmic, int uvolt) 520 { 521 uint i; 522 523 for (i = 0; i < ARRAY_SIZE(rk818_chrg_shutdown_vsel_array); i++) 524 if (uvolt <= rk818_chrg_shutdown_vsel_array[i]) 525 break; 526 527 return pmic_clrsetbits(pmic, REG_USB_CTRL, RK818_USB_CHG_SD_VSEL_MASK, 528 i); 529 } 530