1 /* 2 * Copyright (C) 2015 Google, Inc 3 * Written by Simon Glass <sjg@chromium.org> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <dm.h> 10 #include <errno.h> 11 #include <irq-generic.h> 12 #include <power/rk8xx_pmic.h> 13 #include <power/pmic.h> 14 15 DECLARE_GLOBAL_DATA_PTR; 16 17 #if CONFIG_IS_ENABLED(IRQ) 18 /* RK805 */ 19 static const struct virq_reg rk805_irqs[] = { 20 [RK8XX_IRQ_PWRON_FALL] = { 21 .mask = RK805_IRQ_PWRON_FALL_MSK, 22 .reg_offset = 0, 23 }, 24 [RK8XX_IRQ_PWRON_RISE] = { 25 .mask = RK805_IRQ_PWRON_RISE_MSK, 26 .reg_offset = 0, 27 }, 28 }; 29 30 static struct virq_chip rk805_irq_chip = { 31 .status_base = RK805_INT_STS_REG, 32 .mask_base = RK805_INT_MSK_REG, 33 .num_regs = 1, 34 .read = pmic_reg_read, 35 .write = pmic_reg_write, 36 .irqs = rk805_irqs, 37 .num_irqs = ARRAY_SIZE(rk805_irqs), 38 }; 39 40 /* RK806 */ 41 static const struct virq_reg rk806_irqs[] = { 42 [RK8XX_IRQ_PWRON_FALL] = { 43 .mask = RK806_IRQ_PWRON_FALL_MSK, 44 .reg_offset = 0, 45 }, 46 [RK8XX_IRQ_PWRON_RISE] = { 47 .mask = RK806_IRQ_PWRON_RISE_MSK, 48 .reg_offset = 0, 49 }, 50 }; 51 52 static struct virq_chip rk806_irq_chip = { 53 .status_base = RK806_INT_STS0, 54 .mask_base = RK806_INT_MSK0, 55 .num_regs = 1, 56 .read = pmic_reg_read, 57 .write = pmic_reg_write, 58 .irqs = rk806_irqs, 59 .num_irqs = ARRAY_SIZE(rk806_irqs), 60 }; 61 62 /* RK808 */ 63 static const struct virq_reg rk808_irqs[] = { 64 [RK8XX_IRQ_PLUG_OUT] = { 65 .mask = RK808_IRQ_PLUG_OUT_MSK, 66 .reg_offset = 1, 67 }, 68 }; 69 70 static struct virq_chip rk808_irq_chip = { 71 .status_base = RK808_INT_STS_REG1, 72 .mask_base = RK808_INT_MSK_REG1, 73 .irq_reg_stride = 2, 74 .num_regs = 2, 75 .read = pmic_reg_read, 76 .write = pmic_reg_write, 77 .irqs = rk808_irqs, 78 .num_irqs = ARRAY_SIZE(rk808_irqs), 79 }; 80 81 /* RK816 */ 82 static const struct virq_reg rk816_irqs[] = { 83 [RK8XX_IRQ_PWRON_FALL] = { 84 .mask = RK816_IRQ_PWRON_FALL_MSK, 85 .reg_offset = 0, 86 }, 87 [RK8XX_IRQ_PWRON_RISE] = { 88 .mask = RK816_IRQ_PWRON_RISE_MSK, 89 .reg_offset = 0, 90 }, 91 [RK8XX_IRQ_PLUG_OUT] = { 92 .mask = RK816_IRQ_PLUG_OUT_MSK, 93 .reg_offset = 2, 94 }, 95 [RK8XX_IRQ_CHG_OK] = { 96 .mask = RK816_IRQ_CHR_OK_MSK, 97 .reg_offset = 2, 98 }, 99 }; 100 101 static struct virq_chip rk816_irq_chip = { 102 .status_base = RK816_INT_STS_REG1, 103 .mask_base = RK816_INT_MSK_REG1, 104 .irq_unalign_reg_idx = 1, /* idx <= 1, stride = 3 */ 105 .irq_unalign_reg_stride = 3, 106 .irq_reg_stride = 2, /* idx > 1, stride = 2 */ 107 .num_regs = 3, 108 .read = pmic_reg_read, 109 .write = pmic_reg_write, 110 .irqs = rk816_irqs, 111 .num_irqs = ARRAY_SIZE(rk816_irqs), 112 }; 113 114 /* RK818 */ 115 static const struct virq_reg rk818_irqs[] = { 116 [RK8XX_IRQ_PLUG_OUT] = { 117 .mask = RK818_IRQ_PLUG_OUT_MSK, 118 .reg_offset = 1, 119 }, 120 [RK8XX_IRQ_CHG_OK] = { 121 .mask = RK818_IRQ_CHR_OK_MSK, 122 .reg_offset = 1, 123 }, 124 }; 125 126 static struct virq_chip rk818_irq_chip = { 127 .status_base = RK818_INT_STS_REG1, 128 .mask_base = RK818_INT_MSK_REG1, 129 .irq_reg_stride = 2, 130 .num_regs = 2, 131 .read = pmic_reg_read, 132 .write = pmic_reg_write, 133 .irqs = rk818_irqs, 134 .num_irqs = ARRAY_SIZE(rk818_irqs), 135 }; 136 137 /* RK817/RK809 */ 138 static const struct virq_reg rk817_irqs[] = { 139 [RK8XX_IRQ_PWRON_FALL] = { 140 .mask = RK817_IRQ_PWRON_FALL_MSK, 141 .reg_offset = 0, 142 }, 143 [RK8XX_IRQ_PWRON_RISE] = { 144 .mask = RK817_IRQ_PWRON_RISE_MSK, 145 .reg_offset = 0, 146 }, 147 [RK8XX_IRQ_PLUG_OUT] = { 148 .mask = RK817_IRQ_PLUG_OUT_MSK, 149 .reg_offset = 1, 150 }, 151 [RK8XX_IRQ_PLUG_IN] = { 152 .mask = RK817_IRQ_PLUG_IN_MSK, 153 .reg_offset = 1, 154 }, 155 }; 156 157 static struct virq_chip rk817_irq_chip = { 158 .status_base = RK817_INT_STS_REG0, 159 .mask_base = RK817_INT_MSK_REG0, 160 .irq_reg_stride = 2, 161 .num_regs = 3, 162 .read = pmic_reg_read, 163 .write = pmic_reg_write, 164 .irqs = rk817_irqs, 165 .num_irqs = ARRAY_SIZE(rk817_irqs), 166 }; 167 #endif 168 169 static struct reg_data rk817_init_reg[] = { 170 /* enable the under-voltage protection, 171 * the under-voltage protection will shutdown the LDO3 and reset the PMIC 172 */ 173 { RK817_BUCK4_CMIN, 0x6b, 0x6e}, 174 { RK817_PMIC_SYS_CFG1, 0x20, 0x70}, 175 /* Set pmic_sleep as none function */ 176 { RK817_PMIC_SYS_CFG3, 0x00, 0x18 }, 177 /* GATE pin function: gate function */ 178 { RK817_GPIO_INT_CFG, 0x00, 0x20 }, 179 #ifdef CONFIG_DM_CHARGE_DISPLAY 180 /* Set pmic_int active low */ 181 { RK817_GPIO_INT_CFG, 0x00, 0x02 }, 182 #endif 183 }; 184 185 static struct reg_data rk818_init_current[] = { 186 { REG_USB_CTRL, 0x07, 0x0f}, /* 2A */ 187 }; 188 189 static const struct pmic_child_info pmic_children_info[] = { 190 { .prefix = "DCDC", .driver = "rk8xx_buck"}, 191 { .prefix = "LDO", .driver = "rk8xx_ldo"}, 192 { .prefix = "NLDO", .driver = "rk8xx_ldo"}, 193 { .prefix = "PLDO", .driver = "rk8xx_pldo"}, 194 { .prefix = "SWITCH", .driver = "rk8xx_switch"}, 195 { }, 196 }; 197 198 static const struct pmic_child_info power_key_info[] = { 199 { .prefix = "pwrkey", .driver = "rk8xx_pwrkey"}, 200 { }, 201 }; 202 203 static const struct pmic_child_info rtc_info[] = { 204 { .prefix = "rtc", .driver = "rk8xx_rtc"}, 205 { }, 206 }; 207 208 static const struct pmic_child_info fuel_gauge_info[] = { 209 { .addr = "1c", .prefix = "battery", .driver = "rk818_fg"}, 210 { .addr = "20", .prefix = "battery", .driver = "rk817_fg"}, 211 { .addr = "1a", .prefix = "battery", .driver = "rk816_fg"}, 212 { }, 213 }; 214 215 static const struct pmic_child_info rk817_codec_info[] = { 216 { .prefix = "codec", .driver = "rk817_codec"}, 217 { }, 218 }; 219 220 static int rk8xx_reg_count(struct udevice *dev) 221 { 222 struct rk8xx_priv *priv = dev_get_priv(dev); 223 224 switch (priv->variant) { 225 case RK809_ID: 226 case RK817_ID: 227 return RK817_NUM_OF_REGS; 228 default: 229 return RK808_NUM_OF_REGS; 230 } 231 } 232 233 static int rk8xx_write(struct udevice *dev, uint reg, const uint8_t *buff, 234 int len) 235 { 236 int ret; 237 238 ret = dm_i2c_write(dev, reg, buff, len); 239 if (ret) { 240 printf("%s: write reg 0x%02x failed, ret=%d\n", __func__, reg, ret); 241 return ret; 242 } 243 244 return 0; 245 } 246 247 static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len) 248 { 249 int ret; 250 251 ret = dm_i2c_read(dev, reg, buff, len); 252 if (ret) { 253 printf("%s: read reg 0x%02x failed, ret=%d\n", __func__, reg, ret); 254 return ret; 255 } 256 257 return 0; 258 } 259 260 static int rk8xx_suspend(struct udevice *dev) 261 { 262 struct rk8xx_priv *priv = dev_get_priv(dev); 263 int ret = 0; 264 u8 i, val; 265 266 switch (priv->variant) { 267 case RK806_ID: 268 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 269 if (ret) 270 return ret; 271 val &= RK806_PWRCTRL_FUN_MSK; 272 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 273 if (ret) 274 return ret; 275 276 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 277 if (ret) 278 return ret; 279 280 val &= RK806_PWRCTRL_FUN_MSK; 281 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 282 if (ret) 283 return ret; 284 285 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) { 286 ret = rk8xx_read(dev, i, &val, 1); 287 if (ret) 288 return ret; 289 val &= RK806_VSEL_CTRL_MSK; 290 ret = rk8xx_write(dev, i, &val, 1); 291 if (ret) 292 return ret; 293 } 294 295 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 296 if (ret) 297 return ret; 298 val &= RK806_PWRCTRL_FUN_MSK; 299 val |= RK806_ENABLE_PWRCTRL; 300 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 301 if (ret) 302 return ret; 303 304 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) { 305 ret = rk8xx_read(dev, i, &val, 1); 306 if (ret) 307 return ret; 308 val &= RK806_VSEL_CTRL_MSK; 309 val |= RK806_VSEL_PWRCTRL1; 310 ret = rk8xx_write(dev, i, &val, 1); 311 if (ret) 312 return ret; 313 } 314 break; 315 case RK809_ID: 316 case RK817_ID: 317 /* pmic_sleep active high */ 318 ret = rk8xx_read(dev, RK817_PMIC_SYS_CFG3, &val, 1); 319 if (ret) 320 return ret; 321 priv->sleep_pin = val; 322 val &= ~0x38; 323 val |= 0x28; 324 ret = rk8xx_write(dev, RK817_PMIC_SYS_CFG3, &val, 1); 325 break; 326 default: 327 return 0; 328 } 329 330 return ret; 331 } 332 333 static int rk8xx_resume(struct udevice *dev) 334 { 335 struct rk8xx_priv *priv = dev_get_priv(dev); 336 int ret = 0; 337 u8 i, val; 338 339 switch (priv->variant) { 340 case RK806_ID: 341 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) { 342 ret = rk8xx_read(dev, i, &val, 1); 343 if (ret) 344 return ret; 345 val &= RK806_VSEL_CTRL_MSK; 346 ret = rk8xx_write(dev, i, &val, 1); 347 if (ret) 348 return ret; 349 } 350 351 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 352 if (ret) 353 return ret; 354 val &= RK806_PWRCTRL_FUN_MSK; 355 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 356 if (ret) 357 return ret; 358 359 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 360 if (ret) 361 return ret; 362 val &= RK806_PWRCTRL_FUN_MSK; 363 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 364 break; 365 case RK809_ID: 366 case RK817_ID: 367 ret = rk8xx_write(dev, RK817_PMIC_SYS_CFG3, &priv->sleep_pin, 1); 368 break; 369 default: 370 return 0; 371 } 372 373 return ret; 374 } 375 376 static int rk8xx_shutdown(struct udevice *dev) 377 { 378 struct rk8xx_priv *priv = dev_get_priv(dev); 379 u8 val, dev_off, devctrl_reg; 380 int ret = 0; 381 382 switch (priv->variant) { 383 case RK806_ID: 384 devctrl_reg = RK806_SYS_CFG3; 385 dev_off = RK806_DEV_OFF; 386 break; 387 case RK808_ID: 388 devctrl_reg = REG_DEVCTRL; 389 dev_off = BIT(3); 390 break; 391 case RK805_ID: 392 case RK816_ID: 393 case RK818_ID: 394 devctrl_reg = REG_DEVCTRL; 395 dev_off = BIT(0); 396 break; 397 case RK809_ID: 398 case RK817_ID: 399 devctrl_reg = RK817_REG_SYS_CFG3; 400 dev_off = BIT(0); 401 break; 402 default: 403 printf("Unknown PMIC: RK%x\n", priv->variant); 404 return -EINVAL; 405 } 406 407 ret = rk8xx_read(dev, devctrl_reg, &val, 1); 408 if (ret) 409 return ret; 410 411 val |= dev_off; 412 ret = rk8xx_write(dev, devctrl_reg, &val, 1); 413 if (ret) 414 return ret; 415 416 return 0; 417 } 418 419 #if CONFIG_IS_ENABLED(PMIC_CHILDREN) 420 static int rk8xx_bind(struct udevice *dev) 421 { 422 ofnode regulators_node; 423 int children; 424 425 regulators_node = dev_read_subnode(dev, "regulators"); 426 if (!ofnode_valid(regulators_node)) { 427 debug("%s: %s regulators subnode not found!\n", __func__, 428 dev->name); 429 return -ENXIO; 430 } 431 432 debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); 433 434 children = pmic_bind_children(dev, regulators_node, pmic_children_info); 435 if (!children) 436 debug("%s: %s - no child found\n", __func__, dev->name); 437 438 children = pmic_bind_children(dev, dev->node, power_key_info); 439 if (!children) 440 debug("%s: %s - no child found\n", __func__, dev->name); 441 442 children = pmic_bind_children(dev, dev->node, rtc_info); 443 if (!children) 444 debug("%s: %s - no child found\n", __func__, dev->name); 445 446 children = pmic_bind_children(dev, dev->node, fuel_gauge_info); 447 if (!children) 448 debug("%s: %s - no child found\n", __func__, dev->name); 449 450 children = pmic_bind_children(dev, dev->node, rk817_codec_info); 451 if (!children) 452 debug("%s: %s - no child found\n", __func__, dev->name); 453 454 /* Always return success for this device */ 455 return 0; 456 } 457 #endif 458 459 #if CONFIG_IS_ENABLED(IRQ) 460 /* 461 * When system suspend during U-Boot charge, make sure the plugout event 462 * be able to wakeup cpu in wfi/wfe state. 463 */ 464 #ifdef CONFIG_DM_CHARGE_DISPLAY 465 static void rk8xx_plug_out_handler(int irq, void *data) 466 { 467 printf("Plug out interrupt\n"); 468 } 469 #endif 470 471 static int rk8xx_ofdata_to_platdata(struct udevice *dev) 472 { 473 struct rk8xx_priv *rk8xx = dev_get_priv(dev); 474 u32 interrupt, phandle, val; 475 int ret; 476 477 phandle = dev_read_u32_default(dev, "interrupt-parent", -ENODATA); 478 if (phandle == -ENODATA) { 479 printf("Read 'interrupt-parent' failed, ret=%d\n", phandle); 480 return phandle; 481 } 482 483 ret = dev_read_u32_array(dev, "interrupts", &interrupt, 1); 484 if (ret) { 485 printf("Read 'interrupts' failed, ret=%d\n", ret); 486 return ret; 487 } 488 489 rk8xx->irq = phandle_gpio_to_irq(phandle, interrupt); 490 if (rk8xx->irq < 0) { 491 printf("Failed to request rk8xx irq, ret=%d\n", rk8xx->irq); 492 return rk8xx->irq; 493 } 494 495 val = dev_read_u32_default(dev, "long-press-off-time-sec", 0); 496 if (val <= 6) 497 rk8xx->lp_off_time = RK8XX_LP_TIME_6S; 498 else if (val <= 8) 499 rk8xx->lp_off_time = RK8XX_LP_TIME_8S; 500 else if (val <= 10) 501 rk8xx->lp_off_time = RK8XX_LP_TIME_10S; 502 else 503 rk8xx->lp_off_time = RK8XX_LP_TIME_12S; 504 505 val = dev_read_u32_default(dev, "long-press-restart", 0); 506 if (val) 507 rk8xx->lp_action = RK8XX_LP_RESTART; 508 else 509 rk8xx->lp_action = RK8XX_LP_OFF; 510 511 val = dev_read_u32_default(dev, "not-save-power-en", 0); 512 rk8xx->not_save_power_en = val; 513 514 val = dev_read_bool(dev, "vsys-off-shutdown"); 515 rk8xx->sys_can_sd = val; 516 517 rk8xx->rst_fun = dev_read_u32_default(dev, "pmic-reset-func", 0); 518 519 return 0; 520 } 521 522 static int rk8xx_irq_chip_init(struct udevice *dev) 523 { 524 struct rk8xx_priv *priv = dev_get_priv(dev); 525 struct virq_chip *irq_chip = NULL; 526 __maybe_unused int irq_plugout = 1; 527 int ret; 528 529 switch (priv->variant) { 530 case RK806_ID: 531 irq_chip = &rk806_irq_chip; 532 irq_plugout = 0; 533 break; 534 case RK808_ID: 535 irq_chip = &rk808_irq_chip; 536 break; 537 case RK805_ID: 538 irq_chip = &rk805_irq_chip; 539 irq_plugout = 0; 540 break; 541 case RK816_ID: 542 irq_chip = &rk816_irq_chip; 543 break; 544 case RK818_ID: 545 irq_chip = &rk818_irq_chip; 546 break; 547 case RK809_ID: 548 case RK817_ID: 549 irq_chip = &rk817_irq_chip; 550 break; 551 default: 552 return -EINVAL; 553 } 554 555 if (irq_chip) { 556 ret = virq_add_chip(dev, irq_chip, priv->irq); 557 if (ret) { 558 printf("Failed to add irqchip(irq=%d), ret=%d\n", 559 priv->irq, ret); 560 return ret; 561 } 562 563 priv->irq_chip = irq_chip; 564 565 #ifdef CONFIG_DM_CHARGE_DISPLAY 566 int irq; 567 568 if (irq_plugout) { 569 irq = virq_to_irq(irq_chip, RK8XX_IRQ_PLUG_OUT); 570 if (irq < 0) { 571 printf("Failed to register plugout irq, ret=%d\n", irq); 572 return irq; 573 } 574 irq_install_handler(irq, rk8xx_plug_out_handler, dev); 575 irq_handler_enable_suspend_only(irq); 576 } 577 #endif 578 } 579 580 return 0; 581 } 582 #else 583 static inline int rk8xx_ofdata_to_platdata(struct udevice *dev) { return 0; } 584 static inline int rk8xx_irq_chip_init(struct udevice *dev) { return 0; } 585 #endif 586 587 static int rk8xx_probe(struct udevice *dev) 588 { 589 struct rk8xx_priv *priv = dev_get_priv(dev); 590 struct reg_data *init_current = NULL; 591 struct reg_data *init_data = NULL; 592 int init_current_num = 0; 593 int init_data_num = 0; 594 int ret = 0, i, show_variant; 595 uint8_t msb, lsb, id_msb, id_lsb; 596 uint8_t on_source = 0, off_source = 0; 597 uint8_t pwron_key = 0, lp_off_msk = 0, lp_act_msk = 0; 598 uint8_t power_en0, power_en1, power_en2, power_en3; 599 uint8_t on, off; 600 uint8_t value; 601 602 /* read Chip variant */ 603 if (device_is_compatible(dev, "rockchip,rk817") || 604 device_is_compatible(dev, "rockchip,rk809")) { 605 id_msb = RK817_ID_MSB; 606 id_lsb = RK817_ID_LSB; 607 } else if (device_is_compatible(dev, "rockchip,rk806")) { 608 id_msb = RK806_CHIP_NAME; 609 id_lsb = RK806_CHIP_VER; 610 } else { 611 id_msb = ID_MSB; 612 id_lsb = ID_LSB; 613 } 614 615 ret = rk8xx_read(dev, id_msb, &msb, 1); 616 if (ret) 617 return ret; 618 ret = rk8xx_read(dev, id_lsb, &lsb, 1); 619 if (ret) 620 return ret; 621 622 priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK; 623 show_variant = priv->variant; 624 switch (priv->variant) { 625 case RK806_ID: 626 on_source = RK806_ON_SOURCE; 627 off_source = RK806_OFF_SOURCE; 628 ret = rk8xx_read(dev, RK806_HW_VER, &value, 1); 629 if (ret) 630 panic("RK806: read RK806_HW_VER error!\n"); 631 632 if ((lsb & RK806_VERSION_MSK) == RK806_VERSION_AB) { 633 ret = rk8xx_read(dev, RK806_SYS_CFG1, &value, 1); 634 if (ret) { 635 dev_err(dev, "rk806 RK806_SYS_CFG1 read error: %d\n", ret); 636 return ret; 637 } 638 value |= RK806_ABNORDET_EN; 639 rk8xx_write(dev, RK806_SYS_CFG1, &value, 1); 640 } 641 642 if (priv->rst_fun) { 643 rk8xx_read(dev, RK806_SYS_CFG3, &value, 1); 644 value &= RK806_RESET_FUN_CLR; 645 if (priv->rst_fun == RK806_RST_MODE1) { 646 value |= (RK806_RST_MODE1 << 6); 647 rk8xx_write(dev, RK806_SYS_CFG3, &value, 1); 648 } else if (priv->rst_fun == RK806_RST_MODE2) { 649 value |= (RK806_RST_MODE2 << 6); 650 rk8xx_write(dev, RK806_SYS_CFG3, &value, 1); 651 } 652 } 653 break; 654 case RK808_ID: 655 show_variant = 0x808; /* RK808 hardware ID is 0 */ 656 pwron_key = RK8XX_DEVCTRL_REG; 657 lp_off_msk = RK8XX_LP_OFF_MSK; 658 break; 659 case RK805_ID: 660 case RK816_ID: 661 on_source = RK8XX_ON_SOURCE; 662 off_source = RK8XX_OFF_SOURCE; 663 pwron_key = RK8XX_DEVCTRL_REG; 664 lp_off_msk = RK8XX_LP_OFF_MSK; 665 lp_act_msk = RK8XX_LP_ACTION_MSK; 666 break; 667 case RK818_ID: 668 on_source = RK8XX_ON_SOURCE; 669 off_source = RK8XX_OFF_SOURCE; 670 pwron_key = RK8XX_DEVCTRL_REG; 671 lp_off_msk = RK8XX_LP_OFF_MSK; 672 lp_act_msk = RK8XX_LP_ACTION_MSK; 673 /* set current if no fuel gauge */ 674 if (!ofnode_valid(dev_read_subnode(dev, "battery"))) { 675 init_current = rk818_init_current; 676 init_current_num = ARRAY_SIZE(rk818_init_current); 677 } 678 break; 679 case RK809_ID: 680 case RK817_ID: 681 if (device_is_compatible(dev, "rockchip,rk809") && (priv->variant != RK809_ID)) { 682 dev_err(dev, "the dts is RK809, the hardware is RK817\n"); 683 run_command("download", 0); 684 } 685 686 if (device_is_compatible(dev, "rockchip,rk817") && (priv->variant != RK817_ID)) { 687 dev_err(dev, "the dts is RK817, the hardware is RK809\n"); 688 run_command("download", 0); 689 } 690 691 on_source = RK817_ON_SOURCE; 692 off_source = RK817_OFF_SOURCE; 693 pwron_key = RK817_PWRON_KEY; 694 lp_off_msk = RK8XX_LP_OFF_MSK; 695 lp_act_msk = RK8XX_LP_ACTION_MSK; 696 init_data = rk817_init_reg; 697 init_data_num = ARRAY_SIZE(rk817_init_reg); 698 699 /* whether the system voltage can be shutdown in PWR_off mode */ 700 if (priv->sys_can_sd) { 701 ret = rk8xx_read(dev, RK817_PMIC_CHRG_TERM, &value, 1); 702 if (ret) 703 return ret; 704 value |= 0x80; 705 ret = rk8xx_write(dev, RK817_PMIC_CHRG_TERM, &value, 1); 706 if (ret) 707 return ret; 708 } else { 709 ret = rk8xx_read(dev, RK817_PMIC_CHRG_TERM, &value, 1); 710 if (ret) 711 return ret; 712 value &= 0x7f; 713 ret = rk8xx_write(dev, RK817_PMIC_CHRG_TERM, &value, 1); 714 if (ret) 715 return ret; 716 } 717 718 /* judge whether save the PMIC_POWER_EN register */ 719 if (!priv->not_save_power_en) { 720 ret = rk8xx_read(dev, RK817_POWER_EN0, &power_en0, 1); 721 if (ret) 722 return ret; 723 ret = rk8xx_read(dev, RK817_POWER_EN1, &power_en1, 1); 724 if (ret) 725 return ret; 726 ret = rk8xx_read(dev, RK817_POWER_EN2, &power_en2, 1); 727 if (ret) 728 return ret; 729 ret = rk8xx_read(dev, RK817_POWER_EN3, &power_en3, 1); 730 if (ret) 731 return ret; 732 733 value = (power_en0 & 0x0f) | ((power_en1 & 0x0f) << 4); 734 rk8xx_write(dev, RK817_POWER_EN_SAVE0, &value, 1); 735 value = (power_en2 & 0x0f) | ((power_en3 & 0x0f) << 4); 736 rk8xx_write(dev, RK817_POWER_EN_SAVE1, &value, 1); 737 } 738 break; 739 default: 740 printf("Unknown PMIC: RK%x!!\n", priv->variant); 741 return -EINVAL; 742 } 743 744 /* common init */ 745 for (i = 0; i < init_data_num; i++) { 746 ret = pmic_clrsetbits(dev, 747 init_data[i].reg, 748 init_data[i].mask, 749 init_data[i].val); 750 if (ret < 0) { 751 printf("%s: i2c set reg 0x%x failed, ret=%d\n", 752 __func__, init_data[i].reg, ret); 753 } 754 } 755 756 /* current init */ 757 for (i = 0; i < init_current_num; i++) { 758 ret = pmic_clrsetbits(dev, 759 init_current[i].reg, 760 init_current[i].mask, 761 init_current[i].val); 762 if (ret < 0) { 763 printf("%s: i2c set reg 0x%x failed, ret=%d\n", 764 __func__, init_current[i].reg, ret); 765 } 766 } 767 768 printf("PMIC: RK%x ", show_variant); 769 770 if (on_source && off_source) { 771 rk8xx_read(dev, on_source, &on, 1); 772 rk8xx_read(dev, off_source, &off, 1); 773 printf("(on=0x%02x, off=0x%02x)", on, off); 774 } 775 printf("\n"); 776 777 if (pwron_key) { 778 ret = rk8xx_read(dev, pwron_key, &value, 1); 779 if (ret) 780 return ret; 781 value &= ~(lp_off_msk | lp_act_msk); 782 if (lp_off_msk) 783 value |= priv->lp_off_time; 784 if (lp_act_msk) 785 value |= priv->lp_action; 786 rk8xx_write(dev, pwron_key, &value, 1); 787 } 788 789 ret = rk8xx_irq_chip_init(dev); 790 if (ret) { 791 printf("IRQ chip initial failed\n"); 792 return ret; 793 } 794 795 return 0; 796 } 797 798 static struct dm_pmic_ops rk8xx_ops = { 799 .reg_count = rk8xx_reg_count, 800 .read = rk8xx_read, 801 .write = rk8xx_write, 802 .suspend = rk8xx_suspend, 803 .resume = rk8xx_resume, 804 .shutdown = rk8xx_shutdown, 805 }; 806 807 static const struct udevice_id rk8xx_ids[] = { 808 { .compatible = "rockchip,rk805" }, 809 { .compatible = "rockchip,rk806" }, 810 { .compatible = "rockchip,rk808" }, 811 { .compatible = "rockchip,rk809" }, 812 { .compatible = "rockchip,rk816" }, 813 { .compatible = "rockchip,rk817" }, 814 { .compatible = "rockchip,rk818" }, 815 { } 816 }; 817 818 U_BOOT_DRIVER(pmic_rk8xx) = { 819 .name = "rk8xx pmic", 820 .id = UCLASS_PMIC, 821 .of_match = rk8xx_ids, 822 #if CONFIG_IS_ENABLED(PMIC_CHILDREN) 823 .bind = rk8xx_bind, 824 #endif 825 .ofdata_to_platdata = rk8xx_ofdata_to_platdata, 826 .priv_auto_alloc_size = sizeof(struct rk8xx_priv), 827 .probe = rk8xx_probe, 828 .ops = &rk8xx_ops, 829 }; 830