xref: /rk3399_rockchip-uboot/drivers/power/pmic/rk8xx.c (revision 7e044b9aeceaa3c07ba4dd8939761bd87f4c8300)
1 /*
2  * Copyright (C) 2015 Google, Inc
3  * Written by Simon Glass <sjg@chromium.org>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #include <common.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <irq-generic.h>
12 #include <power/rk8xx_pmic.h>
13 #include <power/pmic.h>
14 
15 DECLARE_GLOBAL_DATA_PTR;
16 
17 #if CONFIG_IS_ENABLED(IRQ)
18 /* RK805 */
19 static const struct virq_reg rk805_irqs[] = {
20 	[RK8XX_IRQ_PWRON_FALL] = {
21 		.mask = RK805_IRQ_PWRON_FALL_MSK,
22 		.reg_offset = 0,
23 	},
24 	[RK8XX_IRQ_PWRON_RISE] = {
25 		.mask = RK805_IRQ_PWRON_RISE_MSK,
26 		.reg_offset = 0,
27 	},
28 };
29 
30 static struct virq_chip rk805_irq_chip = {
31 	.status_base		= RK805_INT_STS_REG,
32 	.mask_base		= RK805_INT_MSK_REG,
33 	.num_regs		= 1,
34 	.read			= pmic_reg_read,
35 	.write			= pmic_reg_write,
36 	.irqs			= rk805_irqs,
37 	.num_irqs		= ARRAY_SIZE(rk805_irqs),
38 };
39 
40 /* RK808 */
41 static const struct virq_reg rk808_irqs[] = {
42 	[RK8XX_IRQ_PLUG_OUT] = {
43 		.mask = RK808_IRQ_PLUG_OUT_MSK,
44 		.reg_offset = 1,
45 	},
46 };
47 
48 static struct virq_chip rk808_irq_chip = {
49 	.status_base		= RK808_INT_STS_REG1,
50 	.mask_base		= RK808_INT_MSK_REG1,
51 	.irq_reg_stride		= 2,
52 	.num_regs		= 2,
53 	.read			= pmic_reg_read,
54 	.write			= pmic_reg_write,
55 	.irqs			= rk808_irqs,
56 	.num_irqs		= ARRAY_SIZE(rk808_irqs),
57 };
58 
59 /* RK816 */
60 static const struct virq_reg rk816_irqs[] = {
61 	[RK8XX_IRQ_PWRON_FALL] = {
62 		.mask = RK816_IRQ_PWRON_FALL_MSK,
63 		.reg_offset = 0,
64 	},
65 	[RK8XX_IRQ_PWRON_RISE] = {
66 		.mask = RK816_IRQ_PWRON_RISE_MSK,
67 		.reg_offset = 0,
68 	},
69 	[RK8XX_IRQ_PLUG_OUT] = {
70 		.mask = RK816_IRQ_PLUG_OUT_MSK,
71 		.reg_offset = 2,
72 	},
73 	[RK8XX_IRQ_CHG_OK] = {
74 		.mask = RK816_IRQ_CHR_OK_MSK,
75 		.reg_offset = 2,
76 	},
77 };
78 
79 static struct virq_chip rk816_irq_chip = {
80 	.status_base		= RK816_INT_STS_REG1,
81 	.mask_base		= RK816_INT_MSK_REG1,
82 	.irq_unalign_reg_idx	= 1,	/* idx <= 1, stride = 3 */
83 	.irq_unalign_reg_stride	= 3,
84 	.irq_reg_stride		= 2,	/* idx > 1, stride = 2 */
85 	.num_regs		= 3,
86 	.read			= pmic_reg_read,
87 	.write			= pmic_reg_write,
88 	.irqs			= rk816_irqs,
89 	.num_irqs		= ARRAY_SIZE(rk816_irqs),
90 };
91 
92 /* RK818 */
93 static const struct virq_reg rk818_irqs[] = {
94 	[RK8XX_IRQ_PLUG_OUT] = {
95 		.mask = RK818_IRQ_PLUG_OUT_MSK,
96 		.reg_offset = 1,
97 	},
98 	[RK8XX_IRQ_CHG_OK] = {
99 		.mask = RK818_IRQ_CHR_OK_MSK,
100 		.reg_offset = 1,
101 	},
102 };
103 
104 static struct virq_chip rk818_irq_chip = {
105 	.status_base		= RK818_INT_STS_REG1,
106 	.mask_base		= RK818_INT_MSK_REG1,
107 	.irq_reg_stride		= 2,
108 	.num_regs		= 2,
109 	.read			= pmic_reg_read,
110 	.write			= pmic_reg_write,
111 	.irqs			= rk818_irqs,
112 	.num_irqs		= ARRAY_SIZE(rk818_irqs),
113 };
114 
115 /* RK817/RK809 */
116 static const struct virq_reg rk817_irqs[] = {
117 	[RK8XX_IRQ_PWRON_FALL] = {
118 		.mask = RK817_IRQ_PWRON_FALL_MSK,
119 		.reg_offset = 0,
120 	},
121 	[RK8XX_IRQ_PWRON_RISE] = {
122 		.mask = RK817_IRQ_PWRON_RISE_MSK,
123 		.reg_offset = 0,
124 	},
125 	[RK8XX_IRQ_PLUG_OUT] = {
126 		.mask = RK817_IRQ_PLUG_OUT_MSK,
127 		.reg_offset = 1,
128 	},
129 	[RK8XX_IRQ_PLUG_IN] = {
130 		.mask = RK817_IRQ_PLUG_IN_MSK,
131 		.reg_offset = 1,
132 	},
133 };
134 
135 static struct virq_chip rk817_irq_chip = {
136 	.status_base		= RK817_INT_STS_REG0,
137 	.mask_base		= RK817_INT_MSK_REG0,
138 	.irq_reg_stride		= 2,
139 	.num_regs		= 3,
140 	.read			= pmic_reg_read,
141 	.write			= pmic_reg_write,
142 	.irqs			= rk817_irqs,
143 	.num_irqs		= ARRAY_SIZE(rk817_irqs),
144 };
145 #endif
146 
147 static struct reg_data rk817_init_reg[] = {
148 /* enable the under-voltage protection,
149  * the under-voltage protection will shutdown the LDO3 and reset the PMIC
150  */
151 	{ RK817_BUCK4_CMIN, 0x6b, 0x6e},
152 	{ RK817_PMIC_SYS_CFG1, 0x20, 0x70},
153 	/* Set pmic_sleep as none function */
154 	{ RK817_PMIC_SYS_CFG3, 0x00, 0x18 },
155 
156 #ifdef CONFIG_DM_CHARGE_DISPLAY
157 	/* Set pmic_int active low */
158 	{ RK817_GPIO_INT_CFG,  0x00, 0x02 },
159 #endif
160 };
161 
162 static struct reg_data rk818_init_current[] = {
163 	{ REG_USB_CTRL, 0x07, 0x0f}, /* 2A */
164 };
165 
166 static const struct pmic_child_info pmic_children_info[] = {
167 	{ .prefix = "DCDC", .driver = "rk8xx_buck"},
168 	{ .prefix = "LDO", .driver = "rk8xx_ldo"},
169 	{ .prefix = "SWITCH", .driver = "rk8xx_switch"},
170 	{ },
171 };
172 
173 static const struct pmic_child_info power_key_info[] = {
174 	{ .prefix = "pwrkey", .driver = "rk8xx_pwrkey"},
175 	{ },
176 };
177 
178 static const struct pmic_child_info rtc_info[] = {
179 	{ .prefix = "rtc", .driver = "rk8xx_rtc"},
180 	{ },
181 };
182 
183 static const struct pmic_child_info fuel_gauge_info[] = {
184 	{ .addr = "1c", .prefix = "battery", .driver = "rk818_fg"},
185 	{ .addr = "20", .prefix = "battery", .driver = "rk817_fg"},
186 	{ .addr = "1a", .prefix = "battery", .driver = "rk816_fg"},
187 	{ },
188 };
189 
190 static const struct pmic_child_info rk817_codec_info[] = {
191 	{ .prefix = "codec", .driver = "rk817_codec"},
192 	{ },
193 };
194 
195 static int rk8xx_reg_count(struct udevice *dev)
196 {
197 	struct rk8xx_priv *priv = dev_get_priv(dev);
198 
199 	switch (priv->variant) {
200 	case RK809_ID:
201 	case RK817_ID:
202 		return RK817_NUM_OF_REGS;
203 	default:
204 		return RK808_NUM_OF_REGS;
205 	}
206 }
207 
208 static int rk8xx_write(struct udevice *dev, uint reg, const uint8_t *buff,
209 			  int len)
210 {
211 	int ret;
212 
213 	ret = dm_i2c_write(dev, reg, buff, len);
214 	if (ret) {
215 		printf("%s: write reg 0x%02x failed, ret=%d\n", __func__, reg, ret);
216 		return ret;
217 	}
218 
219 	return 0;
220 }
221 
222 static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
223 {
224 	int ret;
225 
226 	ret = dm_i2c_read(dev, reg, buff, len);
227 	if (ret) {
228 		printf("%s: read reg 0x%02x failed, ret=%d\n", __func__, reg, ret);
229 		return ret;
230 	}
231 
232 	return 0;
233 }
234 
235 static int rk8xx_suspend(struct udevice *dev)
236 {
237 	struct rk8xx_priv *priv = dev_get_priv(dev);
238 	int ret = 0;
239 	u8 val;
240 
241 	switch (priv->variant) {
242 	case RK809_ID:
243 	case RK817_ID:
244 		/* pmic_sleep active high */
245 		ret = rk8xx_read(dev, RK817_PMIC_SYS_CFG3, &val, 1);
246 		if (ret)
247 			return ret;
248 		priv->sleep_pin = val;
249 		val &= ~0x38;
250 		val |= 0x28;
251 		ret = rk8xx_write(dev, RK817_PMIC_SYS_CFG3, &val, 1);
252 		break;
253 	default:
254 		return 0;
255 	}
256 
257 	return ret;
258 }
259 
260 static int rk8xx_resume(struct udevice *dev)
261 {
262 	struct rk8xx_priv *priv = dev_get_priv(dev);
263 	int ret = 0;
264 
265 	switch (priv->variant) {
266 	case RK809_ID:
267 	case RK817_ID:
268 		ret = rk8xx_write(dev, RK817_PMIC_SYS_CFG3, &priv->sleep_pin, 1);
269 		break;
270 	default:
271 		return 0;
272 	}
273 
274 	return ret;
275 }
276 
277 static int rk8xx_shutdown(struct udevice *dev)
278 {
279 	struct rk8xx_priv *priv = dev_get_priv(dev);
280 	u8 val, dev_off, devctrl_reg;
281 	int ret = 0;
282 
283 	switch (priv->variant) {
284 	case RK808_ID:
285 		devctrl_reg = REG_DEVCTRL;
286 		dev_off = BIT(3);
287 		break;
288 	case RK805_ID:
289 	case RK816_ID:
290 	case RK818_ID:
291 		devctrl_reg = REG_DEVCTRL;
292 		dev_off = BIT(0);
293 		break;
294 	case RK809_ID:
295 	case RK817_ID:
296 		devctrl_reg = RK817_REG_SYS_CFG3;
297 		dev_off = BIT(0);
298 		break;
299 	default:
300 		printf("Unknown PMIC: RK%x\n", priv->variant);
301 		return -EINVAL;
302 	}
303 
304 	ret = rk8xx_read(dev, devctrl_reg, &val, 1);
305 	if (ret)
306 		return ret;
307 
308 	val |= dev_off;
309 	ret = rk8xx_write(dev, devctrl_reg, &val, 1);
310 	if (ret)
311 		return ret;
312 
313 	return 0;
314 }
315 
316 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
317 static int rk8xx_bind(struct udevice *dev)
318 {
319 	ofnode regulators_node;
320 	int children;
321 
322 	regulators_node = dev_read_subnode(dev, "regulators");
323 	if (!ofnode_valid(regulators_node)) {
324 		debug("%s: %s regulators subnode not found!\n", __func__,
325 		      dev->name);
326 		return -ENXIO;
327 	}
328 
329 	debug("%s: '%s' - found regulators subnode\n", __func__, dev->name);
330 
331 	children = pmic_bind_children(dev, regulators_node, pmic_children_info);
332 	if (!children)
333 		debug("%s: %s - no child found\n", __func__, dev->name);
334 
335 	children = pmic_bind_children(dev, dev->node, power_key_info);
336 	if (!children)
337 		debug("%s: %s - no child found\n", __func__, dev->name);
338 
339 	children = pmic_bind_children(dev, dev->node, rtc_info);
340 	if (!children)
341 		debug("%s: %s - no child found\n", __func__, dev->name);
342 
343 	children = pmic_bind_children(dev, dev->node, fuel_gauge_info);
344 	if (!children)
345 		debug("%s: %s - no child found\n", __func__, dev->name);
346 
347 	children = pmic_bind_children(dev, dev->node, rk817_codec_info);
348 	if (!children)
349 		debug("%s: %s - no child found\n", __func__, dev->name);
350 
351 	/* Always return success for this device */
352 	return 0;
353 }
354 #endif
355 
356 #if CONFIG_IS_ENABLED(IRQ)
357 /*
358  * When system suspend during U-Boot charge, make sure the plugout event
359  * be able to wakeup cpu in wfi/wfe state.
360  */
361 #ifdef CONFIG_DM_CHARGE_DISPLAY
362 static void rk8xx_plug_out_handler(int irq, void *data)
363 {
364 	printf("Plug out interrupt\n");
365 }
366 #endif
367 
368 static int rk8xx_ofdata_to_platdata(struct udevice *dev)
369 {
370 	struct rk8xx_priv *rk8xx = dev_get_priv(dev);
371 	u32 interrupt, phandle, val;
372 	int ret;
373 
374 	phandle = dev_read_u32_default(dev, "interrupt-parent", -ENODATA);
375 	if (phandle == -ENODATA) {
376 		printf("Read 'interrupt-parent' failed, ret=%d\n", phandle);
377 		return phandle;
378 	}
379 
380 	ret = dev_read_u32_array(dev, "interrupts", &interrupt, 1);
381 	if (ret) {
382 		printf("Read 'interrupts' failed, ret=%d\n", ret);
383 		return ret;
384 	}
385 
386 	rk8xx->irq = phandle_gpio_to_irq(phandle, interrupt);
387 	if (rk8xx->irq < 0) {
388 		printf("Failed to request rk8xx irq, ret=%d\n", rk8xx->irq);
389 		return rk8xx->irq;
390 	}
391 
392 	val = dev_read_u32_default(dev, "long-press-off-time-sec", 0);
393 	if (val <= 6)
394 		rk8xx->lp_off_time = RK8XX_LP_TIME_6S;
395 	else if (val <= 8)
396 		rk8xx->lp_off_time = RK8XX_LP_TIME_8S;
397 	else if (val <= 10)
398 		rk8xx->lp_off_time = RK8XX_LP_TIME_10S;
399 	else
400 		rk8xx->lp_off_time = RK8XX_LP_TIME_12S;
401 
402 	val = dev_read_u32_default(dev, "long-press-restart", 0);
403 	if (val)
404 		rk8xx->lp_action = RK8XX_LP_RESTART;
405 	else
406 		rk8xx->lp_action = RK8XX_LP_OFF;
407 
408 	val = dev_read_u32_default(dev, "not-save-power-en", 0);
409 	rk8xx->not_save_power_en = val;
410 
411 	return 0;
412 }
413 
414 static int rk8xx_irq_chip_init(struct udevice *dev)
415 {
416 	struct rk8xx_priv *priv = dev_get_priv(dev);
417 	struct virq_chip *irq_chip = NULL;
418 	__maybe_unused int irq_plugout = 1;
419 	int ret;
420 
421 	switch (priv->variant) {
422 	case RK808_ID:
423 		irq_chip = &rk808_irq_chip;
424 		break;
425 	case RK805_ID:
426 		irq_chip = &rk805_irq_chip;
427 		irq_plugout = 0;
428 		break;
429 	case RK816_ID:
430 		irq_chip = &rk816_irq_chip;
431 		break;
432 	case RK818_ID:
433 		irq_chip = &rk818_irq_chip;
434 		break;
435 	case RK809_ID:
436 	case RK817_ID:
437 		irq_chip = &rk817_irq_chip;
438 		break;
439 	default:
440 		return -EINVAL;
441 	}
442 
443 	if (irq_chip) {
444 		ret = virq_add_chip(dev, irq_chip, priv->irq);
445 		if (ret) {
446 			printf("Failed to add irqchip(irq=%d), ret=%d\n",
447 			       priv->irq, ret);
448 			return ret;
449 		}
450 
451 		priv->irq_chip = irq_chip;
452 
453 #ifdef CONFIG_DM_CHARGE_DISPLAY
454 		int irq;
455 
456 		if (irq_plugout) {
457 			irq = virq_to_irq(irq_chip, RK8XX_IRQ_PLUG_OUT);
458 			if (irq < 0) {
459 				printf("Failed to register plugout irq, ret=%d\n", irq);
460 				return irq;
461 			}
462 			irq_install_handler(irq, rk8xx_plug_out_handler, dev);
463 			irq_handler_enable_suspend_only(irq);
464 		}
465 #endif
466 	}
467 
468 	return 0;
469 }
470 #else
471 static inline int rk8xx_ofdata_to_platdata(struct udevice *dev) { return 0; }
472 static inline int rk8xx_irq_chip_init(struct udevice *dev) { return 0; }
473 #endif
474 
475 static int rk8xx_probe(struct udevice *dev)
476 {
477 	struct rk8xx_priv *priv = dev_get_priv(dev);
478 	struct reg_data *init_current = NULL;
479 	struct reg_data *init_data = NULL;
480 	int init_current_num = 0;
481 	int init_data_num = 0;
482 	int ret = 0, i, show_variant;
483 	uint8_t msb, lsb, id_msb, id_lsb;
484 	uint8_t on_source = 0, off_source = 0;
485 	uint8_t pwron_key = 0, lp_off_msk = 0, lp_act_msk = 0;
486 	uint8_t power_en0, power_en1, power_en2, power_en3;
487 	uint8_t on, off;
488 	uint8_t value;
489 
490 	/* read Chip variant */
491 	if (device_is_compatible(dev, "rockchip,rk817") ||
492 	    device_is_compatible(dev, "rockchip,rk809")) {
493 		id_msb = RK817_ID_MSB;
494 		id_lsb = RK817_ID_LSB;
495 	} else {
496 		id_msb = ID_MSB;
497 		id_lsb = ID_LSB;
498 	}
499 
500 	ret = rk8xx_read(dev, id_msb, &msb, 1);
501 	if (ret)
502 		return ret;
503 	ret = rk8xx_read(dev, id_lsb, &lsb, 1);
504 	if (ret)
505 		return ret;
506 
507 	priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
508 	show_variant = priv->variant;
509 	switch (priv->variant) {
510 	case RK808_ID:
511 		show_variant = 0x808;	/* RK808 hardware ID is 0 */
512 		pwron_key = RK8XX_DEVCTRL_REG;
513 		lp_off_msk = RK8XX_LP_OFF_MSK;
514 		break;
515 	case RK805_ID:
516 	case RK816_ID:
517 		on_source = RK8XX_ON_SOURCE;
518 		off_source = RK8XX_OFF_SOURCE;
519 		pwron_key = RK8XX_DEVCTRL_REG;
520 		lp_off_msk = RK8XX_LP_OFF_MSK;
521 		lp_act_msk = RK8XX_LP_ACTION_MSK;
522 		break;
523 	case RK818_ID:
524 		on_source = RK8XX_ON_SOURCE;
525 		off_source = RK8XX_OFF_SOURCE;
526 		pwron_key = RK8XX_DEVCTRL_REG;
527 		lp_off_msk = RK8XX_LP_OFF_MSK;
528 		lp_act_msk = RK8XX_LP_ACTION_MSK;
529 		/* set current if no fuel gauge */
530 		if (!ofnode_valid(dev_read_subnode(dev, "battery"))) {
531 			init_current = rk818_init_current;
532 			init_current_num = ARRAY_SIZE(rk818_init_current);
533 		}
534 		break;
535 	case RK809_ID:
536 	case RK817_ID:
537 		on_source = RK817_ON_SOURCE;
538 		off_source = RK817_OFF_SOURCE;
539 		pwron_key = RK817_PWRON_KEY;
540 		lp_off_msk = RK8XX_LP_OFF_MSK;
541 		lp_act_msk = RK8XX_LP_ACTION_MSK;
542 		init_data = rk817_init_reg;
543 		init_data_num = ARRAY_SIZE(rk817_init_reg);
544 		/* judge whether save the PMIC_POWER_EN register */
545 		if (priv->not_save_power_en)
546 			break;
547 
548 		ret = rk8xx_read(dev, RK817_POWER_EN0, &power_en0, 1);
549 		if (ret)
550 			return ret;
551 		ret = rk8xx_read(dev, RK817_POWER_EN1, &power_en1, 1);
552 		if (ret)
553 			return ret;
554 		ret = rk8xx_read(dev, RK817_POWER_EN2, &power_en2, 1);
555 		if (ret)
556 			return ret;
557 		ret = rk8xx_read(dev, RK817_POWER_EN3, &power_en3, 1);
558 		if (ret)
559 			return ret;
560 
561 		value = (power_en0 & 0x0f) | ((power_en1 & 0x0f) << 4);
562 		rk8xx_write(dev, RK817_POWER_EN_SAVE0, &value, 1);
563 		value = (power_en2 & 0x0f) | ((power_en3 & 0x0f) << 4);
564 		rk8xx_write(dev, RK817_POWER_EN_SAVE1, &value, 1);
565 		break;
566 	default:
567 		printf("Unknown PMIC: RK%x!!\n", priv->variant);
568 		return -EINVAL;
569 	}
570 
571 	/* common init */
572 	for (i = 0; i < init_data_num; i++) {
573 		ret = pmic_clrsetbits(dev,
574 				      init_data[i].reg,
575 				      init_data[i].mask,
576 				      init_data[i].val);
577 		if (ret < 0) {
578 			printf("%s: i2c set reg 0x%x failed, ret=%d\n",
579 			       __func__, init_data[i].reg, ret);
580 		}
581 	}
582 
583 	/* current init */
584 	for (i = 0; i < init_current_num; i++) {
585 		ret = pmic_clrsetbits(dev,
586 				      init_current[i].reg,
587 				      init_current[i].mask,
588 				      init_current[i].val);
589 		if (ret < 0) {
590 			printf("%s: i2c set reg 0x%x failed, ret=%d\n",
591 			       __func__, init_current[i].reg, ret);
592 		}
593 	}
594 
595 	printf("PMIC:  RK%x ", show_variant);
596 
597 	if (on_source && off_source) {
598 		rk8xx_read(dev, on_source, &on, 1);
599 		rk8xx_read(dev, off_source, &off, 1);
600 		printf("(on=0x%02x, off=0x%02x)", on, off);
601 	}
602 	printf("\n");
603 
604 	if (pwron_key) {
605 		ret = rk8xx_read(dev, pwron_key, &value, 1);
606 		if (ret)
607 			return ret;
608 		value &= ~(lp_off_msk | lp_act_msk);
609 		if (lp_off_msk)
610 			value |= priv->lp_off_time;
611 		if (lp_act_msk)
612 			value |= priv->lp_action;
613 		rk8xx_write(dev, pwron_key, &value, 1);
614 	}
615 
616 	ret = rk8xx_irq_chip_init(dev);
617 	if (ret) {
618 		printf("IRQ chip initial failed\n");
619 		return ret;
620 	}
621 
622 	return 0;
623 }
624 
625 static struct dm_pmic_ops rk8xx_ops = {
626 	.reg_count = rk8xx_reg_count,
627 	.read = rk8xx_read,
628 	.write = rk8xx_write,
629 	.suspend = rk8xx_suspend,
630 	.resume = rk8xx_resume,
631 	.shutdown = rk8xx_shutdown,
632 };
633 
634 static const struct udevice_id rk8xx_ids[] = {
635 	{ .compatible = "rockchip,rk805" },
636 	{ .compatible = "rockchip,rk808" },
637 	{ .compatible = "rockchip,rk809" },
638 	{ .compatible = "rockchip,rk816" },
639 	{ .compatible = "rockchip,rk817" },
640 	{ .compatible = "rockchip,rk818" },
641 	{ }
642 };
643 
644 U_BOOT_DRIVER(pmic_rk8xx) = {
645 	.name = "rk8xx pmic",
646 	.id = UCLASS_PMIC,
647 	.of_match = rk8xx_ids,
648 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
649 	.bind = rk8xx_bind,
650 #endif
651 	.ofdata_to_platdata = rk8xx_ofdata_to_platdata,
652 	.priv_auto_alloc_size = sizeof(struct rk8xx_priv),
653 	.probe = rk8xx_probe,
654 	.ops = &rk8xx_ops,
655 };
656