1 /* 2 * Copyright (C) 2015 Google, Inc 3 * Written by Simon Glass <sjg@chromium.org> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <dm.h> 10 #include <errno.h> 11 #include <irq-generic.h> 12 #include <power/rk8xx_pmic.h> 13 #include <power/pmic.h> 14 15 DECLARE_GLOBAL_DATA_PTR; 16 17 #if CONFIG_IS_ENABLED(IRQ) 18 /* RK805 */ 19 static const struct virq_reg rk805_irqs[] = { 20 [RK8XX_IRQ_PWRON_FALL] = { 21 .mask = RK805_IRQ_PWRON_FALL_MSK, 22 .reg_offset = 0, 23 }, 24 [RK8XX_IRQ_PWRON_RISE] = { 25 .mask = RK805_IRQ_PWRON_RISE_MSK, 26 .reg_offset = 0, 27 }, 28 }; 29 30 static struct virq_chip rk805_irq_chip = { 31 .status_base = RK805_INT_STS_REG, 32 .mask_base = RK805_INT_MSK_REG, 33 .num_regs = 1, 34 .read = pmic_reg_read, 35 .write = pmic_reg_write, 36 .irqs = rk805_irqs, 37 .num_irqs = ARRAY_SIZE(rk805_irqs), 38 }; 39 40 /* RK806 */ 41 static const struct virq_reg rk806_irqs[] = { 42 [RK8XX_IRQ_PWRON_FALL] = { 43 .mask = RK806_IRQ_PWRON_FALL_MSK, 44 .reg_offset = 0, 45 }, 46 [RK8XX_IRQ_PWRON_RISE] = { 47 .mask = RK806_IRQ_PWRON_RISE_MSK, 48 .reg_offset = 0, 49 }, 50 }; 51 52 static struct virq_chip rk806_irq_chip = { 53 .status_base = RK806_INT_STS0, 54 .mask_base = RK806_INT_MSK0, 55 .num_regs = 1, 56 .read = pmic_reg_read, 57 .write = pmic_reg_write, 58 .irqs = rk806_irqs, 59 .num_irqs = ARRAY_SIZE(rk806_irqs), 60 }; 61 62 /* RK808 */ 63 static const struct virq_reg rk808_irqs[] = { 64 [RK8XX_IRQ_PLUG_OUT] = { 65 .mask = RK808_IRQ_PLUG_OUT_MSK, 66 .reg_offset = 1, 67 }, 68 }; 69 70 static struct virq_chip rk808_irq_chip = { 71 .status_base = RK808_INT_STS_REG1, 72 .mask_base = RK808_INT_MSK_REG1, 73 .irq_reg_stride = 2, 74 .num_regs = 2, 75 .read = pmic_reg_read, 76 .write = pmic_reg_write, 77 .irqs = rk808_irqs, 78 .num_irqs = ARRAY_SIZE(rk808_irqs), 79 }; 80 81 /* RK816 */ 82 static const struct virq_reg rk816_irqs[] = { 83 [RK8XX_IRQ_PWRON_FALL] = { 84 .mask = RK816_IRQ_PWRON_FALL_MSK, 85 .reg_offset = 0, 86 }, 87 [RK8XX_IRQ_PWRON_RISE] = { 88 .mask = RK816_IRQ_PWRON_RISE_MSK, 89 .reg_offset = 0, 90 }, 91 [RK8XX_IRQ_PLUG_OUT] = { 92 .mask = RK816_IRQ_PLUG_OUT_MSK, 93 .reg_offset = 2, 94 }, 95 [RK8XX_IRQ_CHG_OK] = { 96 .mask = RK816_IRQ_CHR_OK_MSK, 97 .reg_offset = 2, 98 }, 99 }; 100 101 static struct virq_chip rk816_irq_chip = { 102 .status_base = RK816_INT_STS_REG1, 103 .mask_base = RK816_INT_MSK_REG1, 104 .irq_unalign_reg_idx = 1, /* idx <= 1, stride = 3 */ 105 .irq_unalign_reg_stride = 3, 106 .irq_reg_stride = 2, /* idx > 1, stride = 2 */ 107 .num_regs = 3, 108 .read = pmic_reg_read, 109 .write = pmic_reg_write, 110 .irqs = rk816_irqs, 111 .num_irqs = ARRAY_SIZE(rk816_irqs), 112 }; 113 114 /* RK818 */ 115 static const struct virq_reg rk818_irqs[] = { 116 [RK8XX_IRQ_PLUG_OUT] = { 117 .mask = RK818_IRQ_PLUG_OUT_MSK, 118 .reg_offset = 1, 119 }, 120 [RK8XX_IRQ_CHG_OK] = { 121 .mask = RK818_IRQ_CHR_OK_MSK, 122 .reg_offset = 1, 123 }, 124 }; 125 126 static struct virq_chip rk818_irq_chip = { 127 .status_base = RK818_INT_STS_REG1, 128 .mask_base = RK818_INT_MSK_REG1, 129 .irq_reg_stride = 2, 130 .num_regs = 2, 131 .read = pmic_reg_read, 132 .write = pmic_reg_write, 133 .irqs = rk818_irqs, 134 .num_irqs = ARRAY_SIZE(rk818_irqs), 135 }; 136 137 /* RK817/RK809 */ 138 static const struct virq_reg rk817_irqs[] = { 139 [RK8XX_IRQ_PWRON_FALL] = { 140 .mask = RK817_IRQ_PWRON_FALL_MSK, 141 .reg_offset = 0, 142 }, 143 [RK8XX_IRQ_PWRON_RISE] = { 144 .mask = RK817_IRQ_PWRON_RISE_MSK, 145 .reg_offset = 0, 146 }, 147 [RK8XX_IRQ_PLUG_OUT] = { 148 .mask = RK817_IRQ_PLUG_OUT_MSK, 149 .reg_offset = 1, 150 }, 151 [RK8XX_IRQ_PLUG_IN] = { 152 .mask = RK817_IRQ_PLUG_IN_MSK, 153 .reg_offset = 1, 154 }, 155 }; 156 157 static struct virq_chip rk817_irq_chip = { 158 .status_base = RK817_INT_STS_REG0, 159 .mask_base = RK817_INT_MSK_REG0, 160 .irq_reg_stride = 2, 161 .num_regs = 3, 162 .read = pmic_reg_read, 163 .write = pmic_reg_write, 164 .irqs = rk817_irqs, 165 .num_irqs = ARRAY_SIZE(rk817_irqs), 166 }; 167 #endif 168 169 static struct reg_data rk817_init_reg[] = { 170 /* enable the under-voltage protection, 171 * the under-voltage protection will shutdown the LDO3 and reset the PMIC 172 */ 173 { RK817_BUCK4_CMIN, 0x6b, 0x6e}, 174 { RK817_PMIC_SYS_CFG1, 0x20, 0x70}, 175 /* Set pmic_sleep as none function */ 176 { RK817_PMIC_SYS_CFG3, 0x00, 0x18 }, 177 /* GATE pin function: gate function */ 178 { RK817_GPIO_INT_CFG, 0x00, 0x20 }, 179 #ifdef CONFIG_DM_CHARGE_DISPLAY 180 /* Set pmic_int active low */ 181 { RK817_GPIO_INT_CFG, 0x00, 0x02 }, 182 #endif 183 }; 184 185 static struct reg_data rk818_init_current[] = { 186 { REG_USB_CTRL, 0x07, 0x0f}, /* 2A */ 187 }; 188 189 /* 190 * Order WARNING: Must put "LDO" after the "NLDO" and "PLDO" ! 191 * 192 * See: pmic_bind_children() 193 * if (!strstr(node_name, info->prefix)) { 194 * ...... 195 * } 196 * 197 * Without this order, the prefix "LDO" will be matched if a regulator 198 * dts node name contains "NLDO" or "PLDO". 199 */ 200 static const struct pmic_child_info pmic_children_info[] = { 201 { .prefix = "DCDC", .driver = "rk8xx_buck"}, 202 { .prefix = "NLDO", .driver = "rk8xx_ldo"}, 203 { .prefix = "PLDO", .driver = "rk8xx_pldo"}, 204 { .prefix = "LDO", .driver = "rk8xx_ldo"}, 205 { .prefix = "SWITCH", .driver = "rk8xx_switch"}, 206 { }, 207 }; 208 209 static const struct pmic_child_info power_key_info[] = { 210 { .prefix = "pwrkey", .driver = "rk8xx_pwrkey"}, 211 { }, 212 }; 213 214 static const struct pmic_child_info rtc_info[] = { 215 { .prefix = "rtc", .driver = "rk8xx_rtc"}, 216 { }, 217 }; 218 219 static const struct pmic_child_info fuel_gauge_info[] = { 220 { .addr = "1c", .prefix = "battery", .driver = "rk818_fg"}, 221 { .addr = "20", .prefix = "battery", .driver = "rk817_fg"}, 222 { .addr = "1a", .prefix = "battery", .driver = "rk816_fg"}, 223 { }, 224 }; 225 226 static const struct pmic_child_info rk817_codec_info[] = { 227 { .prefix = "codec", .driver = "rk817_codec"}, 228 { }, 229 }; 230 231 static int rk8xx_reg_count(struct udevice *dev) 232 { 233 struct rk8xx_priv *priv = dev_get_priv(dev); 234 235 switch (priv->variant) { 236 case RK809_ID: 237 case RK817_ID: 238 return RK817_NUM_OF_REGS; 239 default: 240 return RK808_NUM_OF_REGS; 241 } 242 } 243 244 static int rk8xx_write(struct udevice *dev, uint reg, const uint8_t *buff, 245 int len) 246 { 247 int ret; 248 249 ret = dm_i2c_write(dev, reg, buff, len); 250 if (ret) { 251 printf("%s: write reg 0x%02x failed, ret=%d\n", __func__, reg, ret); 252 return ret; 253 } 254 255 return 0; 256 } 257 258 static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len) 259 { 260 int ret; 261 262 ret = dm_i2c_read(dev, reg, buff, len); 263 if (ret) { 264 printf("%s: read reg 0x%02x failed, ret=%d\n", __func__, reg, ret); 265 return ret; 266 } 267 268 return 0; 269 } 270 271 static int rk8xx_suspend(struct udevice *dev) 272 { 273 struct rk8xx_priv *priv = dev_get_priv(dev); 274 int ret = 0; 275 u8 i, val; 276 277 switch (priv->variant) { 278 case RK806_ID: 279 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 280 if (ret) 281 return ret; 282 val &= RK806_PWRCTRL_FUN_MSK; 283 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 284 if (ret) 285 return ret; 286 287 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 288 if (ret) 289 return ret; 290 291 val &= RK806_PWRCTRL_FUN_MSK; 292 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 293 if (ret) 294 return ret; 295 296 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) { 297 ret = rk8xx_read(dev, i, &val, 1); 298 if (ret) 299 return ret; 300 val &= RK806_VSEL_CTRL_MSK; 301 ret = rk8xx_write(dev, i, &val, 1); 302 if (ret) 303 return ret; 304 } 305 306 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 307 if (ret) 308 return ret; 309 val &= RK806_PWRCTRL_FUN_MSK; 310 val |= RK806_ENABLE_PWRCTRL; 311 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 312 if (ret) 313 return ret; 314 315 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) { 316 ret = rk8xx_read(dev, i, &val, 1); 317 if (ret) 318 return ret; 319 val &= RK806_VSEL_CTRL_MSK; 320 val |= RK806_VSEL_PWRCTRL1; 321 ret = rk8xx_write(dev, i, &val, 1); 322 if (ret) 323 return ret; 324 } 325 break; 326 case RK809_ID: 327 case RK817_ID: 328 /* pmic_sleep active high */ 329 ret = rk8xx_read(dev, RK817_PMIC_SYS_CFG3, &val, 1); 330 if (ret) 331 return ret; 332 priv->sleep_pin = val; 333 val &= ~0x38; 334 val |= 0x28; 335 ret = rk8xx_write(dev, RK817_PMIC_SYS_CFG3, &val, 1); 336 break; 337 default: 338 return 0; 339 } 340 341 return ret; 342 } 343 344 static int rk8xx_resume(struct udevice *dev) 345 { 346 struct rk8xx_priv *priv = dev_get_priv(dev); 347 int ret = 0; 348 u8 i, val; 349 350 switch (priv->variant) { 351 case RK806_ID: 352 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) { 353 ret = rk8xx_read(dev, i, &val, 1); 354 if (ret) 355 return ret; 356 val &= RK806_VSEL_CTRL_MSK; 357 ret = rk8xx_write(dev, i, &val, 1); 358 if (ret) 359 return ret; 360 } 361 362 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 363 if (ret) 364 return ret; 365 val &= RK806_PWRCTRL_FUN_MSK; 366 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 367 if (ret) 368 return ret; 369 370 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 371 if (ret) 372 return ret; 373 val &= RK806_PWRCTRL_FUN_MSK; 374 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 375 break; 376 case RK809_ID: 377 case RK817_ID: 378 ret = rk8xx_write(dev, RK817_PMIC_SYS_CFG3, &priv->sleep_pin, 1); 379 break; 380 default: 381 return 0; 382 } 383 384 return ret; 385 } 386 387 static int rk8xx_shutdown(struct udevice *dev) 388 { 389 struct rk8xx_priv *priv = dev_get_priv(dev); 390 u8 val, dev_off, devctrl_reg; 391 int ret = 0; 392 393 switch (priv->variant) { 394 case RK806_ID: 395 devctrl_reg = RK806_SYS_CFG3; 396 dev_off = RK806_DEV_OFF; 397 break; 398 case RK808_ID: 399 devctrl_reg = REG_DEVCTRL; 400 dev_off = BIT(3); 401 break; 402 case RK805_ID: 403 case RK816_ID: 404 case RK818_ID: 405 devctrl_reg = REG_DEVCTRL; 406 dev_off = BIT(0); 407 break; 408 case RK809_ID: 409 case RK817_ID: 410 devctrl_reg = RK817_REG_SYS_CFG3; 411 dev_off = BIT(0); 412 break; 413 default: 414 printf("Unknown PMIC: RK%x\n", priv->variant); 415 return -EINVAL; 416 } 417 418 ret = rk8xx_read(dev, devctrl_reg, &val, 1); 419 if (ret) 420 return ret; 421 422 val |= dev_off; 423 ret = rk8xx_write(dev, devctrl_reg, &val, 1); 424 if (ret) 425 return ret; 426 427 return 0; 428 } 429 430 #if CONFIG_IS_ENABLED(PMIC_CHILDREN) 431 static int rk8xx_bind(struct udevice *dev) 432 { 433 ofnode regulators_node; 434 int children; 435 436 regulators_node = dev_read_subnode(dev, "regulators"); 437 if (!ofnode_valid(regulators_node)) { 438 debug("%s: %s regulators subnode not found!\n", __func__, 439 dev->name); 440 return -ENXIO; 441 } 442 443 debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); 444 445 children = pmic_bind_children(dev, regulators_node, pmic_children_info); 446 if (!children) 447 debug("%s: %s - no child found\n", __func__, dev->name); 448 449 children = pmic_bind_children(dev, dev->node, power_key_info); 450 if (!children) 451 debug("%s: %s - no child found\n", __func__, dev->name); 452 453 children = pmic_bind_children(dev, dev->node, rtc_info); 454 if (!children) 455 debug("%s: %s - no child found\n", __func__, dev->name); 456 457 children = pmic_bind_children(dev, dev->node, fuel_gauge_info); 458 if (!children) 459 debug("%s: %s - no child found\n", __func__, dev->name); 460 461 children = pmic_bind_children(dev, dev->node, rk817_codec_info); 462 if (!children) 463 debug("%s: %s - no child found\n", __func__, dev->name); 464 465 /* Always return success for this device */ 466 return 0; 467 } 468 #endif 469 470 #if CONFIG_IS_ENABLED(IRQ) 471 /* 472 * When system suspend during U-Boot charge, make sure the plugout event 473 * be able to wakeup cpu in wfi/wfe state. 474 */ 475 #ifdef CONFIG_DM_CHARGE_DISPLAY 476 static void rk8xx_plug_out_handler(int irq, void *data) 477 { 478 printf("Plug out interrupt\n"); 479 } 480 #endif 481 482 static int rk8xx_irq_chip_init(struct udevice *dev) 483 { 484 struct rk8xx_priv *priv = dev_get_priv(dev); 485 struct virq_chip *irq_chip = NULL; 486 __maybe_unused int irq_plugout = 1; 487 int ret; 488 489 switch (priv->variant) { 490 case RK806_ID: 491 irq_chip = &rk806_irq_chip; 492 irq_plugout = 0; 493 break; 494 case RK808_ID: 495 irq_chip = &rk808_irq_chip; 496 break; 497 case RK805_ID: 498 irq_chip = &rk805_irq_chip; 499 irq_plugout = 0; 500 break; 501 case RK816_ID: 502 irq_chip = &rk816_irq_chip; 503 break; 504 case RK818_ID: 505 irq_chip = &rk818_irq_chip; 506 break; 507 case RK809_ID: 508 case RK817_ID: 509 irq_chip = &rk817_irq_chip; 510 break; 511 default: 512 return -EINVAL; 513 } 514 515 if (irq_chip) { 516 ret = virq_add_chip(dev, irq_chip, priv->irq); 517 if (ret) { 518 printf("Failed to add irqchip(irq=%d), ret=%d\n", 519 priv->irq, ret); 520 return ret; 521 } 522 523 priv->irq_chip = irq_chip; 524 525 #ifdef CONFIG_DM_CHARGE_DISPLAY 526 int irq; 527 528 if (irq_plugout) { 529 irq = virq_to_irq(irq_chip, RK8XX_IRQ_PLUG_OUT); 530 if (irq < 0) { 531 printf("Failed to register plugout irq, ret=%d\n", irq); 532 return irq; 533 } 534 irq_install_handler(irq, rk8xx_plug_out_handler, dev); 535 irq_handler_enable_suspend_only(irq); 536 } 537 #endif 538 } 539 540 return 0; 541 } 542 #else 543 static inline int rk8xx_irq_chip_init(struct udevice *dev) { return 0; } 544 #endif 545 546 static int rk8xx_ofdata_to_platdata(struct udevice *dev) 547 { 548 struct rk8xx_priv *rk8xx = dev_get_priv(dev); 549 u32 interrupt, phandle, val; 550 int ret; 551 552 phandle = dev_read_u32_default(dev, "interrupt-parent", -ENODATA); 553 if (phandle == -ENODATA) { 554 printf("Read 'interrupt-parent' failed, ret=%d\n", phandle); 555 return phandle; 556 } 557 558 ret = dev_read_u32_array(dev, "interrupts", &interrupt, 1); 559 if (ret) { 560 printf("Read 'interrupts' failed, ret=%d\n", ret); 561 return ret; 562 } 563 564 #if CONFIG_IS_ENABLED(IRQ) 565 rk8xx->irq = phandle_gpio_to_irq(phandle, interrupt); 566 if (rk8xx->irq < 0) { 567 printf("Failed to request rk8xx irq, ret=%d\n", rk8xx->irq); 568 return rk8xx->irq; 569 } 570 #endif 571 val = dev_read_u32_default(dev, "long-press-off-time-sec", 0); 572 if (val <= 6) 573 rk8xx->lp_off_time = RK8XX_LP_TIME_6S; 574 else if (val <= 8) 575 rk8xx->lp_off_time = RK8XX_LP_TIME_8S; 576 else if (val <= 10) 577 rk8xx->lp_off_time = RK8XX_LP_TIME_10S; 578 else 579 rk8xx->lp_off_time = RK8XX_LP_TIME_12S; 580 581 val = dev_read_u32_default(dev, "long-press-restart", 0); 582 if (val) 583 rk8xx->lp_action = RK8XX_LP_RESTART; 584 else 585 rk8xx->lp_action = RK8XX_LP_OFF; 586 587 rk8xx->not_save_power_en = dev_read_u32_default(dev, "not-save-power-en", 0); 588 rk8xx->sys_can_sd = dev_read_bool(dev, "vsys-off-shutdown"); 589 rk8xx->rst_fun = dev_read_u32_default(dev, "pmic-reset-func", 0); 590 /* buck5 external feedback resister disable */ 591 rk8xx->buck5_feedback_dis = dev_read_bool(dev, "buck5-feedback-disable"); 592 593 return 0; 594 } 595 596 static int rk8xx_probe(struct udevice *dev) 597 { 598 struct rk8xx_priv *priv = dev_get_priv(dev); 599 struct reg_data *init_current = NULL; 600 struct reg_data *init_data = NULL; 601 int init_current_num = 0; 602 int init_data_num = 0; 603 int ret = 0, i, show_variant; 604 uint8_t msb, lsb, id_msb, id_lsb; 605 uint8_t on_source = 0, off_source = 0; 606 uint8_t pwron_key = 0, lp_off_msk = 0, lp_act_msk = 0; 607 uint8_t power_en0, power_en1, power_en2, power_en3; 608 uint8_t on, off; 609 uint8_t value; 610 611 /* read Chip variant */ 612 if (device_is_compatible(dev, "rockchip,rk817") || 613 device_is_compatible(dev, "rockchip,rk809")) { 614 id_msb = RK817_ID_MSB; 615 id_lsb = RK817_ID_LSB; 616 } else if (device_is_compatible(dev, "rockchip,rk806")) { 617 id_msb = RK806_CHIP_NAME; 618 id_lsb = RK806_CHIP_VER; 619 } else { 620 id_msb = ID_MSB; 621 id_lsb = ID_LSB; 622 } 623 624 ret = rk8xx_read(dev, id_msb, &msb, 1); 625 if (ret) 626 return ret; 627 ret = rk8xx_read(dev, id_lsb, &lsb, 1); 628 if (ret) 629 return ret; 630 631 priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK; 632 show_variant = priv->variant; 633 switch (priv->variant) { 634 case RK806_ID: 635 on_source = RK806_ON_SOURCE; 636 off_source = RK806_OFF_SOURCE; 637 ret = rk8xx_read(dev, RK806_HW_VER, &value, 1); 638 if (ret) 639 panic("RK806: read RK806_HW_VER error!\n"); 640 641 if ((lsb & RK806_VERSION_MSK) == RK806_VERSION_AB) { 642 ret = rk8xx_read(dev, RK806_SYS_CFG1, &value, 1); 643 if (ret) { 644 dev_err(dev, "rk806 RK806_SYS_CFG1 read error: %d\n", ret); 645 return ret; 646 } 647 value |= RK806_ABNORDET_EN; 648 rk8xx_write(dev, RK806_SYS_CFG1, &value, 1); 649 } 650 651 if (priv->rst_fun) { 652 rk8xx_read(dev, RK806_SYS_CFG3, &value, 1); 653 value &= RK806_RESET_FUN_CLR; 654 if (priv->rst_fun == RK806_RST_MODE1) { 655 value |= (RK806_RST_MODE1 << 6); 656 rk8xx_write(dev, RK806_SYS_CFG3, &value, 1); 657 } else if (priv->rst_fun == RK806_RST_MODE2) { 658 value |= (RK806_RST_MODE2 << 6); 659 rk8xx_write(dev, RK806_SYS_CFG3, &value, 1); 660 } 661 } 662 663 if (priv->buck5_feedback_dis) { 664 rk8xx_read(dev, RK806_BUCK_RSERVE_REG3, &value, 1); 665 value &=( ~RK806_BUCK5_EX_RES_EN); 666 rk8xx_write(dev, RK806_BUCK_RSERVE_REG3, &value, 1); 667 } 668 break; 669 case RK808_ID: 670 show_variant = 0x808; /* RK808 hardware ID is 0 */ 671 pwron_key = RK8XX_DEVCTRL_REG; 672 lp_off_msk = RK8XX_LP_OFF_MSK; 673 break; 674 case RK805_ID: 675 case RK816_ID: 676 on_source = RK8XX_ON_SOURCE; 677 off_source = RK8XX_OFF_SOURCE; 678 pwron_key = RK8XX_DEVCTRL_REG; 679 lp_off_msk = RK8XX_LP_OFF_MSK; 680 lp_act_msk = RK8XX_LP_ACTION_MSK; 681 break; 682 case RK818_ID: 683 on_source = RK8XX_ON_SOURCE; 684 off_source = RK8XX_OFF_SOURCE; 685 pwron_key = RK8XX_DEVCTRL_REG; 686 lp_off_msk = RK8XX_LP_OFF_MSK; 687 lp_act_msk = RK8XX_LP_ACTION_MSK; 688 /* set current if no fuel gauge */ 689 if (!ofnode_valid(dev_read_subnode(dev, "battery"))) { 690 init_current = rk818_init_current; 691 init_current_num = ARRAY_SIZE(rk818_init_current); 692 } 693 break; 694 case RK809_ID: 695 case RK817_ID: 696 if (device_is_compatible(dev, "rockchip,rk809") && (priv->variant != RK809_ID)) { 697 dev_err(dev, "the dts is RK809, the hardware is RK817\n"); 698 run_command("download", 0); 699 } 700 701 if (device_is_compatible(dev, "rockchip,rk817") && (priv->variant != RK817_ID)) { 702 dev_err(dev, "the dts is RK817, the hardware is RK809\n"); 703 run_command("download", 0); 704 } 705 706 on_source = RK817_ON_SOURCE; 707 off_source = RK817_OFF_SOURCE; 708 pwron_key = RK817_PWRON_KEY; 709 lp_off_msk = RK8XX_LP_OFF_MSK; 710 lp_act_msk = RK8XX_LP_ACTION_MSK; 711 init_data = rk817_init_reg; 712 init_data_num = ARRAY_SIZE(rk817_init_reg); 713 714 /* whether the system voltage can be shutdown in PWR_off mode */ 715 if (priv->sys_can_sd) { 716 ret = rk8xx_read(dev, RK817_PMIC_CHRG_TERM, &value, 1); 717 if (ret) 718 return ret; 719 value |= 0x80; 720 ret = rk8xx_write(dev, RK817_PMIC_CHRG_TERM, &value, 1); 721 if (ret) 722 return ret; 723 } else { 724 ret = rk8xx_read(dev, RK817_PMIC_CHRG_TERM, &value, 1); 725 if (ret) 726 return ret; 727 value &= 0x7f; 728 ret = rk8xx_write(dev, RK817_PMIC_CHRG_TERM, &value, 1); 729 if (ret) 730 return ret; 731 } 732 733 /* judge whether save the PMIC_POWER_EN register */ 734 if (!priv->not_save_power_en) { 735 ret = rk8xx_read(dev, RK817_POWER_EN0, &power_en0, 1); 736 if (ret) 737 return ret; 738 ret = rk8xx_read(dev, RK817_POWER_EN1, &power_en1, 1); 739 if (ret) 740 return ret; 741 ret = rk8xx_read(dev, RK817_POWER_EN2, &power_en2, 1); 742 if (ret) 743 return ret; 744 ret = rk8xx_read(dev, RK817_POWER_EN3, &power_en3, 1); 745 if (ret) 746 return ret; 747 748 value = (power_en0 & 0x0f) | ((power_en1 & 0x0f) << 4); 749 rk8xx_write(dev, RK817_POWER_EN_SAVE0, &value, 1); 750 value = (power_en2 & 0x0f) | ((power_en3 & 0x0f) << 4); 751 rk8xx_write(dev, RK817_POWER_EN_SAVE1, &value, 1); 752 } 753 break; 754 default: 755 printf("Unknown PMIC: RK%x!!\n", priv->variant); 756 return -EINVAL; 757 } 758 759 /* common init */ 760 for (i = 0; i < init_data_num; i++) { 761 ret = pmic_clrsetbits(dev, 762 init_data[i].reg, 763 init_data[i].mask, 764 init_data[i].val); 765 if (ret < 0) { 766 printf("%s: i2c set reg 0x%x failed, ret=%d\n", 767 __func__, init_data[i].reg, ret); 768 } 769 } 770 771 /* current init */ 772 for (i = 0; i < init_current_num; i++) { 773 ret = pmic_clrsetbits(dev, 774 init_current[i].reg, 775 init_current[i].mask, 776 init_current[i].val); 777 if (ret < 0) { 778 printf("%s: i2c set reg 0x%x failed, ret=%d\n", 779 __func__, init_current[i].reg, ret); 780 } 781 } 782 783 printf("PMIC: RK%x ", show_variant); 784 785 if (on_source && off_source) { 786 rk8xx_read(dev, on_source, &on, 1); 787 rk8xx_read(dev, off_source, &off, 1); 788 printf("(on=0x%02x, off=0x%02x)", on, off); 789 } 790 printf("\n"); 791 792 if (pwron_key) { 793 ret = rk8xx_read(dev, pwron_key, &value, 1); 794 if (ret) 795 return ret; 796 value &= ~(lp_off_msk | lp_act_msk); 797 if (lp_off_msk) 798 value |= priv->lp_off_time; 799 if (lp_act_msk) 800 value |= priv->lp_action; 801 rk8xx_write(dev, pwron_key, &value, 1); 802 } 803 804 ret = rk8xx_irq_chip_init(dev); 805 if (ret) { 806 printf("IRQ chip initial failed\n"); 807 return ret; 808 } 809 810 return 0; 811 } 812 813 static struct dm_pmic_ops rk8xx_ops = { 814 .reg_count = rk8xx_reg_count, 815 .read = rk8xx_read, 816 .write = rk8xx_write, 817 .suspend = rk8xx_suspend, 818 .resume = rk8xx_resume, 819 .shutdown = rk8xx_shutdown, 820 }; 821 822 static const struct udevice_id rk8xx_ids[] = { 823 { .compatible = "rockchip,rk805" }, 824 { .compatible = "rockchip,rk806" }, 825 { .compatible = "rockchip,rk808" }, 826 { .compatible = "rockchip,rk809" }, 827 { .compatible = "rockchip,rk816" }, 828 { .compatible = "rockchip,rk817" }, 829 { .compatible = "rockchip,rk818" }, 830 { } 831 }; 832 833 U_BOOT_DRIVER(pmic_rk8xx) = { 834 .name = "rk8xx pmic", 835 .id = UCLASS_PMIC, 836 .of_match = rk8xx_ids, 837 #if CONFIG_IS_ENABLED(PMIC_CHILDREN) 838 .bind = rk8xx_bind, 839 #endif 840 .ofdata_to_platdata = rk8xx_ofdata_to_platdata, 841 .priv_auto_alloc_size = sizeof(struct rk8xx_priv), 842 .probe = rk8xx_probe, 843 .ops = &rk8xx_ops, 844 }; 845