1 /* 2 * Copyright (C) 2015 Google, Inc 3 * Written by Simon Glass <sjg@chromium.org> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #include <common.h> 9 #include <dm.h> 10 #include <errno.h> 11 #include <irq-generic.h> 12 #include <power/rk8xx_pmic.h> 13 #include <power/pmic.h> 14 15 DECLARE_GLOBAL_DATA_PTR; 16 17 #if CONFIG_IS_ENABLED(IRQ) 18 /* RK805 */ 19 static const struct virq_reg rk805_irqs[] = { 20 [RK8XX_IRQ_PWRON_FALL] = { 21 .mask = RK805_IRQ_PWRON_FALL_MSK, 22 .reg_offset = 0, 23 }, 24 [RK8XX_IRQ_PWRON_RISE] = { 25 .mask = RK805_IRQ_PWRON_RISE_MSK, 26 .reg_offset = 0, 27 }, 28 }; 29 30 static struct virq_chip rk805_irq_chip = { 31 .status_base = RK805_INT_STS_REG, 32 .mask_base = RK805_INT_MSK_REG, 33 .num_regs = 1, 34 .read = pmic_reg_read, 35 .write = pmic_reg_write, 36 .irqs = rk805_irqs, 37 .num_irqs = ARRAY_SIZE(rk805_irqs), 38 }; 39 40 /* RK806 */ 41 static const struct virq_reg rk806_irqs[] = { 42 [RK8XX_IRQ_PWRON_FALL] = { 43 .mask = RK806_IRQ_PWRON_FALL_MSK, 44 .reg_offset = 0, 45 }, 46 [RK8XX_IRQ_PWRON_RISE] = { 47 .mask = RK806_IRQ_PWRON_RISE_MSK, 48 .reg_offset = 0, 49 }, 50 }; 51 52 static struct virq_chip rk806_irq_chip = { 53 .status_base = RK806_INT_STS0, 54 .mask_base = RK806_INT_MSK0, 55 .num_regs = 1, 56 .read = pmic_reg_read, 57 .write = pmic_reg_write, 58 .irqs = rk806_irqs, 59 .num_irqs = ARRAY_SIZE(rk806_irqs), 60 }; 61 62 /* RK808 */ 63 static const struct virq_reg rk808_irqs[] = { 64 [RK8XX_IRQ_PLUG_OUT] = { 65 .mask = RK808_IRQ_PLUG_OUT_MSK, 66 .reg_offset = 1, 67 }, 68 }; 69 70 static struct virq_chip rk808_irq_chip = { 71 .status_base = RK808_INT_STS_REG1, 72 .mask_base = RK808_INT_MSK_REG1, 73 .irq_reg_stride = 2, 74 .num_regs = 2, 75 .read = pmic_reg_read, 76 .write = pmic_reg_write, 77 .irqs = rk808_irqs, 78 .num_irqs = ARRAY_SIZE(rk808_irqs), 79 }; 80 81 /* RK816 */ 82 static const struct virq_reg rk816_irqs[] = { 83 [RK8XX_IRQ_PWRON_FALL] = { 84 .mask = RK816_IRQ_PWRON_FALL_MSK, 85 .reg_offset = 0, 86 }, 87 [RK8XX_IRQ_PWRON_RISE] = { 88 .mask = RK816_IRQ_PWRON_RISE_MSK, 89 .reg_offset = 0, 90 }, 91 [RK8XX_IRQ_PLUG_OUT] = { 92 .mask = RK816_IRQ_PLUG_OUT_MSK, 93 .reg_offset = 2, 94 }, 95 [RK8XX_IRQ_CHG_OK] = { 96 .mask = RK816_IRQ_CHR_OK_MSK, 97 .reg_offset = 2, 98 }, 99 }; 100 101 static struct virq_chip rk816_irq_chip = { 102 .status_base = RK816_INT_STS_REG1, 103 .mask_base = RK816_INT_MSK_REG1, 104 .irq_unalign_reg_idx = 1, /* idx <= 1, stride = 3 */ 105 .irq_unalign_reg_stride = 3, 106 .irq_reg_stride = 2, /* idx > 1, stride = 2 */ 107 .num_regs = 3, 108 .read = pmic_reg_read, 109 .write = pmic_reg_write, 110 .irqs = rk816_irqs, 111 .num_irqs = ARRAY_SIZE(rk816_irqs), 112 }; 113 114 /* RK818 */ 115 static const struct virq_reg rk818_irqs[] = { 116 [RK8XX_IRQ_PLUG_OUT] = { 117 .mask = RK818_IRQ_PLUG_OUT_MSK, 118 .reg_offset = 1, 119 }, 120 [RK8XX_IRQ_CHG_OK] = { 121 .mask = RK818_IRQ_CHR_OK_MSK, 122 .reg_offset = 1, 123 }, 124 }; 125 126 static struct virq_chip rk818_irq_chip = { 127 .status_base = RK818_INT_STS_REG1, 128 .mask_base = RK818_INT_MSK_REG1, 129 .irq_reg_stride = 2, 130 .num_regs = 2, 131 .read = pmic_reg_read, 132 .write = pmic_reg_write, 133 .irqs = rk818_irqs, 134 .num_irqs = ARRAY_SIZE(rk818_irqs), 135 }; 136 137 /* RK817/RK809 */ 138 static const struct virq_reg rk817_irqs[] = { 139 [RK8XX_IRQ_PWRON_FALL] = { 140 .mask = RK817_IRQ_PWRON_FALL_MSK, 141 .reg_offset = 0, 142 }, 143 [RK8XX_IRQ_PWRON_RISE] = { 144 .mask = RK817_IRQ_PWRON_RISE_MSK, 145 .reg_offset = 0, 146 }, 147 [RK8XX_IRQ_PLUG_OUT] = { 148 .mask = RK817_IRQ_PLUG_OUT_MSK, 149 .reg_offset = 1, 150 }, 151 [RK8XX_IRQ_PLUG_IN] = { 152 .mask = RK817_IRQ_PLUG_IN_MSK, 153 .reg_offset = 1, 154 }, 155 }; 156 157 static struct virq_chip rk817_irq_chip = { 158 .status_base = RK817_INT_STS_REG0, 159 .mask_base = RK817_INT_MSK_REG0, 160 .irq_reg_stride = 2, 161 .num_regs = 3, 162 .read = pmic_reg_read, 163 .write = pmic_reg_write, 164 .irqs = rk817_irqs, 165 .num_irqs = ARRAY_SIZE(rk817_irqs), 166 }; 167 #endif 168 169 static struct reg_data rk817_init_reg[] = { 170 /* enable the under-voltage protection, 171 * the under-voltage protection will shutdown the LDO3 and reset the PMIC 172 */ 173 { RK817_BUCK4_CMIN, 0x6b, 0x6e}, 174 { RK817_PMIC_SYS_CFG1, 0x20, 0x70}, 175 /* Set pmic_sleep as none function */ 176 { RK817_PMIC_SYS_CFG3, 0x00, 0x18 }, 177 /* GATE pin function: gate function */ 178 { RK817_GPIO_INT_CFG, 0x00, 0x20 }, 179 #ifdef CONFIG_DM_CHARGE_DISPLAY 180 /* Set pmic_int active low */ 181 { RK817_GPIO_INT_CFG, 0x00, 0x02 }, 182 #endif 183 }; 184 185 static struct reg_data rk818_init_current[] = { 186 { REG_USB_CTRL, 0x07, 0x0f}, /* 2A */ 187 }; 188 189 static const struct pmic_child_info pmic_children_info[] = { 190 { .prefix = "DCDC", .driver = "rk8xx_buck"}, 191 { .prefix = "LDO", .driver = "rk8xx_ldo"}, 192 { .prefix = "NLDO", .driver = "rk8xx_ldo"}, 193 { .prefix = "PLDO", .driver = "rk8xx_pldo"}, 194 { .prefix = "SWITCH", .driver = "rk8xx_switch"}, 195 { }, 196 }; 197 198 static const struct pmic_child_info power_key_info[] = { 199 { .prefix = "pwrkey", .driver = "rk8xx_pwrkey"}, 200 { }, 201 }; 202 203 static const struct pmic_child_info rtc_info[] = { 204 { .prefix = "rtc", .driver = "rk8xx_rtc"}, 205 { }, 206 }; 207 208 static const struct pmic_child_info fuel_gauge_info[] = { 209 { .addr = "1c", .prefix = "battery", .driver = "rk818_fg"}, 210 { .addr = "20", .prefix = "battery", .driver = "rk817_fg"}, 211 { .addr = "1a", .prefix = "battery", .driver = "rk816_fg"}, 212 { }, 213 }; 214 215 static const struct pmic_child_info rk817_codec_info[] = { 216 { .prefix = "codec", .driver = "rk817_codec"}, 217 { }, 218 }; 219 220 static int rk8xx_reg_count(struct udevice *dev) 221 { 222 struct rk8xx_priv *priv = dev_get_priv(dev); 223 224 switch (priv->variant) { 225 case RK809_ID: 226 case RK817_ID: 227 return RK817_NUM_OF_REGS; 228 default: 229 return RK808_NUM_OF_REGS; 230 } 231 } 232 233 static int rk8xx_write(struct udevice *dev, uint reg, const uint8_t *buff, 234 int len) 235 { 236 int ret; 237 238 ret = dm_i2c_write(dev, reg, buff, len); 239 if (ret) { 240 printf("%s: write reg 0x%02x failed, ret=%d\n", __func__, reg, ret); 241 return ret; 242 } 243 244 return 0; 245 } 246 247 static int rk8xx_read(struct udevice *dev, uint reg, uint8_t *buff, int len) 248 { 249 int ret; 250 251 ret = dm_i2c_read(dev, reg, buff, len); 252 if (ret) { 253 printf("%s: read reg 0x%02x failed, ret=%d\n", __func__, reg, ret); 254 return ret; 255 } 256 257 return 0; 258 } 259 260 static int rk8xx_suspend(struct udevice *dev) 261 { 262 struct rk8xx_priv *priv = dev_get_priv(dev); 263 int ret = 0; 264 u8 i, val; 265 266 switch (priv->variant) { 267 case RK806_ID: 268 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 269 if (ret) 270 return ret; 271 val &= RK806_PWRCTRL_FUN_MSK; 272 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 273 if (ret) 274 return ret; 275 276 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 277 if (ret) 278 return ret; 279 280 val &= RK806_PWRCTRL_FUN_MSK; 281 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 282 if (ret) 283 return ret; 284 285 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) { 286 ret = rk8xx_read(dev, i, &val, 1); 287 if (ret) 288 return ret; 289 val &= RK806_VSEL_CTRL_MSK; 290 ret = rk8xx_write(dev, i, &val, 1); 291 if (ret) 292 return ret; 293 } 294 295 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 296 if (ret) 297 return ret; 298 val &= RK806_PWRCTRL_FUN_MSK; 299 val |= RK806_ENABLE_PWRCTRL; 300 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 301 if (ret) 302 return ret; 303 304 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) { 305 ret = rk8xx_read(dev, i, &val, 1); 306 if (ret) 307 return ret; 308 val &= RK806_VSEL_CTRL_MSK; 309 val |= RK806_VSEL_PWRCTRL1; 310 ret = rk8xx_write(dev, i, &val, 1); 311 if (ret) 312 return ret; 313 } 314 break; 315 case RK809_ID: 316 case RK817_ID: 317 /* pmic_sleep active high */ 318 ret = rk8xx_read(dev, RK817_PMIC_SYS_CFG3, &val, 1); 319 if (ret) 320 return ret; 321 priv->sleep_pin = val; 322 val &= ~0x38; 323 val |= 0x28; 324 ret = rk8xx_write(dev, RK817_PMIC_SYS_CFG3, &val, 1); 325 break; 326 default: 327 return 0; 328 } 329 330 return ret; 331 } 332 333 static int rk8xx_resume(struct udevice *dev) 334 { 335 struct rk8xx_priv *priv = dev_get_priv(dev); 336 int ret = 0; 337 u8 i, val; 338 339 switch (priv->variant) { 340 case RK806_ID: 341 for (i = RK806_VSEL_CTR_SEL0; i <= RK806_DVS_CTR_SEL4; i++) { 342 ret = rk8xx_read(dev, i, &val, 1); 343 if (ret) 344 return ret; 345 val &= RK806_VSEL_CTRL_MSK; 346 ret = rk8xx_write(dev, i, &val, 1); 347 if (ret) 348 return ret; 349 } 350 351 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 352 if (ret) 353 return ret; 354 val &= RK806_PWRCTRL_FUN_MSK; 355 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG0, &val, 1); 356 if (ret) 357 return ret; 358 359 ret = rk8xx_read(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 360 if (ret) 361 return ret; 362 val &= RK806_PWRCTRL_FUN_MSK; 363 ret = rk8xx_write(dev, RK806_PWRCTRL_CONFIG1, &val, 1); 364 break; 365 case RK809_ID: 366 case RK817_ID: 367 ret = rk8xx_write(dev, RK817_PMIC_SYS_CFG3, &priv->sleep_pin, 1); 368 break; 369 default: 370 return 0; 371 } 372 373 return ret; 374 } 375 376 static int rk8xx_shutdown(struct udevice *dev) 377 { 378 struct rk8xx_priv *priv = dev_get_priv(dev); 379 u8 val, dev_off, devctrl_reg; 380 int ret = 0; 381 382 switch (priv->variant) { 383 case RK806_ID: 384 devctrl_reg = RK806_SYS_CFG3; 385 dev_off = RK806_DEV_OFF; 386 break; 387 case RK808_ID: 388 devctrl_reg = REG_DEVCTRL; 389 dev_off = BIT(3); 390 break; 391 case RK805_ID: 392 case RK816_ID: 393 case RK818_ID: 394 devctrl_reg = REG_DEVCTRL; 395 dev_off = BIT(0); 396 break; 397 case RK809_ID: 398 case RK817_ID: 399 devctrl_reg = RK817_REG_SYS_CFG3; 400 dev_off = BIT(0); 401 break; 402 default: 403 printf("Unknown PMIC: RK%x\n", priv->variant); 404 return -EINVAL; 405 } 406 407 ret = rk8xx_read(dev, devctrl_reg, &val, 1); 408 if (ret) 409 return ret; 410 411 val |= dev_off; 412 ret = rk8xx_write(dev, devctrl_reg, &val, 1); 413 if (ret) 414 return ret; 415 416 return 0; 417 } 418 419 #if CONFIG_IS_ENABLED(PMIC_CHILDREN) 420 static int rk8xx_bind(struct udevice *dev) 421 { 422 ofnode regulators_node; 423 int children; 424 425 regulators_node = dev_read_subnode(dev, "regulators"); 426 if (!ofnode_valid(regulators_node)) { 427 debug("%s: %s regulators subnode not found!\n", __func__, 428 dev->name); 429 return -ENXIO; 430 } 431 432 debug("%s: '%s' - found regulators subnode\n", __func__, dev->name); 433 434 children = pmic_bind_children(dev, regulators_node, pmic_children_info); 435 if (!children) 436 debug("%s: %s - no child found\n", __func__, dev->name); 437 438 children = pmic_bind_children(dev, dev->node, power_key_info); 439 if (!children) 440 debug("%s: %s - no child found\n", __func__, dev->name); 441 442 children = pmic_bind_children(dev, dev->node, rtc_info); 443 if (!children) 444 debug("%s: %s - no child found\n", __func__, dev->name); 445 446 children = pmic_bind_children(dev, dev->node, fuel_gauge_info); 447 if (!children) 448 debug("%s: %s - no child found\n", __func__, dev->name); 449 450 children = pmic_bind_children(dev, dev->node, rk817_codec_info); 451 if (!children) 452 debug("%s: %s - no child found\n", __func__, dev->name); 453 454 /* Always return success for this device */ 455 return 0; 456 } 457 #endif 458 459 #if CONFIG_IS_ENABLED(IRQ) 460 /* 461 * When system suspend during U-Boot charge, make sure the plugout event 462 * be able to wakeup cpu in wfi/wfe state. 463 */ 464 #ifdef CONFIG_DM_CHARGE_DISPLAY 465 static void rk8xx_plug_out_handler(int irq, void *data) 466 { 467 printf("Plug out interrupt\n"); 468 } 469 #endif 470 471 static int rk8xx_irq_chip_init(struct udevice *dev) 472 { 473 struct rk8xx_priv *priv = dev_get_priv(dev); 474 struct virq_chip *irq_chip = NULL; 475 __maybe_unused int irq_plugout = 1; 476 int ret; 477 478 switch (priv->variant) { 479 case RK806_ID: 480 irq_chip = &rk806_irq_chip; 481 irq_plugout = 0; 482 break; 483 case RK808_ID: 484 irq_chip = &rk808_irq_chip; 485 break; 486 case RK805_ID: 487 irq_chip = &rk805_irq_chip; 488 irq_plugout = 0; 489 break; 490 case RK816_ID: 491 irq_chip = &rk816_irq_chip; 492 break; 493 case RK818_ID: 494 irq_chip = &rk818_irq_chip; 495 break; 496 case RK809_ID: 497 case RK817_ID: 498 irq_chip = &rk817_irq_chip; 499 break; 500 default: 501 return -EINVAL; 502 } 503 504 if (irq_chip) { 505 ret = virq_add_chip(dev, irq_chip, priv->irq); 506 if (ret) { 507 printf("Failed to add irqchip(irq=%d), ret=%d\n", 508 priv->irq, ret); 509 return ret; 510 } 511 512 priv->irq_chip = irq_chip; 513 514 #ifdef CONFIG_DM_CHARGE_DISPLAY 515 int irq; 516 517 if (irq_plugout) { 518 irq = virq_to_irq(irq_chip, RK8XX_IRQ_PLUG_OUT); 519 if (irq < 0) { 520 printf("Failed to register plugout irq, ret=%d\n", irq); 521 return irq; 522 } 523 irq_install_handler(irq, rk8xx_plug_out_handler, dev); 524 irq_handler_enable_suspend_only(irq); 525 } 526 #endif 527 } 528 529 return 0; 530 } 531 #else 532 static inline int rk8xx_irq_chip_init(struct udevice *dev) { return 0; } 533 #endif 534 535 static int rk8xx_ofdata_to_platdata(struct udevice *dev) 536 { 537 struct rk8xx_priv *rk8xx = dev_get_priv(dev); 538 u32 interrupt, phandle, val; 539 int ret; 540 541 phandle = dev_read_u32_default(dev, "interrupt-parent", -ENODATA); 542 if (phandle == -ENODATA) { 543 printf("Read 'interrupt-parent' failed, ret=%d\n", phandle); 544 return phandle; 545 } 546 547 ret = dev_read_u32_array(dev, "interrupts", &interrupt, 1); 548 if (ret) { 549 printf("Read 'interrupts' failed, ret=%d\n", ret); 550 return ret; 551 } 552 553 #if CONFIG_IS_ENABLED(IRQ) 554 rk8xx->irq = phandle_gpio_to_irq(phandle, interrupt); 555 if (rk8xx->irq < 0) { 556 printf("Failed to request rk8xx irq, ret=%d\n", rk8xx->irq); 557 return rk8xx->irq; 558 } 559 #endif 560 val = dev_read_u32_default(dev, "long-press-off-time-sec", 0); 561 if (val <= 6) 562 rk8xx->lp_off_time = RK8XX_LP_TIME_6S; 563 else if (val <= 8) 564 rk8xx->lp_off_time = RK8XX_LP_TIME_8S; 565 else if (val <= 10) 566 rk8xx->lp_off_time = RK8XX_LP_TIME_10S; 567 else 568 rk8xx->lp_off_time = RK8XX_LP_TIME_12S; 569 570 val = dev_read_u32_default(dev, "long-press-restart", 0); 571 if (val) 572 rk8xx->lp_action = RK8XX_LP_RESTART; 573 else 574 rk8xx->lp_action = RK8XX_LP_OFF; 575 576 rk8xx->not_save_power_en = dev_read_u32_default(dev, "not-save-power-en", 0); 577 rk8xx->sys_can_sd = dev_read_bool(dev, "vsys-off-shutdown"); 578 rk8xx->rst_fun = dev_read_u32_default(dev, "pmic-reset-func", 0); 579 /* buck5 external feedback resister disable */ 580 rk8xx->buck5_feedback_dis = dev_read_bool(dev, "buck5-feedback-disable"); 581 582 return 0; 583 } 584 585 static int rk8xx_probe(struct udevice *dev) 586 { 587 struct rk8xx_priv *priv = dev_get_priv(dev); 588 struct reg_data *init_current = NULL; 589 struct reg_data *init_data = NULL; 590 int init_current_num = 0; 591 int init_data_num = 0; 592 int ret = 0, i, show_variant; 593 uint8_t msb, lsb, id_msb, id_lsb; 594 uint8_t on_source = 0, off_source = 0; 595 uint8_t pwron_key = 0, lp_off_msk = 0, lp_act_msk = 0; 596 uint8_t power_en0, power_en1, power_en2, power_en3; 597 uint8_t on, off; 598 uint8_t value; 599 600 /* read Chip variant */ 601 if (device_is_compatible(dev, "rockchip,rk817") || 602 device_is_compatible(dev, "rockchip,rk809")) { 603 id_msb = RK817_ID_MSB; 604 id_lsb = RK817_ID_LSB; 605 } else if (device_is_compatible(dev, "rockchip,rk806")) { 606 id_msb = RK806_CHIP_NAME; 607 id_lsb = RK806_CHIP_VER; 608 } else { 609 id_msb = ID_MSB; 610 id_lsb = ID_LSB; 611 } 612 613 ret = rk8xx_read(dev, id_msb, &msb, 1); 614 if (ret) 615 return ret; 616 ret = rk8xx_read(dev, id_lsb, &lsb, 1); 617 if (ret) 618 return ret; 619 620 priv->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK; 621 show_variant = priv->variant; 622 switch (priv->variant) { 623 case RK806_ID: 624 on_source = RK806_ON_SOURCE; 625 off_source = RK806_OFF_SOURCE; 626 ret = rk8xx_read(dev, RK806_HW_VER, &value, 1); 627 if (ret) 628 panic("RK806: read RK806_HW_VER error!\n"); 629 630 if ((lsb & RK806_VERSION_MSK) == RK806_VERSION_AB) { 631 ret = rk8xx_read(dev, RK806_SYS_CFG1, &value, 1); 632 if (ret) { 633 dev_err(dev, "rk806 RK806_SYS_CFG1 read error: %d\n", ret); 634 return ret; 635 } 636 value |= RK806_ABNORDET_EN; 637 rk8xx_write(dev, RK806_SYS_CFG1, &value, 1); 638 } 639 640 if (priv->rst_fun) { 641 rk8xx_read(dev, RK806_SYS_CFG3, &value, 1); 642 value &= RK806_RESET_FUN_CLR; 643 if (priv->rst_fun == RK806_RST_MODE1) { 644 value |= (RK806_RST_MODE1 << 6); 645 rk8xx_write(dev, RK806_SYS_CFG3, &value, 1); 646 } else if (priv->rst_fun == RK806_RST_MODE2) { 647 value |= (RK806_RST_MODE2 << 6); 648 rk8xx_write(dev, RK806_SYS_CFG3, &value, 1); 649 } 650 } 651 652 if (priv->buck5_feedback_dis) { 653 rk8xx_read(dev, RK806_BUCK_RSERVE_REG3, &value, 1); 654 value &=( ~RK806_BUCK5_EX_RES_EN); 655 rk8xx_write(dev, RK806_BUCK_RSERVE_REG3, &value, 1); 656 } 657 break; 658 case RK808_ID: 659 show_variant = 0x808; /* RK808 hardware ID is 0 */ 660 pwron_key = RK8XX_DEVCTRL_REG; 661 lp_off_msk = RK8XX_LP_OFF_MSK; 662 break; 663 case RK805_ID: 664 case RK816_ID: 665 on_source = RK8XX_ON_SOURCE; 666 off_source = RK8XX_OFF_SOURCE; 667 pwron_key = RK8XX_DEVCTRL_REG; 668 lp_off_msk = RK8XX_LP_OFF_MSK; 669 lp_act_msk = RK8XX_LP_ACTION_MSK; 670 break; 671 case RK818_ID: 672 on_source = RK8XX_ON_SOURCE; 673 off_source = RK8XX_OFF_SOURCE; 674 pwron_key = RK8XX_DEVCTRL_REG; 675 lp_off_msk = RK8XX_LP_OFF_MSK; 676 lp_act_msk = RK8XX_LP_ACTION_MSK; 677 /* set current if no fuel gauge */ 678 if (!ofnode_valid(dev_read_subnode(dev, "battery"))) { 679 init_current = rk818_init_current; 680 init_current_num = ARRAY_SIZE(rk818_init_current); 681 } 682 break; 683 case RK809_ID: 684 case RK817_ID: 685 if (device_is_compatible(dev, "rockchip,rk809") && (priv->variant != RK809_ID)) { 686 dev_err(dev, "the dts is RK809, the hardware is RK817\n"); 687 run_command("download", 0); 688 } 689 690 if (device_is_compatible(dev, "rockchip,rk817") && (priv->variant != RK817_ID)) { 691 dev_err(dev, "the dts is RK817, the hardware is RK809\n"); 692 run_command("download", 0); 693 } 694 695 on_source = RK817_ON_SOURCE; 696 off_source = RK817_OFF_SOURCE; 697 pwron_key = RK817_PWRON_KEY; 698 lp_off_msk = RK8XX_LP_OFF_MSK; 699 lp_act_msk = RK8XX_LP_ACTION_MSK; 700 init_data = rk817_init_reg; 701 init_data_num = ARRAY_SIZE(rk817_init_reg); 702 703 /* whether the system voltage can be shutdown in PWR_off mode */ 704 if (priv->sys_can_sd) { 705 ret = rk8xx_read(dev, RK817_PMIC_CHRG_TERM, &value, 1); 706 if (ret) 707 return ret; 708 value |= 0x80; 709 ret = rk8xx_write(dev, RK817_PMIC_CHRG_TERM, &value, 1); 710 if (ret) 711 return ret; 712 } else { 713 ret = rk8xx_read(dev, RK817_PMIC_CHRG_TERM, &value, 1); 714 if (ret) 715 return ret; 716 value &= 0x7f; 717 ret = rk8xx_write(dev, RK817_PMIC_CHRG_TERM, &value, 1); 718 if (ret) 719 return ret; 720 } 721 722 /* judge whether save the PMIC_POWER_EN register */ 723 if (!priv->not_save_power_en) { 724 ret = rk8xx_read(dev, RK817_POWER_EN0, &power_en0, 1); 725 if (ret) 726 return ret; 727 ret = rk8xx_read(dev, RK817_POWER_EN1, &power_en1, 1); 728 if (ret) 729 return ret; 730 ret = rk8xx_read(dev, RK817_POWER_EN2, &power_en2, 1); 731 if (ret) 732 return ret; 733 ret = rk8xx_read(dev, RK817_POWER_EN3, &power_en3, 1); 734 if (ret) 735 return ret; 736 737 value = (power_en0 & 0x0f) | ((power_en1 & 0x0f) << 4); 738 rk8xx_write(dev, RK817_POWER_EN_SAVE0, &value, 1); 739 value = (power_en2 & 0x0f) | ((power_en3 & 0x0f) << 4); 740 rk8xx_write(dev, RK817_POWER_EN_SAVE1, &value, 1); 741 } 742 break; 743 default: 744 printf("Unknown PMIC: RK%x!!\n", priv->variant); 745 return -EINVAL; 746 } 747 748 /* common init */ 749 for (i = 0; i < init_data_num; i++) { 750 ret = pmic_clrsetbits(dev, 751 init_data[i].reg, 752 init_data[i].mask, 753 init_data[i].val); 754 if (ret < 0) { 755 printf("%s: i2c set reg 0x%x failed, ret=%d\n", 756 __func__, init_data[i].reg, ret); 757 } 758 } 759 760 /* current init */ 761 for (i = 0; i < init_current_num; i++) { 762 ret = pmic_clrsetbits(dev, 763 init_current[i].reg, 764 init_current[i].mask, 765 init_current[i].val); 766 if (ret < 0) { 767 printf("%s: i2c set reg 0x%x failed, ret=%d\n", 768 __func__, init_current[i].reg, ret); 769 } 770 } 771 772 printf("PMIC: RK%x ", show_variant); 773 774 if (on_source && off_source) { 775 rk8xx_read(dev, on_source, &on, 1); 776 rk8xx_read(dev, off_source, &off, 1); 777 printf("(on=0x%02x, off=0x%02x)", on, off); 778 } 779 printf("\n"); 780 781 if (pwron_key) { 782 ret = rk8xx_read(dev, pwron_key, &value, 1); 783 if (ret) 784 return ret; 785 value &= ~(lp_off_msk | lp_act_msk); 786 if (lp_off_msk) 787 value |= priv->lp_off_time; 788 if (lp_act_msk) 789 value |= priv->lp_action; 790 rk8xx_write(dev, pwron_key, &value, 1); 791 } 792 793 ret = rk8xx_irq_chip_init(dev); 794 if (ret) { 795 printf("IRQ chip initial failed\n"); 796 return ret; 797 } 798 799 return 0; 800 } 801 802 static struct dm_pmic_ops rk8xx_ops = { 803 .reg_count = rk8xx_reg_count, 804 .read = rk8xx_read, 805 .write = rk8xx_write, 806 .suspend = rk8xx_suspend, 807 .resume = rk8xx_resume, 808 .shutdown = rk8xx_shutdown, 809 }; 810 811 static const struct udevice_id rk8xx_ids[] = { 812 { .compatible = "rockchip,rk805" }, 813 { .compatible = "rockchip,rk806" }, 814 { .compatible = "rockchip,rk808" }, 815 { .compatible = "rockchip,rk809" }, 816 { .compatible = "rockchip,rk816" }, 817 { .compatible = "rockchip,rk817" }, 818 { .compatible = "rockchip,rk818" }, 819 { } 820 }; 821 822 U_BOOT_DRIVER(pmic_rk8xx) = { 823 .name = "rk8xx pmic", 824 .id = UCLASS_PMIC, 825 .of_match = rk8xx_ids, 826 #if CONFIG_IS_ENABLED(PMIC_CHILDREN) 827 .bind = rk8xx_bind, 828 #endif 829 .ofdata_to_platdata = rk8xx_ofdata_to_platdata, 830 .priv_auto_alloc_size = sizeof(struct rk8xx_priv), 831 .probe = rk8xx_probe, 832 .ops = &rk8xx_ops, 833 }; 834