xref: /rk3399_rockchip-uboot/drivers/power/pmic/pmic_tps65910.c (revision 6297872cd5de4705b6318778261b1f3f64a34c11)
1*b04601a7SPhilip, Avinash /*
2*b04601a7SPhilip, Avinash  * (C) Copyright 2011-2013
3*b04601a7SPhilip, Avinash  * Texas Instruments, <www.ti.com>
4*b04601a7SPhilip, Avinash  *
5*b04601a7SPhilip, Avinash  * SPDX-License-Identifier:	GPL-2.0+
6*b04601a7SPhilip, Avinash  */
7*b04601a7SPhilip, Avinash 
8*b04601a7SPhilip, Avinash #include <common.h>
9*b04601a7SPhilip, Avinash #include <i2c.h>
10*b04601a7SPhilip, Avinash #include <power/tps65910.h>
11*b04601a7SPhilip, Avinash 
12*b04601a7SPhilip, Avinash /*
13*b04601a7SPhilip, Avinash  * tps65910_set_i2c_control() - Set the TPS65910 to be controlled via the I2C
14*b04601a7SPhilip, Avinash  * 				interface.
15*b04601a7SPhilip, Avinash  * @return:		       0 on success, not 0 on failure
16*b04601a7SPhilip, Avinash  */
tps65910_set_i2c_control(void)17*b04601a7SPhilip, Avinash int tps65910_set_i2c_control(void)
18*b04601a7SPhilip, Avinash {
19*b04601a7SPhilip, Avinash 	int ret;
20*b04601a7SPhilip, Avinash 	uchar buf;
21*b04601a7SPhilip, Avinash 
22*b04601a7SPhilip, Avinash 	/* VDD1/2 voltage selection register access by control i/f */
23*b04601a7SPhilip, Avinash 	ret = i2c_read(TPS65910_CTRL_I2C_ADDR, TPS65910_DEVCTRL_REG, 1,
24*b04601a7SPhilip, Avinash 		       &buf, 1);
25*b04601a7SPhilip, Avinash 
26*b04601a7SPhilip, Avinash 	if (ret)
27*b04601a7SPhilip, Avinash 		return ret;
28*b04601a7SPhilip, Avinash 
29*b04601a7SPhilip, Avinash 	buf |= TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C;
30*b04601a7SPhilip, Avinash 
31*b04601a7SPhilip, Avinash 	return i2c_write(TPS65910_CTRL_I2C_ADDR, TPS65910_DEVCTRL_REG, 1,
32*b04601a7SPhilip, Avinash 			 &buf, 1);
33*b04601a7SPhilip, Avinash }
34*b04601a7SPhilip, Avinash 
35*b04601a7SPhilip, Avinash /*
36*b04601a7SPhilip, Avinash  * tps65910_voltage_update() - Voltage switching for MPU frequency switching.
37*b04601a7SPhilip, Avinash  * @module:		       mpu - 0, core - 1
38*b04601a7SPhilip, Avinash  * @vddx_op_vol_sel:	       vdd voltage to set
39*b04601a7SPhilip, Avinash  * @return:		       0 on success, not 0 on failure
40*b04601a7SPhilip, Avinash  */
tps65910_voltage_update(unsigned int module,unsigned char vddx_op_vol_sel)41*b04601a7SPhilip, Avinash int tps65910_voltage_update(unsigned int module, unsigned char vddx_op_vol_sel)
42*b04601a7SPhilip, Avinash {
43*b04601a7SPhilip, Avinash 	uchar buf;
44*b04601a7SPhilip, Avinash 	unsigned int reg_offset;
45*b04601a7SPhilip, Avinash 	int ret;
46*b04601a7SPhilip, Avinash 
47*b04601a7SPhilip, Avinash 	if (module == MPU)
48*b04601a7SPhilip, Avinash 		reg_offset = TPS65910_VDD1_OP_REG;
49*b04601a7SPhilip, Avinash 	else
50*b04601a7SPhilip, Avinash 		reg_offset = TPS65910_VDD2_OP_REG;
51*b04601a7SPhilip, Avinash 
52*b04601a7SPhilip, Avinash 	/* Select VDDx OP   */
53*b04601a7SPhilip, Avinash 	ret = i2c_read(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
54*b04601a7SPhilip, Avinash 	if (ret)
55*b04601a7SPhilip, Avinash 		return ret;
56*b04601a7SPhilip, Avinash 
57*b04601a7SPhilip, Avinash 	buf &= ~TPS65910_OP_REG_CMD_MASK;
58*b04601a7SPhilip, Avinash 
59*b04601a7SPhilip, Avinash 	ret = i2c_write(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
60*b04601a7SPhilip, Avinash 	if (ret)
61*b04601a7SPhilip, Avinash 		return ret;
62*b04601a7SPhilip, Avinash 
63*b04601a7SPhilip, Avinash 	/* Configure VDDx OP  Voltage */
64*b04601a7SPhilip, Avinash 	ret = i2c_read(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
65*b04601a7SPhilip, Avinash 	if (ret)
66*b04601a7SPhilip, Avinash 		return ret;
67*b04601a7SPhilip, Avinash 
68*b04601a7SPhilip, Avinash 	buf &= ~TPS65910_OP_REG_SEL_MASK;
69*b04601a7SPhilip, Avinash 	buf |= vddx_op_vol_sel;
70*b04601a7SPhilip, Avinash 
71*b04601a7SPhilip, Avinash 	ret = i2c_write(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
72*b04601a7SPhilip, Avinash 	if (ret)
73*b04601a7SPhilip, Avinash 		return ret;
74*b04601a7SPhilip, Avinash 
75*b04601a7SPhilip, Avinash 	ret = i2c_read(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
76*b04601a7SPhilip, Avinash 	if (ret)
77*b04601a7SPhilip, Avinash 		return ret;
78*b04601a7SPhilip, Avinash 
79*b04601a7SPhilip, Avinash 	if ((buf & TPS65910_OP_REG_SEL_MASK) != vddx_op_vol_sel)
80*b04601a7SPhilip, Avinash 		return 1;
81*b04601a7SPhilip, Avinash 
82*b04601a7SPhilip, Avinash 	return 0;
83*b04601a7SPhilip, Avinash }
84