1f8ea15f7SMacpaul Lin /* 2f8ea15f7SMacpaul Lin * (C) Copyright 2009 Faraday Technology 3f8ea15f7SMacpaul Lin * Po-Yu Chuang <ratbert@faraday-tech.com> 4f8ea15f7SMacpaul Lin * 5f8ea15f7SMacpaul Lin * Copyright (C) 2010 Andes Technology Corporation 6f8ea15f7SMacpaul Lin * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com> 7f8ea15f7SMacpaul Lin * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> 8f8ea15f7SMacpaul Lin * 9f8ea15f7SMacpaul Lin * This program is free software; you can redistribute it and/or modify 10f8ea15f7SMacpaul Lin * it under the terms of the GNU General Public License as published by 11f8ea15f7SMacpaul Lin * the Free Software Foundation; either version 2 of the License, or 12f8ea15f7SMacpaul Lin * (at your option) any later version. 13f8ea15f7SMacpaul Lin * 14f8ea15f7SMacpaul Lin * This program is distributed in the hope that it will be useful, 15f8ea15f7SMacpaul Lin * but WITHOUT ANY WARRANTY; without even the implied warranty of 16f8ea15f7SMacpaul Lin * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17f8ea15f7SMacpaul Lin * GNU General Public License for more details. 18f8ea15f7SMacpaul Lin * 19f8ea15f7SMacpaul Lin * You should have received a copy of the GNU General Public License 20f8ea15f7SMacpaul Lin * along with this program; if not, write to the Free Software 21f8ea15f7SMacpaul Lin * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22f8ea15f7SMacpaul Lin */ 23f8ea15f7SMacpaul Lin 24f8ea15f7SMacpaul Lin #include <common.h> 25f8ea15f7SMacpaul Lin #include <asm/io.h> 26d6150db2SPo-Yu Chuang #include <faraday/ftpmu010.h> 27f8ea15f7SMacpaul Lin 28*caddb8e4SMacpaul Lin /* OSCC: OSC Control Register */ 29f8ea15f7SMacpaul Lin void ftpmu010_32768osc_enable(void) 30f8ea15f7SMacpaul Lin { 31*caddb8e4SMacpaul Lin static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; 32f8ea15f7SMacpaul Lin unsigned int oscc; 33f8ea15f7SMacpaul Lin 34f8ea15f7SMacpaul Lin /* enable the 32768Hz oscillator */ 35f8ea15f7SMacpaul Lin oscc = readl(&pmu->OSCC); 36f8ea15f7SMacpaul Lin oscc &= ~(FTPMU010_OSCC_OSCL_OFF | FTPMU010_OSCC_OSCL_TRI); 37f8ea15f7SMacpaul Lin writel(oscc, &pmu->OSCC); 38f8ea15f7SMacpaul Lin 39f8ea15f7SMacpaul Lin /* wait until ready */ 40f8ea15f7SMacpaul Lin while (!(readl(&pmu->OSCC) & FTPMU010_OSCC_OSCL_STABLE)) 41f8ea15f7SMacpaul Lin ; 42f8ea15f7SMacpaul Lin 43f8ea15f7SMacpaul Lin /* select 32768Hz oscillator */ 44f8ea15f7SMacpaul Lin oscc = readl(&pmu->OSCC); 45f8ea15f7SMacpaul Lin oscc |= FTPMU010_OSCC_OSCL_RTCLSEL; 46f8ea15f7SMacpaul Lin writel(oscc, &pmu->OSCC); 47f8ea15f7SMacpaul Lin } 48f8ea15f7SMacpaul Lin 49*caddb8e4SMacpaul Lin /* MFPSR: Multi-Function Port Setting Register */ 50*caddb8e4SMacpaul Lin void ftpmu010_mfpsr_select_dev(unsigned int dev) 51*caddb8e4SMacpaul Lin { 52*caddb8e4SMacpaul Lin static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; 53*caddb8e4SMacpaul Lin unsigned int mfpsr; 54*caddb8e4SMacpaul Lin 55*caddb8e4SMacpaul Lin mfpsr = readl(&pmu->MFPSR); 56*caddb8e4SMacpaul Lin mfpsr |= dev; 57*caddb8e4SMacpaul Lin writel(mfpsr, &pmu->MFPSR); 58*caddb8e4SMacpaul Lin } 59*caddb8e4SMacpaul Lin 60*caddb8e4SMacpaul Lin void ftpmu010_mfpsr_diselect_dev(unsigned int dev) 61*caddb8e4SMacpaul Lin { 62*caddb8e4SMacpaul Lin static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; 63*caddb8e4SMacpaul Lin unsigned int mfpsr; 64*caddb8e4SMacpaul Lin 65*caddb8e4SMacpaul Lin mfpsr = readl(&pmu->MFPSR); 66*caddb8e4SMacpaul Lin mfpsr &= ~dev; 67*caddb8e4SMacpaul Lin writel(mfpsr, &pmu->MFPSR); 68*caddb8e4SMacpaul Lin } 69*caddb8e4SMacpaul Lin 70*caddb8e4SMacpaul Lin /* PDLLCR0: PLL/DLL Control Register 0 */ 71f8ea15f7SMacpaul Lin void ftpmu010_dlldis_disable(void) 72f8ea15f7SMacpaul Lin { 73*caddb8e4SMacpaul Lin static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; 74f8ea15f7SMacpaul Lin unsigned int pdllcr0; 75f8ea15f7SMacpaul Lin 76f8ea15f7SMacpaul Lin pdllcr0 = readl(&pmu->PDLLCR0); 77f8ea15f7SMacpaul Lin pdllcr0 |= FTPMU010_PDLLCR0_DLLDIS; 78f8ea15f7SMacpaul Lin writel(pdllcr0, &pmu->PDLLCR0); 79f8ea15f7SMacpaul Lin } 80f8ea15f7SMacpaul Lin 81f8ea15f7SMacpaul Lin void ftpmu010_sdram_clk_disable(unsigned int cr0) 82f8ea15f7SMacpaul Lin { 83*caddb8e4SMacpaul Lin static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; 84f8ea15f7SMacpaul Lin unsigned int pdllcr0; 85f8ea15f7SMacpaul Lin 86f8ea15f7SMacpaul Lin pdllcr0 = readl(&pmu->PDLLCR0); 87f8ea15f7SMacpaul Lin pdllcr0 |= FTPMU010_PDLLCR0_HCLKOUTDIS(cr0); 88f8ea15f7SMacpaul Lin writel(pdllcr0, &pmu->PDLLCR0); 89f8ea15f7SMacpaul Lin } 90*caddb8e4SMacpaul Lin 91*caddb8e4SMacpaul Lin /* SDRAMHTC: SDRAM Signal Hold Time Control */ 92*caddb8e4SMacpaul Lin void ftpmu010_sdramhtc_set(unsigned int val) 93*caddb8e4SMacpaul Lin { 94*caddb8e4SMacpaul Lin static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; 95*caddb8e4SMacpaul Lin unsigned int sdramhtc; 96*caddb8e4SMacpaul Lin 97*caddb8e4SMacpaul Lin sdramhtc = readl(&pmu->SDRAMHTC); 98*caddb8e4SMacpaul Lin sdramhtc |= val; 99*caddb8e4SMacpaul Lin writel(sdramhtc, &pmu->SDRAMHTC); 100*caddb8e4SMacpaul Lin } 101