1# 2# PINCTRL infrastructure and drivers 3# 4 5menu "Pin controllers" 6 7config PINCTRL 8 bool "Support pin controllers" 9 depends on DM 10 help 11 This enables the basic support for pinctrl framework. You may want 12 to enable some more options depending on what you want to do. 13 14config PINCTRL_FULL 15 bool "Support full pin controllers" 16 depends on PINCTRL && OF_CONTROL 17 default y 18 help 19 This provides Linux-compatible device tree interface for the pinctrl 20 subsystem. This feature depends on device tree configuration because 21 it parses a device tree to look for the pinctrl device which the 22 peripheral device is associated with. 23 24 If this option is disabled (it is the only possible choice for non-DT 25 boards), the pinctrl core provides no systematic mechanism for 26 identifying peripheral devices, applying needed pinctrl settings. 27 It is totally up to the implementation of each low-level driver. 28 You can save memory footprint in return for some limitations. 29 30config PINCTRL_GENERIC 31 bool "Support generic pin controllers" 32 depends on PINCTRL_FULL 33 default y 34 help 35 Say Y here if you want to use the pinctrl subsystem through the 36 generic DT interface. If enabled, some functions become available 37 to parse common properties such as "pins", "groups", "functions" and 38 some pin configuration parameters. It would be easier if you only 39 need the generic DT interface for pin muxing and pin configuration. 40 If you need to handle vendor-specific DT properties, you can disable 41 this option and implement your own set_state callback in the pinctrl 42 operations. 43 44config PINMUX 45 bool "Support pin multiplexing controllers" 46 depends on PINCTRL_GENERIC 47 default y 48 help 49 This option enables pin multiplexing through the generic pinctrl 50 framework. Most SoCs have their own own multiplexing arrangement 51 where a single pin can be used for several functions. An SoC pinctrl 52 driver allows the required function to be selected for each pin. 53 The driver is typically controlled by the device tree. 54 55config PINCONF 56 bool "Support pin configuration controllers" 57 depends on PINCTRL_GENERIC 58 help 59 This option enables pin configuration through the generic pinctrl 60 framework. 61 62config PINCONF_RECURSIVE 63 bool "Support recursive binding for pin configuration nodes" 64 depends on PINCTRL_FULL 65 default n if ARCH_STM32MP 66 default y 67 help 68 In the Linux pinctrl binding, the pin configuration nodes need not be 69 direct children of the pin controller device (may be grandchildren for 70 example). It is define is each individual pin controller device. 71 Say Y here if you want to keep this behavior with the pinconfig 72 u-class: all sub are recursivelly bounded. 73 If the option is disabled, this behavior is deactivated and only 74 the direct children of pin controller will be assumed as pin 75 configuration; you can save memory footprint when this feature is 76 no needed. 77 78config SPL_PINCTRL 79 bool "Support pin controllers in SPL" 80 depends on SPL && SPL_DM 81 help 82 This option is an SPL-variant of the PINCTRL option. 83 See the help of PINCTRL for details. 84 85config SPL_PINCTRL_FULL 86 bool "Support full pin controllers in SPL" 87 depends on SPL_PINCTRL && SPL_OF_CONTROL 88 default n if TARGET_STM32F746_DISCO 89 default y 90 help 91 This option is an SPL-variant of the PINCTRL_FULL option. 92 See the help of PINCTRL_FULL for details. 93 94config SPL_PINCTRL_GENERIC 95 bool "Support generic pin controllers in SPL" 96 depends on SPL_PINCTRL_FULL 97 default y 98 help 99 This option is an SPL-variant of the PINCTRL_GENERIC option. 100 See the help of PINCTRL_GENERIC for details. 101 102config SPL_PINMUX 103 bool "Support pin multiplexing controllers in SPL" 104 depends on SPL_PINCTRL_GENERIC 105 default y 106 help 107 This option is an SPL-variant of the PINMUX option. 108 See the help of PINMUX for details. 109 The pinctrl subsystem can add a substantial overhead to the SPL 110 image since it typically requires quite a few tables either in the 111 driver or in the device tree. If this is acceptable and you need 112 to adjust pin multiplexing in SPL in order to boot into U-Boot, 113 enable this option. You will need to enable device tree in SPL 114 for this to work. 115 116config SPL_PINCONF 117 bool "Support pin configuration controllers in SPL" 118 depends on SPL_PINCTRL_GENERIC 119 help 120 This option is an SPL-variant of the PINCONF option. 121 See the help of PINCONF for details. 122 123config SPL_PINCONF_RECURSIVE 124 bool "Support recursive binding for pin configuration nodes in SPL" 125 depends on SPL_PINCTRL_FULL 126 default n if ARCH_STM32MP 127 default y 128 help 129 This option is an SPL-variant of the PINCONF_RECURSIVE option. 130 See the help of PINCONF_RECURSIVE for details. 131 132if PINCTRL || SPL_PINCTRL 133 134config PINCTRL_AR933X 135 bool "QCA/Athores ar933x pin control driver" 136 depends on DM && SOC_AR933X 137 help 138 Support pin multiplexing control on QCA/Athores ar933x SoCs. 139 The driver is controlled by a device tree node which contains 140 both the GPIO definitions and pin control functions for each 141 available multiplex function. 142 143config PINCTRL_AT91 144 bool "AT91 pinctrl driver" 145 depends on DM 146 help 147 This option is to enable the AT91 pinctrl driver for AT91 PIO 148 controller. 149 150 AT91 PIO controller is a combined gpio-controller, pin-mux and 151 pin-config module. Each I/O pin may be dedicated as a general-purpose 152 I/O or be assigned to a function of an embedded peripheral. Each I/O 153 pin has a glitch filter providing rejection of glitches lower than 154 one-half of peripheral clock cycle and a debouncing filter providing 155 rejection of unwanted pulses from key or push button operations. You 156 can also control the multi-driver capability, pull-up and pull-down 157 feature on each I/O pin. 158 159config PINCTRL_AT91PIO4 160 bool "AT91 PIO4 pinctrl driver" 161 depends on DM 162 help 163 This option is to enable the AT91 pinctrl driver for AT91 PIO4 164 controller which is available on SAMA5D2 SoC. 165 166config PINCTRL_MAX96745 167 bool "Maxim MAX96745 pinctrl driver" 168 depends on DM && I2C_MUX_MAX96745 169 help 170 This option is to enable the pinctrl driver for Maxim 171 MAX96745. 172 173config PINCTRL_MAX96755F 174 bool "Maxim MAX96755F pinctrl driver" 175 depends on DM && I2C_MUX_MAX96755F 176 help 177 This option is to enable the pinctrl driver for Maxim 178 MAX96755F. 179 180config PINCTRL_PIC32 181 bool "Microchip PIC32 pin-control and pin-mux driver" 182 depends on DM && MACH_PIC32 183 default y 184 help 185 Supports individual pin selection and configuration for each 186 remappable peripheral available on Microchip PIC32 187 SoCs. This driver is controlled by a device tree node which 188 contains both GPIO defintion and pin control functions. 189 190config PINCTRL_QCA953X 191 bool "QCA/Athores qca953x pin control driver" 192 depends on DM && SOC_QCA953X 193 help 194 Support pin multiplexing control on QCA/Athores qca953x SoCs. 195 196 The driver is controlled by a device tree node which contains both 197 the GPIO definitions and pin control functions for each available 198 multiplex function. 199 200config PINCTRL_ROCKCHIP 201 bool "Rockchip pin control driver" 202 depends on PINCTRL_FULL && ARCH_ROCKCHIP 203 default y 204 help 205 Support pin multiplexing control on Rockchip SoCs. 206 207 The driver is controlled by a device tree node which contains both 208 the GPIO definitions and pin control functions for each available 209 multiplex function. 210 211config SPL_PINCTRL_ROCKCHIP 212 bool "Support Rockchip pin controllers in SPL" 213 depends on SPL_PINCTRL_FULL && ARCH_ROCKCHIP 214 default y 215 help 216 This option is an SPL-variant of the PINCTRL_ROCKCHIP option. 217 See the help of PINCTRL_ROCKCHIP for details. 218 219config PINCTRL_SANDBOX 220 bool "Sandbox pinctrl driver" 221 depends on SANDBOX 222 help 223 This enables pinctrl driver for sandbox. 224 225 Currently, this driver actually does nothing but print debug 226 messages when pinctrl operations are invoked. 227 228config PINCTRL_SINGLE 229 bool "Single register pin-control and pin-multiplex driver" 230 depends on DM 231 help 232 This enables pinctrl driver for systems using a single register for 233 pin configuration and multiplexing. TI's AM335X SoCs are examples of 234 such systems. 235 236 Depending on the platform make sure to also enable OF_TRANSLATE and 237 eventually SPL_OF_TRANSLATE to get correct address translations. 238 239config PINCTRL_STI 240 bool "STMicroelectronics STi pin-control and pin-mux driver" 241 depends on DM && ARCH_STI 242 default y 243 help 244 Support pin multiplexing control on STMicrolectronics STi SoCs. 245 246 The driver is controlled by a device tree node which contains both 247 the GPIO definitions and pin control functions for each available 248 multiplex function. 249 250config PINCTRL_STM32 251 bool "ST STM32 pin control driver" 252 depends on DM 253 help 254 Supports pin multiplexing control on stm32 SoCs. 255 256 The driver is controlled by a device tree node which contains both 257 the GPIO definitions and pin control functions for each available 258 multiplex function. 259 260config ASPEED_AST2500_PINCTRL 261 bool "Aspeed AST2500 pin control driver" 262 depends on DM && PINCTRL_GENERIC && ASPEED_AST2500 263 default y 264 help 265 Support pin multiplexing control on Aspeed ast2500 SoC. The driver uses 266 Generic Pinctrl framework and is compatible with the Linux driver, 267 i.e. it uses the same device tree configuration. 268 269endif 270 271source "drivers/pinctrl/meson/Kconfig" 272source "drivers/pinctrl/nxp/Kconfig" 273source "drivers/pinctrl/uniphier/Kconfig" 274source "drivers/pinctrl/exynos/Kconfig" 275source "drivers/pinctrl/mvebu/Kconfig" 276 277endmenu 278