1# 2# PINCTRL infrastructure and drivers 3# 4 5menu "Pin controllers" 6 7config PINCTRL 8 bool "Support pin controllers" 9 depends on DM 10 help 11 This enables the basic support for pinctrl framework. You may want 12 to enable some more options depending on what you want to do. 13 14config PINCTRL_FULL 15 bool "Support full pin controllers" 16 depends on PINCTRL && OF_CONTROL 17 default y 18 help 19 This provides Linux-compatible device tree interface for the pinctrl 20 subsystem. This feature depends on device tree configuration because 21 it parses a device tree to look for the pinctrl device which the 22 peripheral device is associated with. 23 24 If this option is disabled (it is the only possible choice for non-DT 25 boards), the pinctrl core provides no systematic mechanism for 26 identifying peripheral devices, applying needed pinctrl settings. 27 It is totally up to the implementation of each low-level driver. 28 You can save memory footprint in return for some limitations. 29 30config PINCTRL_GENERIC 31 bool "Support generic pin controllers" 32 depends on PINCTRL_FULL 33 default y 34 help 35 Say Y here if you want to use the pinctrl subsystem through the 36 generic DT interface. If enabled, some functions become available 37 to parse common properties such as "pins", "groups", "functions" and 38 some pin configuration parameters. It would be easier if you only 39 need the generic DT interface for pin muxing and pin configuration. 40 If you need to handle vendor-specific DT properties, you can disable 41 this option and implement your own set_state callback in the pinctrl 42 operations. 43 44config PINMUX 45 bool "Support pin multiplexing controllers" 46 depends on PINCTRL_GENERIC 47 default y 48 help 49 This option enables pin multiplexing through the generic pinctrl 50 framework. Most SoCs have their own own multiplexing arrangement 51 where a single pin can be used for several functions. An SoC pinctrl 52 driver allows the required function to be selected for each pin. 53 The driver is typically controlled by the device tree. 54 55config PINCONF 56 bool "Support pin configuration controllers" 57 depends on PINCTRL_GENERIC 58 help 59 This option enables pin configuration through the generic pinctrl 60 framework. 61 62config PINCONF_RECURSIVE 63 bool "Support recursive binding for pin configuration nodes" 64 depends on PINCTRL_FULL 65 default n if ARCH_STM32MP 66 default y 67 help 68 In the Linux pinctrl binding, the pin configuration nodes need not be 69 direct children of the pin controller device (may be grandchildren for 70 example). It is define is each individual pin controller device. 71 Say Y here if you want to keep this behavior with the pinconfig 72 u-class: all sub are recursivelly bounded. 73 If the option is disabled, this behavior is deactivated and only 74 the direct children of pin controller will be assumed as pin 75 configuration; you can save memory footprint when this feature is 76 no needed. 77 78config PINCONF_RECURSIVE 79 bool "Support recursive binding for pin configuration nodes" 80 depends on PINCTRL_FULL 81 default n if ARCH_STM32MP 82 default y 83 help 84 In the Linux pinctrl binding, the pin configuration nodes need not be 85 direct children of the pin controller device (may be grandchildren for 86 example). It is define is each individual pin controller device. 87 Say Y here if you want to keep this behavior with the pinconfig 88 u-class: all sub are recursivelly bounded. 89 If the option is disabled, this behavior is deactivated and only 90 the direct children of pin controller will be assumed as pin 91 configuration; you can save memory footprint when this feature is 92 no needed. 93 94config SPL_PINCTRL 95 bool "Support pin controllers in SPL" 96 depends on SPL && SPL_DM 97 help 98 This option is an SPL-variant of the PINCTRL option. 99 See the help of PINCTRL for details. 100 101config SPL_PINCTRL_FULL 102 bool "Support full pin controllers in SPL" 103 depends on SPL_PINCTRL && SPL_OF_CONTROL 104 default n if TARGET_STM32F746_DISCO 105 default y 106 help 107 This option is an SPL-variant of the PINCTRL_FULL option. 108 See the help of PINCTRL_FULL for details. 109 110config SPL_PINCTRL_GENERIC 111 bool "Support generic pin controllers in SPL" 112 depends on SPL_PINCTRL_FULL 113 default y 114 help 115 This option is an SPL-variant of the PINCTRL_GENERIC option. 116 See the help of PINCTRL_GENERIC for details. 117 118config SPL_PINMUX 119 bool "Support pin multiplexing controllers in SPL" 120 depends on SPL_PINCTRL_GENERIC 121 default y 122 help 123 This option is an SPL-variant of the PINMUX option. 124 See the help of PINMUX for details. 125 The pinctrl subsystem can add a substantial overhead to the SPL 126 image since it typically requires quite a few tables either in the 127 driver or in the device tree. If this is acceptable and you need 128 to adjust pin multiplexing in SPL in order to boot into U-Boot, 129 enable this option. You will need to enable device tree in SPL 130 for this to work. 131 132config SPL_PINCONF 133 bool "Support pin configuration controllers in SPL" 134 depends on SPL_PINCTRL_GENERIC 135 help 136 This option is an SPL-variant of the PINCONF option. 137 See the help of PINCONF for details. 138 139config SPL_PINCONF_RECURSIVE 140 bool "Support recursive binding for pin configuration nodes in SPL" 141 depends on SPL_PINCTRL_FULL 142 default n if ARCH_STM32MP 143 default y 144 help 145 This option is an SPL-variant of the PINCONF_RECURSIVE option. 146 See the help of PINCONF_RECURSIVE for details. 147 148config SPL_PINCONF_RECURSIVE 149 bool "Support recursive binding for pin configuration nodes in SPL" 150 depends on SPL_PINCTRL_FULL 151 default n if ARCH_STM32MP 152 default y 153 help 154 This option is an SPL-variant of the PINCONF_RECURSIVE option. 155 See the help of PINCONF_RECURSIVE for details. 156 157if PINCTRL || SPL_PINCTRL 158 159config PINCTRL_AR933X 160 bool "QCA/Athores ar933x pin control driver" 161 depends on DM && SOC_AR933X 162 help 163 Support pin multiplexing control on QCA/Athores ar933x SoCs. 164 The driver is controlled by a device tree node which contains 165 both the GPIO definitions and pin control functions for each 166 available multiplex function. 167 168config PINCTRL_AT91 169 bool "AT91 pinctrl driver" 170 depends on DM 171 help 172 This option is to enable the AT91 pinctrl driver for AT91 PIO 173 controller. 174 175 AT91 PIO controller is a combined gpio-controller, pin-mux and 176 pin-config module. Each I/O pin may be dedicated as a general-purpose 177 I/O or be assigned to a function of an embedded peripheral. Each I/O 178 pin has a glitch filter providing rejection of glitches lower than 179 one-half of peripheral clock cycle and a debouncing filter providing 180 rejection of unwanted pulses from key or push button operations. You 181 can also control the multi-driver capability, pull-up and pull-down 182 feature on each I/O pin. 183 184config PINCTRL_AT91PIO4 185 bool "AT91 PIO4 pinctrl driver" 186 depends on DM 187 help 188 This option is to enable the AT91 pinctrl driver for AT91 PIO4 189 controller which is available on SAMA5D2 SoC. 190 191config PINCTRL_MAX96745 192 bool "Maxim MAX96745 pinctrl driver" 193 depends on DM && I2C_MUX_MAX96745 194 help 195 This option is to enable the pinctrl driver for Maxim 196 MAX96745. 197 198config PINCTRL_MAX96755F 199 bool "Maxim MAX96755F pinctrl driver" 200 depends on DM && I2C_MUX_MAX96755F 201 help 202 This option is to enable the pinctrl driver for Maxim 203 MAX96755F. 204 205config PINCTRL_PIC32 206 bool "Microchip PIC32 pin-control and pin-mux driver" 207 depends on DM && MACH_PIC32 208 default y 209 help 210 Supports individual pin selection and configuration for each 211 remappable peripheral available on Microchip PIC32 212 SoCs. This driver is controlled by a device tree node which 213 contains both GPIO defintion and pin control functions. 214 215config PINCTRL_QCA953X 216 bool "QCA/Athores qca953x pin control driver" 217 depends on DM && SOC_QCA953X 218 help 219 Support pin multiplexing control on QCA/Athores qca953x SoCs. 220 221 The driver is controlled by a device tree node which contains both 222 the GPIO definitions and pin control functions for each available 223 multiplex function. 224 225config PINCTRL_ROCKCHIP 226 bool "Rockchip pin control driver" 227 depends on PINCTRL_FULL && ARCH_ROCKCHIP 228 default y 229 help 230 Support pin multiplexing control on Rockchip SoCs. 231 232 The driver is controlled by a device tree node which contains both 233 the GPIO definitions and pin control functions for each available 234 multiplex function. 235 236config SPL_PINCTRL_ROCKCHIP 237 bool "Support Rockchip pin controllers in SPL" 238 depends on SPL_PINCTRL_FULL && ARCH_ROCKCHIP 239 default y 240 help 241 This option is an SPL-variant of the PINCTRL_ROCKCHIP option. 242 See the help of PINCTRL_ROCKCHIP for details. 243 244config PINCTRL_SANDBOX 245 bool "Sandbox pinctrl driver" 246 depends on SANDBOX 247 help 248 This enables pinctrl driver for sandbox. 249 250 Currently, this driver actually does nothing but print debug 251 messages when pinctrl operations are invoked. 252 253config PINCTRL_SINGLE 254 bool "Single register pin-control and pin-multiplex driver" 255 depends on DM 256 help 257 This enables pinctrl driver for systems using a single register for 258 pin configuration and multiplexing. TI's AM335X SoCs are examples of 259 such systems. 260 261 Depending on the platform make sure to also enable OF_TRANSLATE and 262 eventually SPL_OF_TRANSLATE to get correct address translations. 263 264config PINCTRL_STI 265 bool "STMicroelectronics STi pin-control and pin-mux driver" 266 depends on DM && ARCH_STI 267 default y 268 help 269 Support pin multiplexing control on STMicrolectronics STi SoCs. 270 271 The driver is controlled by a device tree node which contains both 272 the GPIO definitions and pin control functions for each available 273 multiplex function. 274 275config PINCTRL_STM32 276 bool "ST STM32 pin control driver" 277 depends on DM 278 help 279 Supports pin multiplexing control on stm32 SoCs. 280 281 The driver is controlled by a device tree node which contains both 282 the GPIO definitions and pin control functions for each available 283 multiplex function. 284 285config ASPEED_AST2500_PINCTRL 286 bool "Aspeed AST2500 pin control driver" 287 depends on DM && PINCTRL_GENERIC && ASPEED_AST2500 288 default y 289 help 290 Support pin multiplexing control on Aspeed ast2500 SoC. The driver uses 291 Generic Pinctrl framework and is compatible with the Linux driver, 292 i.e. it uses the same device tree configuration. 293 294endif 295 296source "drivers/pinctrl/meson/Kconfig" 297source "drivers/pinctrl/nxp/Kconfig" 298source "drivers/pinctrl/uniphier/Kconfig" 299source "drivers/pinctrl/exynos/Kconfig" 300source "drivers/pinctrl/mvebu/Kconfig" 301 302endmenu 303