xref: /rk3399_rockchip-uboot/drivers/pci/pci_compat.c (revision ff3e077bd23c37c83d01aad105e528194e33d75e)
1*ff3e077bSSimon Glass /*
2*ff3e077bSSimon Glass  * Compatibility functions for pre-driver-model code
3*ff3e077bSSimon Glass  *
4*ff3e077bSSimon Glass  * Copyright (C) 2014 Google, Inc
5*ff3e077bSSimon Glass  *
6*ff3e077bSSimon Glass  * SPDX-License-Identifier:	GPL-2.0+
7*ff3e077bSSimon Glass  */
8*ff3e077bSSimon Glass #define DEBUG
9*ff3e077bSSimon Glass #include <common.h>
10*ff3e077bSSimon Glass #include <dm.h>
11*ff3e077bSSimon Glass #include <errno.h>
12*ff3e077bSSimon Glass #include <malloc.h>
13*ff3e077bSSimon Glass #include <pci.h>
14*ff3e077bSSimon Glass #include <dm/device-internal.h>
15*ff3e077bSSimon Glass #include <dm/lists.h>
16*ff3e077bSSimon Glass 
17*ff3e077bSSimon Glass #define PCI_HOSE_OP(rw, name, size, type)				\
18*ff3e077bSSimon Glass int pci_hose_##rw##_config_##name(struct pci_controller *hose,		\
19*ff3e077bSSimon Glass 				  pci_dev_t dev,			\
20*ff3e077bSSimon Glass 				  int offset, type value)		\
21*ff3e077bSSimon Glass {									\
22*ff3e077bSSimon Glass 	return pci_##rw##_config##size(dev, offset, value);		\
23*ff3e077bSSimon Glass }
24*ff3e077bSSimon Glass 
25*ff3e077bSSimon Glass PCI_HOSE_OP(read, byte, 8, u8 *)
26*ff3e077bSSimon Glass PCI_HOSE_OP(read, word, 16, u16 *)
27*ff3e077bSSimon Glass PCI_HOSE_OP(read, dword, 32, u32 *)
28*ff3e077bSSimon Glass PCI_HOSE_OP(write, byte, 8, u8)
29*ff3e077bSSimon Glass PCI_HOSE_OP(write, word, 16, u16)
30*ff3e077bSSimon Glass PCI_HOSE_OP(write, dword, 32, u32)
31*ff3e077bSSimon Glass 
32*ff3e077bSSimon Glass pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)
33*ff3e077bSSimon Glass {
34*ff3e077bSSimon Glass 	struct pci_child_platdata *pplat;
35*ff3e077bSSimon Glass 	struct udevice *bus, *dev;
36*ff3e077bSSimon Glass 
37*ff3e077bSSimon Glass 	if (pci_find_device_id(ids, index, &dev))
38*ff3e077bSSimon Glass 		return -1;
39*ff3e077bSSimon Glass 	bus = dev->parent;
40*ff3e077bSSimon Glass 	pplat = dev_get_parent_platdata(dev);
41*ff3e077bSSimon Glass 
42*ff3e077bSSimon Glass 	return PCI_ADD_BUS(bus->seq, pplat->devfn);
43*ff3e077bSSimon Glass }
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