1 /* 2 * (C) Copyright 2007 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #include <common.h> 26 #include <net.h> 27 #include <config.h> 28 #include <asm/io.h> 29 30 #ifdef XILINX_EMACLITE_BASEADDR 31 32 #undef DEBUG 33 34 #define ENET_MAX_MTU PKTSIZE 35 #define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN 36 #define ENET_ADDR_LENGTH 6 37 38 /* EmacLite constants */ 39 #define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */ 40 #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */ 41 #define XEL_TSR_OFFSET 0x07FC /* Tx status */ 42 #define XEL_RSR_OFFSET 0x17FC /* Rx status */ 43 #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */ 44 45 /* Xmit complete */ 46 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL 47 /* Xmit interrupt enable bit */ 48 #define XEL_TSR_XMIT_IE_MASK 0x00000008UL 49 /* Buffer is active, SW bit only */ 50 #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL 51 /* Program the MAC address */ 52 #define XEL_TSR_PROGRAM_MASK 0x00000002UL 53 /* define for programming the MAC address into the EMAC Lite */ 54 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) 55 56 /* Transmit packet length upper byte */ 57 #define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL 58 /* Transmit packet length lower byte */ 59 #define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL 60 61 /* Recv complete */ 62 #define XEL_RSR_RECV_DONE_MASK 0x00000001UL 63 /* Recv interrupt enable bit */ 64 #define XEL_RSR_RECV_IE_MASK 0x00000008UL 65 66 typedef struct { 67 unsigned int BaseAddress; /* Base address for device (IPIF) */ 68 unsigned int NextTxBufferToUse; /* Next TX buffer to write to */ 69 unsigned int NextRxBufferToUse; /* Next RX buffer to read from */ 70 unsigned char DeviceId; /* Unique ID of device - for future */ 71 } XEmacLite; 72 73 static XEmacLite EmacLite; 74 75 static char etherrxbuff[PKTSIZE_ALIGN]; /* Receive buffer */ 76 77 /* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/ 78 #ifdef CFG_ENV_IS_NOWHERE 79 static u8 EMACAddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; 80 #endif 81 82 void XEmacLite_AlignedRead (u32 * SrcPtr, void *DestPtr, unsigned ByteCount) 83 { 84 unsigned i; 85 unsigned Length = ByteCount; 86 u32 AlignBuffer; 87 u32 *To32Ptr; 88 u32 *From32Ptr; 89 u8 *To8Ptr; 90 u8 *From8Ptr; 91 92 From32Ptr = (u32 *) SrcPtr; 93 94 /* Word aligned buffer, no correction needed. */ 95 To32Ptr = (u32 *) DestPtr; 96 while (Length > 3) { 97 *To32Ptr++ = *From32Ptr++; 98 Length -= 4; 99 } 100 To8Ptr = (u8 *) To32Ptr; 101 102 AlignBuffer = *From32Ptr++; 103 From8Ptr = (u8 *) & AlignBuffer; 104 105 for (i = 0; i < Length; i++) { 106 *To8Ptr++ = *From8Ptr++; 107 } 108 } 109 110 void XEmacLite_AlignedWrite (void *SrcPtr, u32 * DestPtr, unsigned ByteCount) 111 { 112 unsigned i; 113 unsigned Length = ByteCount; 114 u32 AlignBuffer; 115 u32 *To32Ptr; 116 u32 *From32Ptr; 117 u8 *To8Ptr; 118 u8 *From8Ptr; 119 To32Ptr = DestPtr; 120 121 From32Ptr = (u32 *) SrcPtr; 122 while (Length > 3) { 123 124 *To32Ptr++ = *From32Ptr++; 125 Length -= 4; 126 } 127 128 AlignBuffer = 0; 129 To8Ptr = (u8 *) & AlignBuffer; 130 From8Ptr = (u8 *) From32Ptr; 131 132 for (i = 0; i < Length; i++) { 133 *To8Ptr++ = *From8Ptr++; 134 } 135 136 *To32Ptr++ = AlignBuffer; 137 } 138 139 void eth_halt (void) 140 { 141 #ifdef DEBUG 142 puts ("eth_halt\n"); 143 #endif 144 } 145 146 int eth_init (bd_t * bis) 147 { 148 #ifdef DEBUG 149 puts ("EmacLite Initialization Started\n"); 150 #endif 151 memset (&EmacLite, 0, sizeof (XEmacLite)); 152 EmacLite.BaseAddress = XILINX_EMACLITE_BASEADDR; 153 154 #ifdef CFG_ENV_IS_NOWHERE 155 memcpy (bis->bi_enetaddr, EMACAddr, ENET_ADDR_LENGTH); 156 #endif 157 /* 158 * TX - TX_PING & TX_PONG initialization 159 */ 160 /* Restart PING TX */ 161 out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET, 0); 162 /* Copy MAC address */ 163 XEmacLite_AlignedWrite (bis->bi_enetaddr, 164 EmacLite.BaseAddress, ENET_ADDR_LENGTH); 165 /* Set the length */ 166 out_be32 (EmacLite.BaseAddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); 167 /* Update the MAC address in the EMAC Lite */ 168 out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR); 169 /* Wait for EMAC Lite to finish with the MAC address update */ 170 while ((in_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET) & 171 XEL_TSR_PROG_MAC_ADDR) != 0) ; 172 173 #ifdef XILINX_EMACLITE_TX_PING_PONG 174 /* The same operation with PONG TX */ 175 out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0); 176 XEmacLite_AlignedWrite (bis->bi_enetaddr, 177 EmacLite.BaseAddress + XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH); 178 out_be32 (EmacLite.BaseAddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); 179 out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 180 XEL_TSR_PROG_MAC_ADDR); 181 while ((in_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + 182 XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0) ; 183 #endif 184 185 /* 186 * RX - RX_PING & RX_PONG initialization 187 */ 188 /* Write out the value to flush the RX buffer */ 189 out_be32 (EmacLite.BaseAddress + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK); 190 #ifdef XILINX_EMACLITE_RX_PING_PONG 191 out_be32 (EmacLite.BaseAddress + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET, 192 XEL_RSR_RECV_IE_MASK); 193 #endif 194 195 #ifdef DEBUG 196 puts ("EmacLite Initialization complete\n"); 197 #endif 198 return 0; 199 } 200 201 int XEmacLite_TxBufferAvailable (XEmacLite * InstancePtr) 202 { 203 u32 Register; 204 u32 TxPingBusy; 205 u32 TxPongBusy; 206 /* 207 * Read the other buffer register 208 * and determine if the other buffer is available 209 */ 210 Register = in_be32 (InstancePtr->BaseAddress + 211 InstancePtr->NextTxBufferToUse + 0); 212 TxPingBusy = ((Register & XEL_TSR_XMIT_BUSY_MASK) == 213 XEL_TSR_XMIT_BUSY_MASK); 214 215 Register = in_be32 (InstancePtr->BaseAddress + 216 (InstancePtr->NextTxBufferToUse ^ XEL_TSR_OFFSET) + 0); 217 TxPongBusy = ((Register & XEL_TSR_XMIT_BUSY_MASK) == 218 XEL_TSR_XMIT_BUSY_MASK); 219 220 return (!(TxPingBusy && TxPongBusy)); 221 } 222 223 int eth_send (volatile void *ptr, int len) { 224 225 unsigned int Register; 226 unsigned int BaseAddress; 227 228 unsigned maxtry = 1000; 229 230 if (len > ENET_MAX_MTU) 231 len = ENET_MAX_MTU; 232 233 while (!XEmacLite_TxBufferAvailable (&EmacLite) && maxtry) { 234 udelay (10); 235 maxtry--; 236 } 237 238 if (!maxtry) { 239 printf ("Error: Timeout waiting for ethernet TX buffer\n"); 240 /* Restart PING TX */ 241 out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET, 0); 242 #ifdef XILINX_EMACLITE_TX_PING_PONG 243 out_be32 (EmacLite.BaseAddress + XEL_TSR_OFFSET + 244 XEL_BUFFER_OFFSET, 0); 245 #endif 246 return 0; 247 } 248 249 /* Determine the expected TX buffer address */ 250 BaseAddress = (EmacLite.BaseAddress + EmacLite.NextTxBufferToUse); 251 252 /* Determine if the expected buffer address is empty */ 253 Register = in_be32 (BaseAddress + XEL_TSR_OFFSET); 254 if (((Register & XEL_TSR_XMIT_BUSY_MASK) == 0) 255 && ((in_be32 ((BaseAddress) + XEL_TSR_OFFSET) 256 & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { 257 258 #ifdef XILINX_EMACLITE_TX_PING_PONG 259 EmacLite.NextTxBufferToUse ^= XEL_BUFFER_OFFSET; 260 #endif 261 #ifdef DEBUG 262 printf ("Send packet from 0x%x\n", BaseAddress); 263 #endif 264 /* Write the frame to the buffer */ 265 XEmacLite_AlignedWrite (ptr, (u32 *) BaseAddress, len); 266 out_be32 (BaseAddress + XEL_TPLR_OFFSET,(len & 267 (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); 268 Register = in_be32 (BaseAddress + XEL_TSR_OFFSET); 269 Register |= XEL_TSR_XMIT_BUSY_MASK; 270 if ((Register & XEL_TSR_XMIT_IE_MASK) != 0) { 271 Register |= XEL_TSR_XMIT_ACTIVE_MASK; 272 } 273 out_be32 (BaseAddress + XEL_TSR_OFFSET, Register); 274 return 1; 275 } 276 #ifdef XILINX_EMACLITE_TX_PING_PONG 277 /* Switch to second buffer */ 278 BaseAddress ^= XEL_BUFFER_OFFSET; 279 /* Determine if the expected buffer address is empty */ 280 Register = in_be32 (BaseAddress + XEL_TSR_OFFSET); 281 if (((Register & XEL_TSR_XMIT_BUSY_MASK) == 0) 282 && ((in_be32 ((BaseAddress) + XEL_TSR_OFFSET) 283 & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { 284 #ifdef DEBUG 285 printf ("Send packet from 0x%x\n", BaseAddress); 286 #endif 287 /* Write the frame to the buffer */ 288 XEmacLite_AlignedWrite (ptr, (u32 *) BaseAddress, len); 289 out_be32 (BaseAddress + XEL_TPLR_OFFSET,(len & 290 (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); 291 Register = in_be32 (BaseAddress + XEL_TSR_OFFSET); 292 Register |= XEL_TSR_XMIT_BUSY_MASK; 293 if ((Register & XEL_TSR_XMIT_IE_MASK) != 0) { 294 Register |= XEL_TSR_XMIT_ACTIVE_MASK; 295 } 296 out_be32 (BaseAddress + XEL_TSR_OFFSET, Register); 297 return 1; 298 } 299 #endif 300 puts ("Error while sending frame\n"); 301 return 0; 302 } 303 304 int eth_rx (void) 305 { 306 unsigned int Length; 307 unsigned int Register; 308 unsigned int BaseAddress; 309 310 BaseAddress = EmacLite.BaseAddress + EmacLite.NextRxBufferToUse; 311 Register = in_be32 (BaseAddress + XEL_RSR_OFFSET); 312 #ifdef DEBUG 313 printf ("Testing data at address 0x%x\n", BaseAddress); 314 #endif 315 if ((Register & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { 316 #ifdef XILINX_EMACLITE_RX_PING_PONG 317 EmacLite.NextRxBufferToUse ^= XEL_BUFFER_OFFSET; 318 #endif 319 } else { 320 #ifndef XILINX_EMACLITE_RX_PING_PONG 321 #ifdef DEBUG 322 printf ("No data was available - address 0x%x\n", BaseAddress); 323 #endif 324 return 0; 325 #else 326 BaseAddress ^= XEL_BUFFER_OFFSET; 327 Register = in_be32 (BaseAddress + XEL_RSR_OFFSET); 328 if ((Register & XEL_RSR_RECV_DONE_MASK) != 329 XEL_RSR_RECV_DONE_MASK) { 330 #ifdef DEBUG 331 printf ("No data was available - address 0x%x\n", 332 BaseAddress); 333 #endif 334 return 0; 335 } 336 #endif 337 } 338 /* Get the length of the frame that arrived */ 339 switch(((in_be32(BaseAddress + XEL_RXBUFF_OFFSET + 0xC)) & 340 0xFFFF0000 ) >> 16) { 341 case 0x806: 342 Length = 42 + 20; /* FIXME size of ARP */ 343 #ifdef DEBUG 344 puts ("ARP Packet\n"); 345 #endif 346 break; 347 case 0x800: 348 Length = 14 + 14 + 349 (((in_be32(BaseAddress + XEL_RXBUFF_OFFSET + 0x10)) & 350 0xFFFF0000) >> 16); /* FIXME size of IP packet */ 351 #ifdef DEBUG 352 puts("IP Packet\n"); 353 #endif 354 break; 355 default: 356 #ifdef DEBUG 357 puts("Other Packet\n"); 358 #endif 359 Length = ENET_MAX_MTU; 360 break; 361 } 362 363 XEmacLite_AlignedRead ((BaseAddress + XEL_RXBUFF_OFFSET), 364 etherrxbuff, Length); 365 366 /* Acknowledge the frame */ 367 Register = in_be32 (BaseAddress + XEL_RSR_OFFSET); 368 Register &= ~XEL_RSR_RECV_DONE_MASK; 369 out_be32 (BaseAddress + XEL_RSR_OFFSET, Register); 370 371 #ifdef DEBUG 372 printf ("Packet receive from 0x%x, length %dB\n", BaseAddress, Length); 373 #endif 374 NetReceive ((uchar *) etherrxbuff, Length); 375 return 1; 376 377 } 378 #endif 379