1 /* 2 * (C) Copyright 2007 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #include <common.h> 26 #include <net.h> 27 #include <config.h> 28 #include <asm/io.h> 29 30 #ifdef XILINX_EMACLITE_BASEADDR 31 32 #undef DEBUG 33 34 #define ENET_MAX_MTU PKTSIZE 35 #define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN 36 #define ENET_ADDR_LENGTH 6 37 38 /* EmacLite constants */ 39 #define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */ 40 #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */ 41 #define XEL_TSR_OFFSET 0x07FC /* Tx status */ 42 #define XEL_RSR_OFFSET 0x17FC /* Rx status */ 43 #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */ 44 45 /* Xmit complete */ 46 #define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL 47 /* Xmit interrupt enable bit */ 48 #define XEL_TSR_XMIT_IE_MASK 0x00000008UL 49 /* Buffer is active, SW bit only */ 50 #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL 51 /* Program the MAC address */ 52 #define XEL_TSR_PROGRAM_MASK 0x00000002UL 53 /* define for programming the MAC address into the EMAC Lite */ 54 #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) 55 56 /* Transmit packet length upper byte */ 57 #define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL 58 /* Transmit packet length lower byte */ 59 #define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL 60 61 /* Recv complete */ 62 #define XEL_RSR_RECV_DONE_MASK 0x00000001UL 63 /* Recv interrupt enable bit */ 64 #define XEL_RSR_RECV_IE_MASK 0x00000008UL 65 66 typedef struct { 67 unsigned int baseaddress; /* Base address for device (IPIF) */ 68 unsigned int nexttxbuffertouse; /* Next TX buffer to write to */ 69 unsigned int nextrxbuffertouse; /* Next RX buffer to read from */ 70 unsigned char deviceid; /* Unique ID of device - for future */ 71 } xemaclite; 72 73 static xemaclite emaclite; 74 75 static char etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ 76 77 /* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/ 78 #ifdef CFG_ENV_IS_NOWHERE 79 static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; 80 #endif 81 82 void xemaclite_alignedread (u32 * srcptr, void *destptr, unsigned bytecount) 83 { 84 unsigned int i; 85 u32 alignbuffer; 86 u32 *to32ptr; 87 u32 *from32ptr; 88 u8 *to8ptr; 89 u8 *from8ptr; 90 91 from32ptr = (u32 *) srcptr; 92 93 /* Word aligned buffer, no correction needed. */ 94 to32ptr = (u32 *) destptr; 95 while (bytecount > 3) { 96 *to32ptr++ = *from32ptr++; 97 bytecount -= 4; 98 } 99 to8ptr = (u8 *) to32ptr; 100 101 alignbuffer = *from32ptr++; 102 from8ptr = (u8 *) & alignbuffer; 103 104 for (i = 0; i < bytecount; i++) { 105 *to8ptr++ = *from8ptr++; 106 } 107 } 108 109 void xemaclite_alignedwrite (void *srcptr, u32 destptr, unsigned bytecount) 110 { 111 unsigned i; 112 u32 alignbuffer; 113 u32 *to32ptr = (u32 *) destptr; 114 u32 *from32ptr; 115 u8 *to8ptr; 116 u8 *from8ptr; 117 118 from32ptr = (u32 *) srcptr; 119 while (bytecount > 3) { 120 121 *to32ptr++ = *from32ptr++; 122 bytecount -= 4; 123 } 124 125 alignbuffer = 0; 126 to8ptr = (u8 *) & alignbuffer; 127 from8ptr = (u8 *) from32ptr; 128 129 for (i = 0; i < bytecount; i++) { 130 *to8ptr++ = *from8ptr++; 131 } 132 133 *to32ptr++ = alignbuffer; 134 } 135 136 void eth_halt (void) 137 { 138 #ifdef DEBUG 139 puts ("eth_halt\n"); 140 #endif 141 } 142 143 int eth_init (bd_t * bis) 144 { 145 #ifdef DEBUG 146 puts ("EmacLite Initialization Started\n"); 147 #endif 148 memset (&emaclite, 0, sizeof (xemaclite)); 149 emaclite.baseaddress = XILINX_EMACLITE_BASEADDR; 150 151 if (!getenv("ethaddr")) { 152 memcpy(bis->bi_enetaddr, emacaddr, ENET_ADDR_LENGTH); 153 } 154 155 /* 156 * TX - TX_PING & TX_PONG initialization 157 */ 158 /* Restart PING TX */ 159 out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); 160 /* Copy MAC address */ 161 xemaclite_alignedwrite (bis->bi_enetaddr, 162 emaclite.baseaddress, ENET_ADDR_LENGTH); 163 /* Set the length */ 164 out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); 165 /* Update the MAC address in the EMAC Lite */ 166 out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR); 167 /* Wait for EMAC Lite to finish with the MAC address update */ 168 while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET) & 169 XEL_TSR_PROG_MAC_ADDR) != 0) ; 170 171 #ifdef XILINX_EMACLITE_TX_PING_PONG 172 /* The same operation with PONG TX */ 173 out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0); 174 xemaclite_alignedwrite (bis->bi_enetaddr, emaclite.baseaddress + 175 XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH); 176 out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); 177 out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 178 XEL_TSR_PROG_MAC_ADDR); 179 while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + 180 XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0) ; 181 #endif 182 183 /* 184 * RX - RX_PING & RX_PONG initialization 185 */ 186 /* Write out the value to flush the RX buffer */ 187 out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK); 188 #ifdef XILINX_EMACLITE_RX_PING_PONG 189 out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET, 190 XEL_RSR_RECV_IE_MASK); 191 #endif 192 193 #ifdef DEBUG 194 puts ("EmacLite Initialization complete\n"); 195 #endif 196 return 0; 197 } 198 199 int xemaclite_txbufferavailable (xemaclite * instanceptr) 200 { 201 u32 reg; 202 u32 txpingbusy; 203 u32 txpongbusy; 204 /* 205 * Read the other buffer register 206 * and determine if the other buffer is available 207 */ 208 reg = in_be32 (instanceptr->baseaddress + 209 instanceptr->nexttxbuffertouse + 0); 210 txpingbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == 211 XEL_TSR_XMIT_BUSY_MASK); 212 213 reg = in_be32 (instanceptr->baseaddress + 214 (instanceptr->nexttxbuffertouse ^ XEL_TSR_OFFSET) + 0); 215 txpongbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == 216 XEL_TSR_XMIT_BUSY_MASK); 217 218 return (!(txpingbusy && txpongbusy)); 219 } 220 221 int eth_send (volatile void *ptr, int len) { 222 223 unsigned int reg; 224 unsigned int baseaddress; 225 226 unsigned maxtry = 1000; 227 228 if (len > ENET_MAX_MTU) 229 len = ENET_MAX_MTU; 230 231 while (!xemaclite_txbufferavailable (&emaclite) && maxtry) { 232 udelay (10); 233 maxtry--; 234 } 235 236 if (!maxtry) { 237 printf ("Error: Timeout waiting for ethernet TX buffer\n"); 238 /* Restart PING TX */ 239 out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); 240 #ifdef XILINX_EMACLITE_TX_PING_PONG 241 out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + 242 XEL_BUFFER_OFFSET, 0); 243 #endif 244 return 0; 245 } 246 247 /* Determine the expected TX buffer address */ 248 baseaddress = (emaclite.baseaddress + emaclite.nexttxbuffertouse); 249 250 /* Determine if the expected buffer address is empty */ 251 reg = in_be32 (baseaddress + XEL_TSR_OFFSET); 252 if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) 253 && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) 254 & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { 255 256 #ifdef XILINX_EMACLITE_TX_PING_PONG 257 emaclite.nexttxbuffertouse ^= XEL_BUFFER_OFFSET; 258 #endif 259 #ifdef DEBUG 260 printf ("Send packet from 0x%x\n", baseaddress); 261 #endif 262 /* Write the frame to the buffer */ 263 xemaclite_alignedwrite ((void *) ptr, baseaddress, len); 264 out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & 265 (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); 266 reg = in_be32 (baseaddress + XEL_TSR_OFFSET); 267 reg |= XEL_TSR_XMIT_BUSY_MASK; 268 if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { 269 reg |= XEL_TSR_XMIT_ACTIVE_MASK; 270 } 271 out_be32 (baseaddress + XEL_TSR_OFFSET, reg); 272 return 1; 273 } 274 #ifdef XILINX_EMACLITE_TX_PING_PONG 275 /* Switch to second buffer */ 276 baseaddress ^= XEL_BUFFER_OFFSET; 277 /* Determine if the expected buffer address is empty */ 278 reg = in_be32 (baseaddress + XEL_TSR_OFFSET); 279 if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) 280 && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) 281 & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { 282 #ifdef DEBUG 283 printf ("Send packet from 0x%x\n", baseaddress); 284 #endif 285 /* Write the frame to the buffer */ 286 xemaclite_alignedwrite ((void *) ptr, baseaddress, len); 287 out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & 288 (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); 289 reg = in_be32 (baseaddress + XEL_TSR_OFFSET); 290 reg |= XEL_TSR_XMIT_BUSY_MASK; 291 if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { 292 reg |= XEL_TSR_XMIT_ACTIVE_MASK; 293 } 294 out_be32 (baseaddress + XEL_TSR_OFFSET, reg); 295 return 1; 296 } 297 #endif 298 puts ("Error while sending frame\n"); 299 return 0; 300 } 301 302 int eth_rx (void) 303 { 304 unsigned int length; 305 unsigned int reg; 306 unsigned int baseaddress; 307 308 baseaddress = emaclite.baseaddress + emaclite.nextrxbuffertouse; 309 reg = in_be32 (baseaddress + XEL_RSR_OFFSET); 310 #ifdef DEBUG 311 printf ("Testing data at address 0x%x\n", baseaddress); 312 #endif 313 if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { 314 #ifdef XILINX_EMACLITE_RX_PING_PONG 315 emaclite.nextrxbuffertouse ^= XEL_BUFFER_OFFSET; 316 #endif 317 } else { 318 #ifndef XILINX_EMACLITE_RX_PING_PONG 319 #ifdef DEBUG 320 printf ("No data was available - address 0x%x\n", baseaddress); 321 #endif 322 return 0; 323 #else 324 baseaddress ^= XEL_BUFFER_OFFSET; 325 reg = in_be32 (baseaddress + XEL_RSR_OFFSET); 326 if ((reg & XEL_RSR_RECV_DONE_MASK) != 327 XEL_RSR_RECV_DONE_MASK) { 328 #ifdef DEBUG 329 printf ("No data was available - address 0x%x\n", 330 baseaddress); 331 #endif 332 return 0; 333 } 334 #endif 335 } 336 /* Get the length of the frame that arrived */ 337 switch(((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC)) & 338 0xFFFF0000 ) >> 16) { 339 case 0x806: 340 length = 42 + 20; /* FIXME size of ARP */ 341 #ifdef DEBUG 342 puts ("ARP Packet\n"); 343 #endif 344 break; 345 case 0x800: 346 length = 14 + 14 + 347 (((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10)) & 348 0xFFFF0000) >> 16); /* FIXME size of IP packet */ 349 #ifdef DEBUG 350 puts("IP Packet\n"); 351 #endif 352 break; 353 default: 354 #ifdef DEBUG 355 puts("Other Packet\n"); 356 #endif 357 length = ENET_MAX_MTU; 358 break; 359 } 360 361 xemaclite_alignedread ((u32 *) (baseaddress + XEL_RXBUFF_OFFSET), 362 etherrxbuff, length); 363 364 /* Acknowledge the frame */ 365 reg = in_be32 (baseaddress + XEL_RSR_OFFSET); 366 reg &= ~XEL_RSR_RECV_DONE_MASK; 367 out_be32 (baseaddress + XEL_RSR_OFFSET, reg); 368 369 #ifdef DEBUG 370 printf ("Packet receive from 0x%x, length %dB\n", baseaddress, length); 371 #endif 372 NetReceive ((uchar *) etherrxbuff, length); 373 return 1; 374 375 } 376 #endif 377