xref: /rk3399_rockchip-uboot/drivers/net/phy/teranetics.c (revision 2339e4972f55c9daa0d0e297ad3378c53e2f6fc3)
19082eeacSAndy Fleming /*
29082eeacSAndy Fleming  * Teranetics PHY drivers
39082eeacSAndy Fleming  *
49082eeacSAndy Fleming  * This program is free software; you can redistribute it and/or
59082eeacSAndy Fleming  * modify it under the terms of the GNU General Public License as
69082eeacSAndy Fleming  * published by the Free Software Foundation; either version 2 of
79082eeacSAndy Fleming  * the License, or (at your option) any later version.
89082eeacSAndy Fleming  *
99082eeacSAndy Fleming  * This program is distributed in the hope that it will be useful,
109082eeacSAndy Fleming  * but WITHOUT ANY WARRANTY; without even the implied warranty of
119082eeacSAndy Fleming  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
129082eeacSAndy Fleming  * GNU General Public License for more details.
139082eeacSAndy Fleming  *
149082eeacSAndy Fleming  * You should have received a copy of the GNU General Public License
159082eeacSAndy Fleming  * along with this program; if not, write to the Free Software
169082eeacSAndy Fleming  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
179082eeacSAndy Fleming  * MA 02111-1307 USA
189082eeacSAndy Fleming  *
199082eeacSAndy Fleming  * Copyright 2010-2011 Freescale Semiconductor, Inc.
209082eeacSAndy Fleming  * author Andy Fleming
219082eeacSAndy Fleming  *
229082eeacSAndy Fleming  */
239082eeacSAndy Fleming #include <config.h>
24*2339e497STimur Tabi #include <common.h>
259082eeacSAndy Fleming #include <phy.h>
269082eeacSAndy Fleming 
279082eeacSAndy Fleming #ifndef CONFIG_PHYLIB_10G
289082eeacSAndy Fleming #error The Teranetics PHY needs 10G support
299082eeacSAndy Fleming #endif
309082eeacSAndy Fleming 
319082eeacSAndy Fleming int tn2020_config(struct phy_device *phydev)
329082eeacSAndy Fleming {
339082eeacSAndy Fleming 	if (phydev->port == PORT_FIBRE) {
349082eeacSAndy Fleming 		unsigned short restart_an = (MDIO_AN_CTRL1_RESTART |
359082eeacSAndy Fleming 						MDIO_AN_CTRL1_ENABLE |
369082eeacSAndy Fleming 						MDIO_AN_CTRL1_XNP);
379082eeacSAndy Fleming 
389082eeacSAndy Fleming 		phy_write(phydev, 30, 93, 2);
399082eeacSAndy Fleming 		phy_write(phydev, MDIO_MMD_AN, MDIO_CTRL1, restart_an);
409082eeacSAndy Fleming 	}
419082eeacSAndy Fleming 
429082eeacSAndy Fleming 	return 0;
439082eeacSAndy Fleming }
449082eeacSAndy Fleming 
45ebfdacb4SAndy Fleming int tn2020_startup(struct phy_device *phydev)
46ebfdacb4SAndy Fleming {
47*2339e497STimur Tabi 	unsigned int timeout = 5 * 1000; /* 5 second timeout */
48*2339e497STimur Tabi 
49*2339e497STimur Tabi #define MDIO_PHYXS_LANE_READY (MDIO_PHYXS_LNSTAT_SYNC0 | \
50*2339e497STimur Tabi 			       MDIO_PHYXS_LNSTAT_SYNC1 | \
51*2339e497STimur Tabi 			       MDIO_PHYXS_LNSTAT_SYNC2 | \
52*2339e497STimur Tabi 			       MDIO_PHYXS_LNSTAT_SYNC3 | \
53*2339e497STimur Tabi 			       MDIO_PHYXS_LNSTAT_ALIGN)
54*2339e497STimur Tabi 
55*2339e497STimur Tabi 	/*
56*2339e497STimur Tabi 	 * Wait for the XAUI-SERDES lanes to align first.  Under normal
57*2339e497STimur Tabi 	 * circumstances, this can take up to three seconds.
58*2339e497STimur Tabi 	 */
59*2339e497STimur Tabi 	while (--timeout) {
60*2339e497STimur Tabi 		int reg = phy_read(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT);
61*2339e497STimur Tabi 		if (reg < 0) {
62*2339e497STimur Tabi 			printf("TN2020: Error reading from PHY at "
63*2339e497STimur Tabi 			       "address %u\n", phydev->addr);
64*2339e497STimur Tabi 			break;
65*2339e497STimur Tabi 		}
66*2339e497STimur Tabi 		if ((reg & MDIO_PHYXS_LANE_READY) == MDIO_PHYXS_LANE_READY)
67*2339e497STimur Tabi 			break;
68*2339e497STimur Tabi 		udelay(1000);
69*2339e497STimur Tabi 	}
70*2339e497STimur Tabi 	if (!timeout) {
71*2339e497STimur Tabi 		/*
72*2339e497STimur Tabi 		 * A timeout is bad, but it may not be fatal, so don't
73*2339e497STimur Tabi 		 * return an error.  Display a warning instead.
74*2339e497STimur Tabi 		 */
75*2339e497STimur Tabi 		printf("TN2020: Timeout waiting for PHY at address %u to "
76*2339e497STimur Tabi 		       "align.\n", phydev->addr);
77*2339e497STimur Tabi 	}
78*2339e497STimur Tabi 
79ebfdacb4SAndy Fleming 	if (phydev->port != PORT_FIBRE)
80ebfdacb4SAndy Fleming 		return gen10g_startup(phydev);
81ebfdacb4SAndy Fleming 
82ebfdacb4SAndy Fleming 	/*
83ebfdacb4SAndy Fleming 	 * The TN2020 only pretends to support fiber.
84ebfdacb4SAndy Fleming 	 * It works, but it doesn't look like it works,
85ebfdacb4SAndy Fleming 	 * so the link status reports no link.
86ebfdacb4SAndy Fleming 	 */
87ebfdacb4SAndy Fleming 	phydev->link = 1;
88ebfdacb4SAndy Fleming 
89ebfdacb4SAndy Fleming 	/* For now just lie and say it's 10G all the time */
90ebfdacb4SAndy Fleming 	phydev->speed = SPEED_10000;
91ebfdacb4SAndy Fleming 	phydev->duplex = DUPLEX_FULL;
92ebfdacb4SAndy Fleming 
93ebfdacb4SAndy Fleming 	return 0;
94ebfdacb4SAndy Fleming }
95ebfdacb4SAndy Fleming 
969082eeacSAndy Fleming struct phy_driver tn2020_driver = {
979082eeacSAndy Fleming 	.name = "Teranetics TN2020",
989082eeacSAndy Fleming 	.uid = 0x00a19410,
999082eeacSAndy Fleming 	.mask = 0xfffffff0,
1009082eeacSAndy Fleming 	.features = PHY_10G_FEATURES,
1019082eeacSAndy Fleming 	.mmds = (MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |
1029082eeacSAndy Fleming 			MDIO_DEVS_PHYXS | MDIO_DEVS_AN |
1039082eeacSAndy Fleming 			MDIO_DEVS_VEND1 | MDIO_DEVS_VEND2),
1049082eeacSAndy Fleming 	.config = &tn2020_config,
105ebfdacb4SAndy Fleming 	.startup = &tn2020_startup,
1069082eeacSAndy Fleming 	.shutdown = &gen10g_shutdown,
1079082eeacSAndy Fleming };
1089082eeacSAndy Fleming 
1099082eeacSAndy Fleming int phy_teranetics_init(void)
1109082eeacSAndy Fleming {
1119082eeacSAndy Fleming 	phy_register(&tn2020_driver);
1129082eeacSAndy Fleming 
1139082eeacSAndy Fleming 	return 0;
1149082eeacSAndy Fleming }
115