1 /* 2 * Generic PHY Management code 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 * 6 * Copyright 2011 Freescale Semiconductor, Inc. 7 * author Andy Fleming 8 * 9 * Based loosely off of Linux's PHY Lib 10 */ 11 12 #include <config.h> 13 #include <common.h> 14 #include <console.h> 15 #include <dm.h> 16 #include <malloc.h> 17 #include <net.h> 18 #include <command.h> 19 #include <miiphy.h> 20 #include <phy.h> 21 #include <errno.h> 22 #include <linux/err.h> 23 #include <linux/compiler.h> 24 25 DECLARE_GLOBAL_DATA_PTR; 26 27 /* Generic PHY support and helper functions */ 28 29 /** 30 * genphy_config_advert - sanitize and advertise auto-negotation parameters 31 * @phydev: target phy_device struct 32 * 33 * Description: Writes MII_ADVERTISE with the appropriate values, 34 * after sanitizing the values to make sure we only advertise 35 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement 36 * hasn't changed, and > 0 if it has changed. 37 */ 38 static int genphy_config_advert(struct phy_device *phydev) 39 { 40 u32 advertise; 41 int oldadv, adv, bmsr; 42 int err, changed = 0; 43 44 /* Only allow advertising what this PHY supports */ 45 phydev->advertising &= phydev->supported; 46 advertise = phydev->advertising; 47 48 /* Setup standard advertisement */ 49 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); 50 oldadv = adv; 51 52 if (adv < 0) 53 return adv; 54 55 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | 56 ADVERTISE_PAUSE_ASYM); 57 if (advertise & ADVERTISED_10baseT_Half) 58 adv |= ADVERTISE_10HALF; 59 if (advertise & ADVERTISED_10baseT_Full) 60 adv |= ADVERTISE_10FULL; 61 if (advertise & ADVERTISED_100baseT_Half) 62 adv |= ADVERTISE_100HALF; 63 if (advertise & ADVERTISED_100baseT_Full) 64 adv |= ADVERTISE_100FULL; 65 if (advertise & ADVERTISED_Pause) 66 adv |= ADVERTISE_PAUSE_CAP; 67 if (advertise & ADVERTISED_Asym_Pause) 68 adv |= ADVERTISE_PAUSE_ASYM; 69 if (advertise & ADVERTISED_1000baseX_Half) 70 adv |= ADVERTISE_1000XHALF; 71 if (advertise & ADVERTISED_1000baseX_Full) 72 adv |= ADVERTISE_1000XFULL; 73 74 if (adv != oldadv) { 75 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv); 76 77 if (err < 0) 78 return err; 79 changed = 1; 80 } 81 82 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 83 if (bmsr < 0) 84 return bmsr; 85 86 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all 87 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a 88 * logical 1. 89 */ 90 if (!(bmsr & BMSR_ESTATEN)) 91 return changed; 92 93 /* Configure gigabit if it's supported */ 94 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); 95 oldadv = adv; 96 97 if (adv < 0) 98 return adv; 99 100 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); 101 102 if (phydev->supported & (SUPPORTED_1000baseT_Half | 103 SUPPORTED_1000baseT_Full)) { 104 if (advertise & SUPPORTED_1000baseT_Half) 105 adv |= ADVERTISE_1000HALF; 106 if (advertise & SUPPORTED_1000baseT_Full) 107 adv |= ADVERTISE_1000FULL; 108 } 109 110 if (adv != oldadv) 111 changed = 1; 112 113 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv); 114 if (err < 0) 115 return err; 116 117 return changed; 118 } 119 120 121 /** 122 * genphy_setup_forced - configures/forces speed/duplex from @phydev 123 * @phydev: target phy_device struct 124 * 125 * Description: Configures MII_BMCR to force speed/duplex 126 * to the values in phydev. Assumes that the values are valid. 127 */ 128 static int genphy_setup_forced(struct phy_device *phydev) 129 { 130 int err; 131 int ctl = 0; 132 133 phydev->pause = phydev->asym_pause = 0; 134 135 if (SPEED_1000 == phydev->speed) 136 ctl |= BMCR_SPEED1000; 137 else if (SPEED_100 == phydev->speed) 138 ctl |= BMCR_SPEED100; 139 140 if (DUPLEX_FULL == phydev->duplex) 141 ctl |= BMCR_FULLDPLX; 142 143 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); 144 145 return err; 146 } 147 148 149 /** 150 * genphy_restart_aneg - Enable and Restart Autonegotiation 151 * @phydev: target phy_device struct 152 */ 153 int genphy_restart_aneg(struct phy_device *phydev) 154 { 155 int ctl; 156 157 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 158 159 if (ctl < 0) 160 return ctl; 161 162 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); 163 164 /* Don't isolate the PHY if we're negotiating */ 165 ctl &= ~(BMCR_ISOLATE); 166 167 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); 168 169 return ctl; 170 } 171 172 173 /** 174 * genphy_config_aneg - restart auto-negotiation or write BMCR 175 * @phydev: target phy_device struct 176 * 177 * Description: If auto-negotiation is enabled, we configure the 178 * advertising, and then restart auto-negotiation. If it is not 179 * enabled, then we write the BMCR. 180 */ 181 int genphy_config_aneg(struct phy_device *phydev) 182 { 183 int result; 184 185 if (AUTONEG_ENABLE != phydev->autoneg) 186 return genphy_setup_forced(phydev); 187 188 result = genphy_config_advert(phydev); 189 190 if (result < 0) /* error */ 191 return result; 192 193 if (result == 0) { 194 /* Advertisment hasn't changed, but maybe aneg was never on to 195 * begin with? Or maybe phy was isolated? */ 196 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 197 198 if (ctl < 0) 199 return ctl; 200 201 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 202 result = 1; /* do restart aneg */ 203 } 204 205 /* Only restart aneg if we are advertising something different 206 * than we were before. */ 207 if (result > 0) 208 result = genphy_restart_aneg(phydev); 209 210 return result; 211 } 212 213 /** 214 * genphy_update_link - update link status in @phydev 215 * @phydev: target phy_device struct 216 * 217 * Description: Update the value in phydev->link to reflect the 218 * current link value. In order to do this, we need to read 219 * the status register twice, keeping the second value. 220 */ 221 int genphy_update_link(struct phy_device *phydev) 222 { 223 unsigned int mii_reg; 224 225 /* 226 * Wait if the link is up, and autonegotiation is in progress 227 * (ie - we're capable and it's not done) 228 */ 229 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 230 231 /* 232 * If we already saw the link up, and it hasn't gone down, then 233 * we don't need to wait for autoneg again 234 */ 235 if (phydev->link && mii_reg & BMSR_LSTATUS) 236 return 0; 237 238 if ((mii_reg & BMSR_ANEGCAPABLE) && !(mii_reg & BMSR_ANEGCOMPLETE)) { 239 int i = 0; 240 241 printf("%s Waiting for PHY auto negotiation to complete", 242 phydev->dev->name); 243 while (!(mii_reg & BMSR_ANEGCOMPLETE)) { 244 /* 245 * Timeout reached ? 246 */ 247 if (i > PHY_ANEG_TIMEOUT) { 248 printf(" TIMEOUT !\n"); 249 phydev->link = 0; 250 return 0; 251 } 252 253 if (ctrlc()) { 254 puts("user interrupt!\n"); 255 phydev->link = 0; 256 return -EINTR; 257 } 258 259 if ((i++ % 500) == 0) 260 printf("."); 261 262 udelay(1000); /* 1 ms */ 263 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 264 } 265 printf(" done\n"); 266 phydev->link = 1; 267 } else { 268 /* Read the link a second time to clear the latched state */ 269 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 270 271 if (mii_reg & BMSR_LSTATUS) 272 phydev->link = 1; 273 else 274 phydev->link = 0; 275 } 276 277 return 0; 278 } 279 280 /* 281 * Generic function which updates the speed and duplex. If 282 * autonegotiation is enabled, it uses the AND of the link 283 * partner's advertised capabilities and our advertised 284 * capabilities. If autonegotiation is disabled, we use the 285 * appropriate bits in the control register. 286 * 287 * Stolen from Linux's mii.c and phy_device.c 288 */ 289 int genphy_parse_link(struct phy_device *phydev) 290 { 291 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 292 293 /* We're using autonegotiation */ 294 if (phydev->supported & SUPPORTED_Autoneg) { 295 u32 lpa = 0; 296 int gblpa = 0; 297 u32 estatus = 0; 298 299 /* Check for gigabit capability */ 300 if (phydev->supported & (SUPPORTED_1000baseT_Full | 301 SUPPORTED_1000baseT_Half)) { 302 /* We want a list of states supported by 303 * both PHYs in the link 304 */ 305 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000); 306 if (gblpa < 0) { 307 debug("Could not read MII_STAT1000. Ignoring gigabit capability\n"); 308 gblpa = 0; 309 } 310 gblpa &= phy_read(phydev, 311 MDIO_DEVAD_NONE, MII_CTRL1000) << 2; 312 } 313 314 /* Set the baseline so we only have to set them 315 * if they're different 316 */ 317 phydev->speed = SPEED_10; 318 phydev->duplex = DUPLEX_HALF; 319 320 /* Check the gigabit fields */ 321 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) { 322 phydev->speed = SPEED_1000; 323 324 if (gblpa & PHY_1000BTSR_1000FD) 325 phydev->duplex = DUPLEX_FULL; 326 327 /* We're done! */ 328 return 0; 329 } 330 331 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); 332 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); 333 334 if (lpa & (LPA_100FULL | LPA_100HALF)) { 335 phydev->speed = SPEED_100; 336 337 if (lpa & LPA_100FULL) 338 phydev->duplex = DUPLEX_FULL; 339 340 } else if (lpa & LPA_10FULL) 341 phydev->duplex = DUPLEX_FULL; 342 343 /* 344 * Extended status may indicate that the PHY supports 345 * 1000BASE-T/X even though the 1000BASE-T registers 346 * are missing. In this case we can't tell whether the 347 * peer also supports it, so we only check extended 348 * status if the 1000BASE-T registers are actually 349 * missing. 350 */ 351 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP)) 352 estatus = phy_read(phydev, MDIO_DEVAD_NONE, 353 MII_ESTATUS); 354 355 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF | 356 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) { 357 phydev->speed = SPEED_1000; 358 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL)) 359 phydev->duplex = DUPLEX_FULL; 360 } 361 362 } else { 363 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 364 365 phydev->speed = SPEED_10; 366 phydev->duplex = DUPLEX_HALF; 367 368 if (bmcr & BMCR_FULLDPLX) 369 phydev->duplex = DUPLEX_FULL; 370 371 if (bmcr & BMCR_SPEED1000) 372 phydev->speed = SPEED_1000; 373 else if (bmcr & BMCR_SPEED100) 374 phydev->speed = SPEED_100; 375 } 376 377 return 0; 378 } 379 380 int genphy_config(struct phy_device *phydev) 381 { 382 int val; 383 u32 features; 384 385 /* For now, I'll claim that the generic driver supports 386 * all possible port types */ 387 features = (SUPPORTED_TP | SUPPORTED_MII 388 | SUPPORTED_AUI | SUPPORTED_FIBRE | 389 SUPPORTED_BNC); 390 391 /* Do we support autonegotiation? */ 392 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 393 394 if (val < 0) 395 return val; 396 397 if (val & BMSR_ANEGCAPABLE) 398 features |= SUPPORTED_Autoneg; 399 400 if (val & BMSR_100FULL) 401 features |= SUPPORTED_100baseT_Full; 402 if (val & BMSR_100HALF) 403 features |= SUPPORTED_100baseT_Half; 404 if (val & BMSR_10FULL) 405 features |= SUPPORTED_10baseT_Full; 406 if (val & BMSR_10HALF) 407 features |= SUPPORTED_10baseT_Half; 408 409 if (val & BMSR_ESTATEN) { 410 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS); 411 412 if (val < 0) 413 return val; 414 415 if (val & ESTATUS_1000_TFULL) 416 features |= SUPPORTED_1000baseT_Full; 417 if (val & ESTATUS_1000_THALF) 418 features |= SUPPORTED_1000baseT_Half; 419 if (val & ESTATUS_1000_XFULL) 420 features |= SUPPORTED_1000baseX_Full; 421 if (val & ESTATUS_1000_XHALF) 422 features |= SUPPORTED_1000baseX_Half; 423 } 424 425 phydev->supported = features; 426 phydev->advertising = features; 427 428 genphy_config_aneg(phydev); 429 430 return 0; 431 } 432 433 int genphy_startup(struct phy_device *phydev) 434 { 435 genphy_update_link(phydev); 436 genphy_parse_link(phydev); 437 438 return 0; 439 } 440 441 int genphy_shutdown(struct phy_device *phydev) 442 { 443 return 0; 444 } 445 446 static struct phy_driver genphy_driver = { 447 .uid = 0xffffffff, 448 .mask = 0xffffffff, 449 .name = "Generic PHY", 450 .features = 0, 451 .config = genphy_config, 452 .startup = genphy_startup, 453 .shutdown = genphy_shutdown, 454 }; 455 456 static LIST_HEAD(phy_drivers); 457 458 int phy_init(void) 459 { 460 #ifdef CONFIG_PHY_AQUANTIA 461 phy_aquantia_init(); 462 #endif 463 #ifdef CONFIG_PHY_ATHEROS 464 phy_atheros_init(); 465 #endif 466 #ifdef CONFIG_PHY_BROADCOM 467 phy_broadcom_init(); 468 #endif 469 #ifdef CONFIG_PHY_CORTINA 470 phy_cortina_init(); 471 #endif 472 #ifdef CONFIG_PHY_DAVICOM 473 phy_davicom_init(); 474 #endif 475 #ifdef CONFIG_PHY_ET1011C 476 phy_et1011c_init(); 477 #endif 478 #ifdef CONFIG_PHY_LXT 479 phy_lxt_init(); 480 #endif 481 #ifdef CONFIG_PHY_MARVELL 482 phy_marvell_init(); 483 #endif 484 #ifdef CONFIG_PHY_MICREL 485 phy_micrel_init(); 486 #endif 487 #ifdef CONFIG_PHY_NATSEMI 488 phy_natsemi_init(); 489 #endif 490 #ifdef CONFIG_PHY_REALTEK 491 phy_realtek_init(); 492 #endif 493 #ifdef CONFIG_PHY_SMSC 494 phy_smsc_init(); 495 #endif 496 #ifdef CONFIG_PHY_TERANETICS 497 phy_teranetics_init(); 498 #endif 499 #ifdef CONFIG_PHY_TI 500 phy_ti_init(); 501 #endif 502 #ifdef CONFIG_PHY_VITESSE 503 phy_vitesse_init(); 504 #endif 505 506 return 0; 507 } 508 509 int phy_register(struct phy_driver *drv) 510 { 511 INIT_LIST_HEAD(&drv->list); 512 list_add_tail(&drv->list, &phy_drivers); 513 514 #ifdef CONFIG_NEEDS_MANUAL_RELOC 515 if (drv->probe) 516 drv->probe += gd->reloc_off; 517 if (drv->config) 518 drv->config += gd->reloc_off; 519 if (drv->startup) 520 drv->startup += gd->reloc_off; 521 if (drv->shutdown) 522 drv->shutdown += gd->reloc_off; 523 if (drv->readext) 524 drv->readext += gd->reloc_off; 525 if (drv->writeext) 526 drv->writeext += gd->reloc_off; 527 #endif 528 return 0; 529 } 530 531 static int phy_probe(struct phy_device *phydev) 532 { 533 int err = 0; 534 535 phydev->advertising = phydev->supported = phydev->drv->features; 536 phydev->mmds = phydev->drv->mmds; 537 538 if (phydev->drv->probe) 539 err = phydev->drv->probe(phydev); 540 541 return err; 542 } 543 544 static struct phy_driver *generic_for_interface(phy_interface_t interface) 545 { 546 #ifdef CONFIG_PHYLIB_10G 547 if (is_10g_interface(interface)) 548 return &gen10g_driver; 549 #endif 550 551 return &genphy_driver; 552 } 553 554 static struct phy_driver *get_phy_driver(struct phy_device *phydev, 555 phy_interface_t interface) 556 { 557 struct list_head *entry; 558 int phy_id = phydev->phy_id; 559 struct phy_driver *drv = NULL; 560 561 list_for_each(entry, &phy_drivers) { 562 drv = list_entry(entry, struct phy_driver, list); 563 if ((drv->uid & drv->mask) == (phy_id & drv->mask)) 564 return drv; 565 } 566 567 /* If we made it here, there's no driver for this PHY */ 568 return generic_for_interface(interface); 569 } 570 571 static struct phy_device *phy_device_create(struct mii_dev *bus, int addr, 572 u32 phy_id, 573 phy_interface_t interface) 574 { 575 struct phy_device *dev; 576 577 /* We allocate the device, and initialize the 578 * default values */ 579 dev = malloc(sizeof(*dev)); 580 if (!dev) { 581 printf("Failed to allocate PHY device for %s:%d\n", 582 bus->name, addr); 583 return NULL; 584 } 585 586 memset(dev, 0, sizeof(*dev)); 587 588 dev->duplex = -1; 589 dev->link = 0; 590 dev->interface = interface; 591 592 dev->autoneg = AUTONEG_ENABLE; 593 594 dev->addr = addr; 595 dev->phy_id = phy_id; 596 dev->bus = bus; 597 598 dev->drv = get_phy_driver(dev, interface); 599 600 phy_probe(dev); 601 602 bus->phymap[addr] = dev; 603 604 return dev; 605 } 606 607 /** 608 * get_phy_id - reads the specified addr for its ID. 609 * @bus: the target MII bus 610 * @addr: PHY address on the MII bus 611 * @phy_id: where to store the ID retrieved. 612 * 613 * Description: Reads the ID registers of the PHY at @addr on the 614 * @bus, stores it in @phy_id and returns zero on success. 615 */ 616 int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) 617 { 618 int phy_reg; 619 620 /* Grab the bits from PHYIR1, and put them 621 * in the upper half */ 622 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); 623 624 if (phy_reg < 0) 625 return -EIO; 626 627 *phy_id = (phy_reg & 0xffff) << 16; 628 629 /* Grab the bits from PHYIR2, and put them in the lower half */ 630 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2); 631 632 if (phy_reg < 0) 633 return -EIO; 634 635 *phy_id |= (phy_reg & 0xffff); 636 637 return 0; 638 } 639 640 static struct phy_device *create_phy_by_mask(struct mii_dev *bus, 641 unsigned phy_mask, int devad, phy_interface_t interface) 642 { 643 u32 phy_id = 0xffffffff; 644 while (phy_mask) { 645 int addr = ffs(phy_mask) - 1; 646 int r = get_phy_id(bus, addr, devad, &phy_id); 647 /* If the PHY ID is mostly f's, we didn't find anything */ 648 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) 649 return phy_device_create(bus, addr, phy_id, interface); 650 phy_mask &= ~(1 << addr); 651 } 652 return NULL; 653 } 654 655 static struct phy_device *search_for_existing_phy(struct mii_dev *bus, 656 unsigned phy_mask, phy_interface_t interface) 657 { 658 /* If we have one, return the existing device, with new interface */ 659 while (phy_mask) { 660 int addr = ffs(phy_mask) - 1; 661 if (bus->phymap[addr]) { 662 bus->phymap[addr]->interface = interface; 663 return bus->phymap[addr]; 664 } 665 phy_mask &= ~(1 << addr); 666 } 667 return NULL; 668 } 669 670 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, 671 unsigned phy_mask, phy_interface_t interface) 672 { 673 int i; 674 struct phy_device *phydev; 675 676 phydev = search_for_existing_phy(bus, phy_mask, interface); 677 if (phydev) 678 return phydev; 679 /* Try Standard (ie Clause 22) access */ 680 /* Otherwise we have to try Clause 45 */ 681 for (i = 0; i < 5; i++) { 682 phydev = create_phy_by_mask(bus, phy_mask, 683 i ? i : MDIO_DEVAD_NONE, interface); 684 if (IS_ERR(phydev)) 685 return NULL; 686 if (phydev) 687 return phydev; 688 } 689 690 debug("\n%s PHY: ", bus->name); 691 while (phy_mask) { 692 int addr = ffs(phy_mask) - 1; 693 debug("%d ", addr); 694 phy_mask &= ~(1 << addr); 695 } 696 debug("not found\n"); 697 698 return NULL; 699 } 700 701 /** 702 * get_phy_device - reads the specified PHY device and returns its @phy_device struct 703 * @bus: the target MII bus 704 * @addr: PHY address on the MII bus 705 * 706 * Description: Reads the ID registers of the PHY at @addr on the 707 * @bus, then allocates and returns the phy_device to represent it. 708 */ 709 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr, 710 phy_interface_t interface) 711 { 712 return get_phy_device_by_mask(bus, 1 << addr, interface); 713 } 714 715 int phy_reset(struct phy_device *phydev) 716 { 717 int reg; 718 int timeout = 500; 719 int devad = MDIO_DEVAD_NONE; 720 721 #ifdef CONFIG_PHYLIB_10G 722 /* If it's 10G, we need to issue reset through one of the MMDs */ 723 if (is_10g_interface(phydev->interface)) { 724 if (!phydev->mmds) 725 gen10g_discover_mmds(phydev); 726 727 devad = ffs(phydev->mmds) - 1; 728 } 729 #endif 730 731 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) { 732 debug("PHY reset failed\n"); 733 return -1; 734 } 735 736 #ifdef CONFIG_PHY_RESET_DELAY 737 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ 738 #endif 739 /* 740 * Poll the control register for the reset bit to go to 0 (it is 741 * auto-clearing). This should happen within 0.5 seconds per the 742 * IEEE spec. 743 */ 744 reg = phy_read(phydev, devad, MII_BMCR); 745 while ((reg & BMCR_RESET) && timeout--) { 746 reg = phy_read(phydev, devad, MII_BMCR); 747 748 if (reg < 0) { 749 debug("PHY status read failed\n"); 750 return -1; 751 } 752 udelay(1000); 753 } 754 755 if (reg & BMCR_RESET) { 756 puts("PHY reset timed out\n"); 757 return -1; 758 } 759 760 return 0; 761 } 762 763 int miiphy_reset(const char *devname, unsigned char addr) 764 { 765 struct mii_dev *bus = miiphy_get_dev_by_name(devname); 766 struct phy_device *phydev; 767 768 /* 769 * miiphy_reset was only used on standard PHYs, so we'll fake it here. 770 * If later code tries to connect with the right interface, this will 771 * be corrected by get_phy_device in phy_connect() 772 */ 773 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII); 774 775 return phy_reset(phydev); 776 } 777 778 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask, 779 phy_interface_t interface) 780 { 781 /* Reset the bus */ 782 if (bus->reset) { 783 bus->reset(bus); 784 785 /* Wait 15ms to make sure the PHY has come out of hard reset */ 786 udelay(15000); 787 } 788 789 return get_phy_device_by_mask(bus, phy_mask, interface); 790 } 791 792 #ifdef CONFIG_DM_ETH 793 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev) 794 #else 795 void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev) 796 #endif 797 { 798 /* Soft Reset the PHY */ 799 phy_reset(phydev); 800 if (phydev->dev && phydev->dev != dev) { 801 printf("%s:%d is connected to %s. Reconnecting to %s\n", 802 phydev->bus->name, phydev->addr, 803 phydev->dev->name, dev->name); 804 } 805 phydev->dev = dev; 806 debug("%s connected to %s\n", dev->name, phydev->drv->name); 807 } 808 809 #ifdef CONFIG_DM_ETH 810 struct phy_device *phy_connect(struct mii_dev *bus, int addr, 811 struct udevice *dev, phy_interface_t interface) 812 #else 813 struct phy_device *phy_connect(struct mii_dev *bus, int addr, 814 struct eth_device *dev, phy_interface_t interface) 815 #endif 816 { 817 struct phy_device *phydev; 818 819 phydev = phy_find_by_mask(bus, 1 << addr, interface); 820 if (phydev) 821 phy_connect_dev(phydev, dev); 822 else 823 printf("Could not get PHY for %s: addr %d\n", bus->name, addr); 824 return phydev; 825 } 826 827 /* 828 * Start the PHY. Returns 0 on success, or a negative error code. 829 */ 830 int phy_startup(struct phy_device *phydev) 831 { 832 if (phydev->drv->startup) 833 return phydev->drv->startup(phydev); 834 835 return 0; 836 } 837 838 __weak int board_phy_config(struct phy_device *phydev) 839 { 840 if (phydev->drv->config) 841 return phydev->drv->config(phydev); 842 return 0; 843 } 844 845 int phy_config(struct phy_device *phydev) 846 { 847 /* Invoke an optional board-specific helper */ 848 board_phy_config(phydev); 849 850 return 0; 851 } 852 853 int phy_shutdown(struct phy_device *phydev) 854 { 855 if (phydev->drv->shutdown) 856 phydev->drv->shutdown(phydev); 857 858 return 0; 859 } 860 861 int phy_get_interface_by_name(const char *str) 862 { 863 int i; 864 865 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) { 866 if (!strcmp(str, phy_interface_strings[i])) 867 return i; 868 } 869 870 return -1; 871 } 872