xref: /rk3399_rockchip-uboot/drivers/net/ldpaa_eth/ldpaa_eth.h (revision cd85bec36d0e0d16fedb00e0c434ed070a9c6b37)
1c517771aSPrabhakar Kushwaha /*
2c517771aSPrabhakar Kushwaha  * Copyright (C) 2014 Freescale Semiconductor
3c517771aSPrabhakar Kushwaha  *
4c517771aSPrabhakar Kushwaha  * SPDX-License-Identifier:	GPL-2.0+
5c517771aSPrabhakar Kushwaha  */
6c517771aSPrabhakar Kushwaha 
7c517771aSPrabhakar Kushwaha #ifndef __LDPAA_ETH_H
8c517771aSPrabhakar Kushwaha #define __LDPAA_ETH_H
9c517771aSPrabhakar Kushwaha 
10c517771aSPrabhakar Kushwaha #include <linux/netdevice.h>
11c517771aSPrabhakar Kushwaha #include <fsl-mc/fsl_mc.h>
12c517771aSPrabhakar Kushwaha #include <fsl-mc/fsl_dpaa_fd.h>
13c517771aSPrabhakar Kushwaha #include <fsl-mc/fsl_dprc.h>
14c517771aSPrabhakar Kushwaha #include <fsl-mc/fsl_dpni.h>
15c517771aSPrabhakar Kushwaha #include <fsl-mc/fsl_dpbp.h>
16c517771aSPrabhakar Kushwaha #include <fsl-mc/fsl_dpio.h>
17c517771aSPrabhakar Kushwaha #include <fsl-mc/fsl_qbman_portal.h>
18c517771aSPrabhakar Kushwaha #include <fsl-mc/fsl_mc_private.h>
19c517771aSPrabhakar Kushwaha 
20c517771aSPrabhakar Kushwaha 
21c517771aSPrabhakar Kushwaha enum ldpaa_eth_type {
22c517771aSPrabhakar Kushwaha 	LDPAA_ETH_1G_E,
23c517771aSPrabhakar Kushwaha 	LDPAA_ETH_10G_E,
24c517771aSPrabhakar Kushwaha };
25c517771aSPrabhakar Kushwaha 
26c517771aSPrabhakar Kushwaha /* Arbitrary values for now, but we'll need to tune */
27*1c42beacSPrabhakar Kushwaha #define LDPAA_ETH_NUM_BUFS		(7 * 7)
28c517771aSPrabhakar Kushwaha #define LDPAA_ETH_REFILL_THRESH		(LDPAA_ETH_NUM_BUFS/2)
29c517771aSPrabhakar Kushwaha #define LDPAA_ETH_RX_BUFFER_SIZE	2048
30c517771aSPrabhakar Kushwaha 
3114480454SPrabhakar Kushwaha /* Hardware requires alignment for buffer address and length: 256-byte
3214480454SPrabhakar Kushwaha  * for ingress, 64-byte for egress. Using 256 for both.
33c517771aSPrabhakar Kushwaha  */
3414480454SPrabhakar Kushwaha #define LDPAA_ETH_BUF_ALIGN		256
35c517771aSPrabhakar Kushwaha 
36c517771aSPrabhakar Kushwaha /* So far we're only accomodating a skb backpointer in the frame's
37c517771aSPrabhakar Kushwaha  * software annotation, but the hardware options are either 0 or 64.
38c517771aSPrabhakar Kushwaha  */
39c517771aSPrabhakar Kushwaha #define LDPAA_ETH_SWA_SIZE		64
40c517771aSPrabhakar Kushwaha 
41c517771aSPrabhakar Kushwaha /* Annotation valid bits in FD FRC */
42c517771aSPrabhakar Kushwaha #define LDPAA_FD_FRC_FASV		0x8000
43c517771aSPrabhakar Kushwaha #define LDPAA_FD_FRC_FAEADV		0x4000
44c517771aSPrabhakar Kushwaha #define LDPAA_FD_FRC_FAPRV		0x2000
45c517771aSPrabhakar Kushwaha #define LDPAA_FD_FRC_FAIADV		0x1000
46c517771aSPrabhakar Kushwaha #define LDPAA_FD_FRC_FASWOV		0x0800
47c517771aSPrabhakar Kushwaha #define LDPAA_FD_FRC_FAICFDV		0x0400
48c517771aSPrabhakar Kushwaha 
49c517771aSPrabhakar Kushwaha /* Annotation bits in FD CTRL */
50c517771aSPrabhakar Kushwaha #define LDPAA_FD_CTRL_ASAL		0x00020000	/* ASAL = 128 */
51c517771aSPrabhakar Kushwaha #define LDPAA_FD_CTRL_PTA		0x00800000
52c517771aSPrabhakar Kushwaha #define LDPAA_FD_CTRL_PTV1		0x00400000
53c517771aSPrabhakar Kushwaha 
54c517771aSPrabhakar Kushwaha /* TODO: we may want to move this and other WRIOP related defines
55c517771aSPrabhakar Kushwaha  * to a separate header
56c517771aSPrabhakar Kushwaha  */
57c517771aSPrabhakar Kushwaha /* Frame annotation status */
58c517771aSPrabhakar Kushwaha struct ldpaa_fas {
59c517771aSPrabhakar Kushwaha 	u8 reserved;
60c517771aSPrabhakar Kushwaha 	u8 ppid;
61c517771aSPrabhakar Kushwaha 	__le16 ifpid;
62c517771aSPrabhakar Kushwaha 	__le32 status;
63c517771aSPrabhakar Kushwaha } __packed;
64c517771aSPrabhakar Kushwaha 
65c517771aSPrabhakar Kushwaha /* Debug frame, otherwise supposed to be discarded */
66c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_DISC		0x80000000
67c517771aSPrabhakar Kushwaha /* MACSEC frame */
68c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_MS		0x40000000
69c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_PTP		0x08000000
70c517771aSPrabhakar Kushwaha /* Ethernet multicast frame */
71c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_MC		0x04000000
72c517771aSPrabhakar Kushwaha /* Ethernet broadcast frame */
73c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_BC		0x02000000
74c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_KSE		0x00040000
75c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_EOFHE		0x00020000
76c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_MNLE		0x00010000
77c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_TIDE		0x00008000
78c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_PIEE		0x00004000
79c517771aSPrabhakar Kushwaha /* Frame length error */
80c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_FLE		0x00002000
81c517771aSPrabhakar Kushwaha /* Frame physical error; our favourite pastime */
82c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_FPE		0x00001000
83c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_PTE		0x00000080
84c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_ISP		0x00000040
85c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_PHE		0x00000020
86c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_BLE		0x00000010
87c517771aSPrabhakar Kushwaha /* L3 csum validation performed */
88c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_L3CV		0x00000008
89c517771aSPrabhakar Kushwaha /* L3 csum error */
90c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_L3CE		0x00000004
91c517771aSPrabhakar Kushwaha /* L4 csum validation performed */
92c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_L4CV		0x00000002
93c517771aSPrabhakar Kushwaha /* L4 csum error */
94c517771aSPrabhakar Kushwaha #define LDPAA_ETH_FAS_L4CE		0x00000001
95c517771aSPrabhakar Kushwaha /* These bits always signal errors */
96c517771aSPrabhakar Kushwaha #define LDPAA_ETH_RX_ERR_MASK		(LDPAA_ETH_FAS_DISC	| \
97c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_KSE	| \
98c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_EOFHE	| \
99c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_MNLE	| \
100c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_TIDE	| \
101c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_PIEE	| \
102c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_FLE	| \
103c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_FPE	| \
104c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_PTE	| \
105c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_ISP	| \
106c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_PHE	| \
107c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_BLE	| \
108c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_L3CE	| \
109c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_L4CE)
110c517771aSPrabhakar Kushwaha /* Unsupported features in the ingress */
111c517771aSPrabhakar Kushwaha #define LDPAA_ETH_RX_UNSUPP_MASK	LDPAA_ETH_FAS_MS
112c517771aSPrabhakar Kushwaha /* TODO trim down the bitmask; not all of them apply to Tx-confirm */
113c517771aSPrabhakar Kushwaha #define LDPAA_ETH_TXCONF_ERR_MASK	(LDPAA_ETH_FAS_KSE	| \
114c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_EOFHE	| \
115c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_MNLE	| \
116c517771aSPrabhakar Kushwaha 					 LDPAA_ETH_FAS_TIDE)
117c517771aSPrabhakar Kushwaha 
118c517771aSPrabhakar Kushwaha struct ldpaa_eth_priv {
119c517771aSPrabhakar Kushwaha 	struct eth_device *net_dev;
120c919ab9eSPrabhakar Kushwaha 	int dpmac_id;
121c919ab9eSPrabhakar Kushwaha 	uint16_t dpmac_handle;
122c919ab9eSPrabhakar Kushwaha 
123c517771aSPrabhakar Kushwaha 	uint16_t tx_data_offset;
124c517771aSPrabhakar Kushwaha 
125c517771aSPrabhakar Kushwaha 	uint32_t rx_dflt_fqid;
126c517771aSPrabhakar Kushwaha 	uint16_t tx_qdid;
127c517771aSPrabhakar Kushwaha 	uint16_t tx_flow_id;
128c517771aSPrabhakar Kushwaha 
129c517771aSPrabhakar Kushwaha 	enum ldpaa_eth_type type;	/* 1G or 10G ethernet */
130c517771aSPrabhakar Kushwaha 	struct phy_device *phydev;
131c517771aSPrabhakar Kushwaha };
132c517771aSPrabhakar Kushwaha 
133c919ab9eSPrabhakar Kushwaha struct dprc_endpoint dpmac_endpoint;
134c919ab9eSPrabhakar Kushwaha struct dprc_endpoint dpni_endpoint;
135c919ab9eSPrabhakar Kushwaha 
136c517771aSPrabhakar Kushwaha extern struct fsl_mc_io *dflt_mc_io;
137c517771aSPrabhakar Kushwaha extern struct fsl_dpbp_obj *dflt_dpbp;
138c517771aSPrabhakar Kushwaha extern struct fsl_dpio_obj *dflt_dpio;
139c919ab9eSPrabhakar Kushwaha extern struct fsl_dpni_obj *dflt_dpni;
140c919ab9eSPrabhakar Kushwaha extern uint16_t dflt_dprc_handle;
141c517771aSPrabhakar Kushwaha 
142c517771aSPrabhakar Kushwaha static void ldpaa_dpbp_drain_cnt(int count);
143c517771aSPrabhakar Kushwaha static void ldpaa_dpbp_drain(void);
144c517771aSPrabhakar Kushwaha static int ldpaa_dpbp_seed(uint16_t bpid);
145c517771aSPrabhakar Kushwaha static void ldpaa_dpbp_free(void);
146c517771aSPrabhakar Kushwaha static int ldpaa_dpni_setup(struct ldpaa_eth_priv *priv);
147c517771aSPrabhakar Kushwaha static int ldpaa_dpbp_setup(void);
148c517771aSPrabhakar Kushwaha static int ldpaa_dpni_bind(struct ldpaa_eth_priv *priv);
149c919ab9eSPrabhakar Kushwaha static int ldpaa_dpmac_setup(struct ldpaa_eth_priv *priv);
150c919ab9eSPrabhakar Kushwaha static int ldpaa_dpmac_bind(struct ldpaa_eth_priv *priv);
151c517771aSPrabhakar Kushwaha #endif	/* __LDPAA_H */
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