1 /* 2 * Copyright 2009-2010, 2013 Freescale Semiconductor, Inc. 3 * Jun-jie Zhang <b18070@freescale.com> 4 * Mingkai Hu <Mingkai.hu@freescale.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 #include <common.h> 9 #include <miiphy.h> 10 #include <phy.h> 11 #include <fsl_mdio.h> 12 #include <asm/io.h> 13 #include <asm/errno.h> 14 15 void tsec_local_mdio_write(struct tsec_mii_mng __iomem *phyregs, int port_addr, 16 int dev_addr, int regnum, int value) 17 { 18 int timeout = 1000000; 19 20 out_be32(&phyregs->miimadd, (port_addr << 8) | (regnum & 0x1f)); 21 out_be32(&phyregs->miimcon, value); 22 asm("sync"); 23 24 while ((in_be32(&phyregs->miimind) & MIIMIND_BUSY) && timeout--) 25 ; 26 } 27 28 int tsec_local_mdio_read(struct tsec_mii_mng __iomem *phyregs, int port_addr, 29 int dev_addr, int regnum) 30 { 31 int value; 32 int timeout = 1000000; 33 34 /* Put the address of the phy, and the register 35 * number into MIIMADD */ 36 out_be32(&phyregs->miimadd, (port_addr << 8) | (regnum & 0x1f)); 37 38 /* Clear the command register, and wait */ 39 out_be32(&phyregs->miimcom, 0); 40 asm("sync"); 41 42 /* Initiate a read command, and wait */ 43 out_be32(&phyregs->miimcom, MIIMCOM_READ_CYCLE); 44 asm("sync"); 45 46 /* Wait for the the indication that the read is done */ 47 while ((in_be32(&phyregs->miimind) & (MIIMIND_NOTVALID | MIIMIND_BUSY)) 48 && timeout--) 49 ; 50 51 /* Grab the value read from the PHY */ 52 value = in_be32(&phyregs->miimstat); 53 54 return value; 55 } 56 57 static int fsl_pq_mdio_reset(struct mii_dev *bus) 58 { 59 struct tsec_mii_mng __iomem *regs = 60 (struct tsec_mii_mng __iomem *)bus->priv; 61 62 /* Reset MII (due to new addresses) */ 63 out_be32(®s->miimcfg, MIIMCFG_RESET_MGMT); 64 65 out_be32(®s->miimcfg, MIIMCFG_INIT_VALUE); 66 67 while (in_be32(®s->miimind) & MIIMIND_BUSY) 68 ; 69 70 return 0; 71 } 72 73 int tsec_phy_read(struct mii_dev *bus, int addr, int dev_addr, int regnum) 74 { 75 struct tsec_mii_mng __iomem *phyregs = 76 (struct tsec_mii_mng __iomem *)bus->priv; 77 78 return tsec_local_mdio_read(phyregs, addr, dev_addr, regnum); 79 } 80 81 int tsec_phy_write(struct mii_dev *bus, int addr, int dev_addr, int regnum, 82 u16 value) 83 { 84 struct tsec_mii_mng __iomem *phyregs = 85 (struct tsec_mii_mng __iomem *)bus->priv; 86 87 tsec_local_mdio_write(phyregs, addr, dev_addr, regnum, value); 88 89 return 0; 90 } 91 92 int fsl_pq_mdio_init(bd_t *bis, struct fsl_pq_mdio_info *info) 93 { 94 struct mii_dev *bus = mdio_alloc(); 95 96 if (!bus) { 97 printf("Failed to allocate FSL MDIO bus\n"); 98 return -1; 99 } 100 101 bus->read = tsec_phy_read; 102 bus->write = tsec_phy_write; 103 bus->reset = fsl_pq_mdio_reset; 104 sprintf(bus->name, info->name); 105 106 bus->priv = (void *)info->regs; 107 108 return mdio_register(bus); 109 } 110