xref: /rk3399_rockchip-uboot/drivers/net/fm/p1023.c (revision 69a852425883a4abd8dc726da34e3149a08ee95d)
1c916d7c9SKumar Gala /*
2c916d7c9SKumar Gala  * Copyright 2011 Freescale Semiconductor, Inc.
3c916d7c9SKumar Gala  *
4c916d7c9SKumar Gala  * This program is free software; you can redistribute it and/or
5c916d7c9SKumar Gala  * modify it under the terms of the GNU General Public License as
6c916d7c9SKumar Gala  * published by the Free Software Foundation; either version 2 of
7c916d7c9SKumar Gala  * the License, or (at your option) any later version.
8c916d7c9SKumar Gala  *
9c916d7c9SKumar Gala  * This program is distributed in the hope that it will be useful,
10c916d7c9SKumar Gala  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11c916d7c9SKumar Gala  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12c916d7c9SKumar Gala  * GNU General Public License for more details.
13c916d7c9SKumar Gala  *
14c916d7c9SKumar Gala  * You should have received a copy of the GNU General Public License
15c916d7c9SKumar Gala  * along with this program; if not, write to the Free Software
16c916d7c9SKumar Gala  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17c916d7c9SKumar Gala  * MA 02111-1307 USA
18c916d7c9SKumar Gala  */
19c916d7c9SKumar Gala #include <common.h>
20c916d7c9SKumar Gala #include <phy.h>
21c916d7c9SKumar Gala #include <fm_eth.h>
22c916d7c9SKumar Gala #include <asm/io.h>
23c916d7c9SKumar Gala #include <asm/immap_85xx.h>
24c916d7c9SKumar Gala #include <asm/fsl_serdes.h>
25c916d7c9SKumar Gala 
26c916d7c9SKumar Gala u32 port_to_devdisr[] = {
27c916d7c9SKumar Gala 	[FM1_DTSEC1] = MPC85xx_DEVDISR_TSEC1,
28c916d7c9SKumar Gala 	[FM1_DTSEC2] = MPC85xx_DEVDISR_TSEC2,
29c916d7c9SKumar Gala };
30c916d7c9SKumar Gala 
31c916d7c9SKumar Gala static int is_device_disabled(enum fm_port port)
32c916d7c9SKumar Gala {
33c916d7c9SKumar Gala 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
34c916d7c9SKumar Gala 	u32 devdisr = in_be32(&gur->devdisr);
35c916d7c9SKumar Gala 
36c916d7c9SKumar Gala 	return port_to_devdisr[port] & devdisr;
37c916d7c9SKumar Gala }
38c916d7c9SKumar Gala 
39*69a85242SKumar Gala void fman_disable_port(enum fm_port port)
40*69a85242SKumar Gala {
41*69a85242SKumar Gala 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
42*69a85242SKumar Gala 	setbits_be32(&gur->devdisr, port_to_devdisr[port]);
43*69a85242SKumar Gala }
44*69a85242SKumar Gala 
45c916d7c9SKumar Gala phy_interface_t fman_port_enet_if(enum fm_port port)
46c916d7c9SKumar Gala {
47c916d7c9SKumar Gala 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
48c916d7c9SKumar Gala 	u32 pordevsr = in_be32(&gur->pordevsr);
49c916d7c9SKumar Gala 
50c916d7c9SKumar Gala 	if (is_device_disabled(port))
51c916d7c9SKumar Gala 		return PHY_INTERFACE_MODE_NONE;
52c916d7c9SKumar Gala 
53c916d7c9SKumar Gala 	/* DTSEC1 can be SGMII, RGMII or RMII */
54c916d7c9SKumar Gala 	if (port == FM1_DTSEC1) {
55c916d7c9SKumar Gala 		if (is_serdes_configured(SGMII_FM1_DTSEC1))
56c916d7c9SKumar Gala 			return PHY_INTERFACE_MODE_SGMII;
57c916d7c9SKumar Gala 		if (pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS) {
58c916d7c9SKumar Gala 			if (pordevsr & MPC85xx_PORDEVSR_TSEC1_PRTC)
59c916d7c9SKumar Gala 				return PHY_INTERFACE_MODE_RGMII;
60c916d7c9SKumar Gala 			else
61c916d7c9SKumar Gala 				return PHY_INTERFACE_MODE_RMII;
62c916d7c9SKumar Gala 		}
63c916d7c9SKumar Gala 	}
64c916d7c9SKumar Gala 
65c916d7c9SKumar Gala 	/* DTSEC2 only supports SGMII or RGMII */
66c916d7c9SKumar Gala 	if (port == FM1_DTSEC2) {
67c916d7c9SKumar Gala 		if (is_serdes_configured(SGMII_FM1_DTSEC2))
68c916d7c9SKumar Gala 			return PHY_INTERFACE_MODE_SGMII;
69c916d7c9SKumar Gala 		if (pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)
70c916d7c9SKumar Gala 			return PHY_INTERFACE_MODE_RGMII;
71c916d7c9SKumar Gala 	}
72c916d7c9SKumar Gala 
73c916d7c9SKumar Gala 	return PHY_INTERFACE_MODE_NONE;
74c916d7c9SKumar Gala }
75