1 /* 2 * Ethernet driver for TI TMS320DM644x (DaVinci) chips. 3 * 4 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 5 * 6 * Parts shamelessly stolen from TI's dm644x_emac.c. Original copyright 7 * follows: 8 * 9 * ---------------------------------------------------------------------------- 10 * 11 * dm644x_emac.c 12 * 13 * TI DaVinci (DM644X) EMAC peripheral driver source for DV-EVM 14 * 15 * Copyright (C) 2005 Texas Instruments. 16 * 17 * ---------------------------------------------------------------------------- 18 * 19 * This program is free software; you can redistribute it and/or modify 20 * it under the terms of the GNU General Public License as published by 21 * the Free Software Foundation; either version 2 of the License, or 22 * (at your option) any later version. 23 * 24 * This program is distributed in the hope that it will be useful, 25 * but WITHOUT ANY WARRANTY; without even the implied warranty of 26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 27 * GNU General Public License for more details. 28 * 29 * You should have received a copy of the GNU General Public License 30 * along with this program; if not, write to the Free Software 31 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 32 * ---------------------------------------------------------------------------- 33 34 * Modifications: 35 * ver. 1.0: Sep 2005, Anant Gole - Created EMAC version for uBoot. 36 * ver 1.1: Nov 2005, Anant Gole - Extended the RX logic for multiple descriptors 37 * 38 */ 39 #include <common.h> 40 #include <command.h> 41 #include <net.h> 42 #include <miiphy.h> 43 #include <asm/arch/emac_defs.h> 44 45 unsigned int emac_dbg = 0; 46 #define debug_emac(fmt,args...) if (emac_dbg) printf(fmt,##args) 47 48 /* Internal static functions */ 49 static int davinci_eth_hw_init (void); 50 static int davinci_eth_open (void); 51 static int davinci_eth_close (void); 52 static int davinci_eth_send_packet (volatile void *packet, int length); 53 static int davinci_eth_rcv_packet (void); 54 static void davinci_eth_mdio_enable(void); 55 56 static int gen_init_phy(int phy_addr); 57 static int gen_is_phy_connected(int phy_addr); 58 static int gen_get_link_speed(int phy_addr); 59 static int gen_auto_negotiate(int phy_addr); 60 61 /* Wrappers exported to the U-Boot proper */ 62 int eth_hw_init(void) 63 { 64 return(davinci_eth_hw_init()); 65 } 66 67 int eth_init(bd_t * bd) 68 { 69 return(davinci_eth_open()); 70 } 71 72 void eth_halt(void) 73 { 74 davinci_eth_close(); 75 } 76 77 int eth_send(volatile void *packet, int length) 78 { 79 return(davinci_eth_send_packet(packet, length)); 80 } 81 82 int eth_rx(void) 83 { 84 return(davinci_eth_rcv_packet()); 85 } 86 87 void eth_mdio_enable(void) 88 { 89 davinci_eth_mdio_enable(); 90 } 91 /* End of wrappers */ 92 93 94 static u_int8_t davinci_eth_mac_addr[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; 95 96 /* 97 * This function must be called before emac_open() if you want to override 98 * the default mac address. 99 */ 100 void davinci_eth_set_mac_addr(const u_int8_t *addr) 101 { 102 int i; 103 104 for (i = 0; i < sizeof (davinci_eth_mac_addr); i++) { 105 davinci_eth_mac_addr[i] = addr[i]; 106 } 107 } 108 109 /* EMAC Addresses */ 110 static volatile emac_regs *adap_emac = (emac_regs *)EMAC_BASE_ADDR; 111 static volatile ewrap_regs *adap_ewrap = (ewrap_regs *)EMAC_WRAPPER_BASE_ADDR; 112 static volatile mdio_regs *adap_mdio = (mdio_regs *)EMAC_MDIO_BASE_ADDR; 113 114 /* EMAC descriptors */ 115 static volatile emac_desc *emac_rx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE); 116 static volatile emac_desc *emac_tx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE); 117 static volatile emac_desc *emac_rx_active_head = 0; 118 static volatile emac_desc *emac_rx_active_tail = 0; 119 static int emac_rx_queue_active = 0; 120 121 /* Receive packet buffers */ 122 static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)]; 123 124 /* PHY address for a discovered PHY (0xff - not found) */ 125 static volatile u_int8_t active_phy_addr = 0xff; 126 127 phy_t phy; 128 129 static void davinci_eth_mdio_enable(void) 130 { 131 u_int32_t clkdiv; 132 133 clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1; 134 135 adap_mdio->CONTROL = (clkdiv & 0xff) | 136 MDIO_CONTROL_ENABLE | 137 MDIO_CONTROL_FAULT | 138 MDIO_CONTROL_FAULT_ENABLE; 139 140 while (adap_mdio->CONTROL & MDIO_CONTROL_IDLE) {;} 141 } 142 143 /* 144 * Tries to find an active connected PHY. Returns 1 if address if found. 145 * If no active PHY (or more than one PHY) found returns 0. 146 * Sets active_phy_addr variable. 147 */ 148 static int davinci_eth_phy_detect(void) 149 { 150 u_int32_t phy_act_state; 151 int i; 152 153 active_phy_addr = 0xff; 154 155 if ((phy_act_state = adap_mdio->ALIVE) == 0) 156 return(0); /* No active PHYs */ 157 158 debug_emac("davinci_eth_phy_detect(), ALIVE = 0x%08x\n", phy_act_state); 159 160 for (i = 0; i < 32; i++) { 161 if (phy_act_state & (1 << i)) { 162 if (phy_act_state & ~(1 << i)) 163 return(0); /* More than one PHY */ 164 else { 165 active_phy_addr = i; 166 return(1); 167 } 168 } 169 } 170 171 return(0); /* Just to make GCC happy */ 172 } 173 174 175 /* Read a PHY register via MDIO inteface. Returns 1 on success, 0 otherwise */ 176 int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data) 177 { 178 int tmp; 179 180 while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;} 181 182 adap_mdio->USERACCESS0 = MDIO_USERACCESS0_GO | 183 MDIO_USERACCESS0_WRITE_READ | 184 ((reg_num & 0x1f) << 21) | 185 ((phy_addr & 0x1f) << 16); 186 187 /* Wait for command to complete */ 188 while ((tmp = adap_mdio->USERACCESS0) & MDIO_USERACCESS0_GO) {;} 189 190 if (tmp & MDIO_USERACCESS0_ACK) { 191 *data = tmp & 0xffff; 192 return(1); 193 } 194 195 *data = -1; 196 return(0); 197 } 198 199 /* Write to a PHY register via MDIO inteface. Blocks until operation is complete. */ 200 int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data) 201 { 202 203 while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;} 204 205 adap_mdio->USERACCESS0 = MDIO_USERACCESS0_GO | 206 MDIO_USERACCESS0_WRITE_WRITE | 207 ((reg_num & 0x1f) << 21) | 208 ((phy_addr & 0x1f) << 16) | 209 (data & 0xffff); 210 211 /* Wait for command to complete */ 212 while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;} 213 214 return(1); 215 } 216 217 /* PHY functions for a generic PHY */ 218 static int gen_init_phy(int phy_addr) 219 { 220 int ret = 1; 221 222 if (gen_get_link_speed(phy_addr)) { 223 /* Try another time */ 224 ret = gen_get_link_speed(phy_addr); 225 } 226 227 return(ret); 228 } 229 230 static int gen_is_phy_connected(int phy_addr) 231 { 232 u_int16_t dummy; 233 234 return(davinci_eth_phy_read(phy_addr, PHY_PHYIDR1, &dummy)); 235 } 236 237 static int gen_get_link_speed(int phy_addr) 238 { 239 u_int16_t tmp; 240 241 if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) && (tmp & 0x04)) 242 return(1); 243 244 return(0); 245 } 246 247 static int gen_auto_negotiate(int phy_addr) 248 { 249 u_int16_t tmp; 250 251 if (!davinci_eth_phy_read(phy_addr, PHY_BMCR, &tmp)) 252 return(0); 253 254 /* Restart Auto_negotiation */ 255 tmp |= PHY_BMCR_AUTON; 256 davinci_eth_phy_write(phy_addr, PHY_BMCR, tmp); 257 258 /*check AutoNegotiate complete */ 259 udelay (10000); 260 if (!davinci_eth_phy_read(phy_addr, PHY_BMSR, &tmp)) 261 return(0); 262 263 if (!(tmp & PHY_BMSR_AUTN_COMP)) 264 return(0); 265 266 return(gen_get_link_speed(phy_addr)); 267 } 268 /* End of generic PHY functions */ 269 270 271 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) 272 static int davinci_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value) 273 { 274 return(davinci_eth_phy_read(addr, reg, value) ? 0 : 1); 275 } 276 277 static int davinci_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value) 278 { 279 return(davinci_eth_phy_write(addr, reg, value) ? 0 : 1); 280 } 281 282 int davinci_eth_miiphy_initialize(bd_t *bis) 283 { 284 miiphy_register(phy.name, davinci_mii_phy_read, davinci_mii_phy_write); 285 286 return(1); 287 } 288 #endif 289 290 291 /* Eth device open */ 292 static int davinci_eth_open(void) 293 { 294 dv_reg_p addr; 295 u_int32_t clkdiv, cnt; 296 volatile emac_desc *rx_desc; 297 298 debug_emac("+ emac_open\n"); 299 300 /* Reset EMAC module and disable interrupts in wrapper */ 301 adap_emac->SOFTRESET = 1; 302 while (adap_emac->SOFTRESET != 0) {;} 303 adap_ewrap->EWCTL = 0; 304 for (cnt = 0; cnt < 5; cnt++) { 305 clkdiv = adap_ewrap->EWCTL; 306 } 307 308 rx_desc = emac_rx_desc; 309 310 adap_emac->TXCONTROL = 0x01; 311 adap_emac->RXCONTROL = 0x01; 312 313 /* Set MAC Addresses & Init multicast Hash to 0 (disable any multicast receive) */ 314 /* Using channel 0 only - other channels are disabled */ 315 adap_emac->MACINDEX = 0; 316 adap_emac->MACADDRHI = 317 (davinci_eth_mac_addr[3] << 24) | 318 (davinci_eth_mac_addr[2] << 16) | 319 (davinci_eth_mac_addr[1] << 8) | 320 (davinci_eth_mac_addr[0]); 321 adap_emac->MACADDRLO = 322 (davinci_eth_mac_addr[5] << 8) | 323 (davinci_eth_mac_addr[4]); 324 325 adap_emac->MACHASH1 = 0; 326 adap_emac->MACHASH2 = 0; 327 328 /* Set source MAC address - REQUIRED */ 329 adap_emac->MACSRCADDRHI = 330 (davinci_eth_mac_addr[3] << 24) | 331 (davinci_eth_mac_addr[2] << 16) | 332 (davinci_eth_mac_addr[1] << 8) | 333 (davinci_eth_mac_addr[0]); 334 adap_emac->MACSRCADDRLO = 335 (davinci_eth_mac_addr[4] << 8) | 336 (davinci_eth_mac_addr[5]); 337 338 /* Set DMA 8 TX / 8 RX Head pointers to 0 */ 339 addr = &adap_emac->TX0HDP; 340 for(cnt = 0; cnt < 16; cnt++) 341 *addr++ = 0; 342 343 addr = &adap_emac->RX0HDP; 344 for(cnt = 0; cnt < 16; cnt++) 345 *addr++ = 0; 346 347 /* Clear Statistics (do this before setting MacControl register) */ 348 addr = &adap_emac->RXGOODFRAMES; 349 for(cnt = 0; cnt < EMAC_NUM_STATS; cnt++) 350 *addr++ = 0; 351 352 /* No multicast addressing */ 353 adap_emac->MACHASH1 = 0; 354 adap_emac->MACHASH2 = 0; 355 356 /* Create RX queue and set receive process in place */ 357 emac_rx_active_head = emac_rx_desc; 358 for (cnt = 0; cnt < EMAC_MAX_RX_BUFFERS; cnt++) { 359 rx_desc->next = (u_int32_t)(rx_desc + 1); 360 rx_desc->buffer = &emac_rx_buffers[cnt * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)]; 361 rx_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE; 362 rx_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT; 363 rx_desc++; 364 } 365 366 /* Set the last descriptor's "next" parameter to 0 to end the RX desc list */ 367 rx_desc--; 368 rx_desc->next = 0; 369 emac_rx_active_tail = rx_desc; 370 emac_rx_queue_active = 1; 371 372 /* Enable TX/RX */ 373 adap_emac->RXMAXLEN = EMAC_MAX_ETHERNET_PKT_SIZE; 374 adap_emac->RXBUFFEROFFSET = 0; 375 376 /* No fancy configs - Use this for promiscous for debug - EMAC_RXMBPENABLE_RXCAFEN_ENABLE */ 377 adap_emac->RXMBPENABLE = EMAC_RXMBPENABLE_RXBROADEN; 378 379 /* Enable ch 0 only */ 380 adap_emac->RXUNICASTSET = 0x01; 381 382 /* Enable MII interface and Full duplex mode */ 383 adap_emac->MACCONTROL = (EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE); 384 385 /* Init MDIO & get link state */ 386 clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1; 387 adap_mdio->CONTROL = ((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT); 388 389 if (!phy.get_link_speed(active_phy_addr)) 390 return(0); 391 392 /* Start receive process */ 393 adap_emac->RX0HDP = (u_int32_t)emac_rx_desc; 394 395 debug_emac("- emac_open\n"); 396 397 return(1); 398 } 399 400 /* EMAC Channel Teardown */ 401 static void davinci_eth_ch_teardown(int ch) 402 { 403 dv_reg dly = 0xff; 404 dv_reg cnt; 405 406 debug_emac("+ emac_ch_teardown\n"); 407 408 if (ch == EMAC_CH_TX) { 409 /* Init TX channel teardown */ 410 adap_emac->TXTEARDOWN = 1; 411 for(cnt = 0; cnt != 0xfffffffc; cnt = adap_emac->TX0CP) { 412 /* Wait here for Tx teardown completion interrupt to occur 413 * Note: A task delay can be called here to pend rather than 414 * occupying CPU cycles - anyway it has been found that teardown 415 * takes very few cpu cycles and does not affect functionality */ 416 dly--; 417 udelay(1); 418 if (dly == 0) 419 break; 420 } 421 adap_emac->TX0CP = cnt; 422 adap_emac->TX0HDP = 0; 423 } else { 424 /* Init RX channel teardown */ 425 adap_emac->RXTEARDOWN = 1; 426 for(cnt = 0; cnt != 0xfffffffc; cnt = adap_emac->RX0CP) { 427 /* Wait here for Rx teardown completion interrupt to occur 428 * Note: A task delay can be called here to pend rather than 429 * occupying CPU cycles - anyway it has been found that teardown 430 * takes very few cpu cycles and does not affect functionality */ 431 dly--; 432 udelay(1); 433 if (dly == 0) 434 break; 435 } 436 adap_emac->RX0CP = cnt; 437 adap_emac->RX0HDP = 0; 438 } 439 440 debug_emac("- emac_ch_teardown\n"); 441 } 442 443 /* Eth device close */ 444 static int davinci_eth_close(void) 445 { 446 debug_emac("+ emac_close\n"); 447 448 davinci_eth_ch_teardown(EMAC_CH_TX); /* TX Channel teardown */ 449 davinci_eth_ch_teardown(EMAC_CH_RX); /* RX Channel teardown */ 450 451 /* Reset EMAC module and disable interrupts in wrapper */ 452 adap_emac->SOFTRESET = 1; 453 adap_ewrap->EWCTL = 0; 454 455 debug_emac("- emac_close\n"); 456 return(1); 457 } 458 459 static int tx_send_loop = 0; 460 461 /* 462 * This function sends a single packet on the network and returns 463 * positive number (number of bytes transmitted) or negative for error 464 */ 465 static int davinci_eth_send_packet (volatile void *packet, int length) 466 { 467 int ret_status = -1; 468 469 tx_send_loop = 0; 470 471 /* Return error if no link */ 472 if (!phy.get_link_speed (active_phy_addr)) { 473 printf ("WARN: emac_send_packet: No link\n"); 474 return (ret_status); 475 } 476 477 /* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */ 478 if (length < EMAC_MIN_ETHERNET_PKT_SIZE) { 479 length = EMAC_MIN_ETHERNET_PKT_SIZE; 480 } 481 482 /* Populate the TX descriptor */ 483 emac_tx_desc->next = 0; 484 emac_tx_desc->buffer = (u_int8_t *) packet; 485 emac_tx_desc->buff_off_len = (length & 0xffff); 486 emac_tx_desc->pkt_flag_len = ((length & 0xffff) | 487 EMAC_CPPI_SOP_BIT | 488 EMAC_CPPI_OWNERSHIP_BIT | 489 EMAC_CPPI_EOP_BIT); 490 /* Send the packet */ 491 adap_emac->TX0HDP = (unsigned int) emac_tx_desc; 492 493 /* Wait for packet to complete or link down */ 494 while (1) { 495 if (!phy.get_link_speed (active_phy_addr)) { 496 davinci_eth_ch_teardown (EMAC_CH_TX); 497 return (ret_status); 498 } 499 if (adap_emac->TXINTSTATRAW & 0x01) { 500 ret_status = length; 501 break; 502 } 503 tx_send_loop++; 504 } 505 506 return (ret_status); 507 } 508 509 /* 510 * This function handles receipt of a packet from the network 511 */ 512 static int davinci_eth_rcv_packet (void) 513 { 514 volatile emac_desc *rx_curr_desc; 515 volatile emac_desc *curr_desc; 516 volatile emac_desc *tail_desc; 517 int status, ret = -1; 518 519 rx_curr_desc = emac_rx_active_head; 520 status = rx_curr_desc->pkt_flag_len; 521 if ((rx_curr_desc) && ((status & EMAC_CPPI_OWNERSHIP_BIT) == 0)) { 522 if (status & EMAC_CPPI_RX_ERROR_FRAME) { 523 /* Error in packet - discard it and requeue desc */ 524 printf ("WARN: emac_rcv_pkt: Error in packet\n"); 525 } else { 526 NetReceive (rx_curr_desc->buffer, 527 (rx_curr_desc->buff_off_len & 0xffff)); 528 ret = rx_curr_desc->buff_off_len & 0xffff; 529 } 530 531 /* Ack received packet descriptor */ 532 adap_emac->RX0CP = (unsigned int) rx_curr_desc; 533 curr_desc = rx_curr_desc; 534 emac_rx_active_head = 535 (volatile emac_desc *) rx_curr_desc->next; 536 537 if (status & EMAC_CPPI_EOQ_BIT) { 538 if (emac_rx_active_head) { 539 adap_emac->RX0HDP = 540 (unsigned int) emac_rx_active_head; 541 } else { 542 emac_rx_queue_active = 0; 543 printf ("INFO:emac_rcv_packet: RX Queue not active\n"); 544 } 545 } 546 547 /* Recycle RX descriptor */ 548 rx_curr_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE; 549 rx_curr_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT; 550 rx_curr_desc->next = 0; 551 552 if (emac_rx_active_head == 0) { 553 printf ("INFO: emac_rcv_pkt: active queue head = 0\n"); 554 emac_rx_active_head = curr_desc; 555 emac_rx_active_tail = curr_desc; 556 if (emac_rx_queue_active != 0) { 557 adap_emac->RX0HDP = 558 (unsigned int) emac_rx_active_head; 559 printf ("INFO: emac_rcv_pkt: active queue head = 0, HDP fired\n"); 560 emac_rx_queue_active = 1; 561 } 562 } else { 563 tail_desc = emac_rx_active_tail; 564 emac_rx_active_tail = curr_desc; 565 tail_desc->next = (unsigned int) curr_desc; 566 status = tail_desc->pkt_flag_len; 567 if (status & EMAC_CPPI_EOQ_BIT) { 568 adap_emac->RX0HDP = (unsigned int) curr_desc; 569 status &= ~EMAC_CPPI_EOQ_BIT; 570 tail_desc->pkt_flag_len = status; 571 } 572 } 573 return (ret); 574 } 575 return (0); 576 } 577 578 /* 579 * This function initializes the emac hardware. It does NOT initialize 580 * EMAC modules power or pin multiplexors, that is done by board_init() 581 * much earlier in bootup process. Returns 1 on success, 0 otherwise. 582 */ 583 static int davinci_eth_hw_init(void) 584 { 585 u_int32_t phy_id; 586 u_int16_t tmp; 587 int i; 588 589 davinci_eth_mdio_enable(); 590 591 for (i = 0; i < 256; i++) { 592 if (adap_mdio->ALIVE) 593 break; 594 udelay(10); 595 } 596 597 if (i >= 256) { 598 printf("No ETH PHY detected!!!\n"); 599 return(0); 600 } 601 602 /* Find if a PHY is connected and get it's address */ 603 if (!davinci_eth_phy_detect()) 604 return(0); 605 606 /* Get PHY ID and initialize phy_ops for a detected PHY */ 607 if (!davinci_eth_phy_read(active_phy_addr, PHY_PHYIDR1, &tmp)) { 608 active_phy_addr = 0xff; 609 return(0); 610 } 611 612 phy_id = (tmp << 16) & 0xffff0000; 613 614 if (!davinci_eth_phy_read(active_phy_addr, PHY_PHYIDR2, &tmp)) { 615 active_phy_addr = 0xff; 616 return(0); 617 } 618 619 phy_id |= tmp & 0x0000ffff; 620 621 switch (phy_id) { 622 case PHY_LXT972: 623 sprintf(phy.name, "LXT972 @ 0x%02x", active_phy_addr); 624 phy.init = lxt972_init_phy; 625 phy.is_phy_connected = lxt972_is_phy_connected; 626 phy.get_link_speed = lxt972_get_link_speed; 627 phy.auto_negotiate = lxt972_auto_negotiate; 628 break; 629 case PHY_DP83848: 630 sprintf(phy.name, "DP83848 @ 0x%02x", active_phy_addr); 631 phy.init = dp83848_init_phy; 632 phy.is_phy_connected = dp83848_is_phy_connected; 633 phy.get_link_speed = dp83848_get_link_speed; 634 phy.auto_negotiate = dp83848_auto_negotiate; 635 break; 636 default: 637 sprintf(phy.name, "GENERIC @ 0x%02x", active_phy_addr); 638 phy.init = gen_init_phy; 639 phy.is_phy_connected = gen_is_phy_connected; 640 phy.get_link_speed = gen_get_link_speed; 641 phy.auto_negotiate = gen_auto_negotiate; 642 } 643 644 printf("Ethernet PHY: %s\n", phy.name); 645 646 return(1); 647 } 648