1 /* 2 * (C) Copyright 2009 3 * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #include <common.h> 25 #include <flash.h> 26 #include <linux/err.h> 27 #include <linux/mtd/st_smi.h> 28 29 #include <asm/io.h> 30 #include <asm/arch/hardware.h> 31 32 #if !defined(CONFIG_SYS_NO_FLASH) 33 34 static struct smi_regs *const smicntl = 35 (struct smi_regs * const)CONFIG_SYS_SMI_BASE; 36 static ulong bank_base[CONFIG_SYS_MAX_FLASH_BANKS] = 37 CONFIG_SYS_FLASH_ADDR_BASE; 38 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; 39 40 #define ST_M25Pxx_ID 0x00002020 41 42 static struct flash_dev flash_ids[] = { 43 {0x10, 0x10000, 2}, /* 64K Byte */ 44 {0x11, 0x20000, 4}, /* 128K Byte */ 45 {0x12, 0x40000, 4}, /* 256K Byte */ 46 {0x13, 0x80000, 8}, /* 512K Byte */ 47 {0x14, 0x100000, 16}, /* 1M Byte */ 48 {0x15, 0x200000, 32}, /* 2M Byte */ 49 {0x16, 0x400000, 64}, /* 4M Byte */ 50 {0x17, 0x800000, 128}, /* 8M Byte */ 51 {0x18, 0x1000000, 64}, /* 16M Byte */ 52 {0x00,} 53 }; 54 55 /* 56 * smi_wait_xfer_finish - Wait until TFF is set in status register 57 * @timeout: timeout in milliseconds 58 * 59 * Wait until TFF is set in status register 60 */ 61 static void smi_wait_xfer_finish(int timeout) 62 { 63 while (timeout--) { 64 if (readl(&smicntl->smi_sr) & TFF) 65 break; 66 udelay(1000); 67 } 68 } 69 70 /* 71 * smi_read_id - Read flash id 72 * @info: flash_info structure pointer 73 * @banknum: bank number 74 * 75 * Read the flash id present at bank #banknum 76 */ 77 static unsigned int smi_read_id(flash_info_t *info, int banknum) 78 { 79 unsigned int value; 80 81 writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1); 82 writel(READ_ID, &smicntl->smi_tr); 83 writel((banknum << BANKSEL_SHIFT) | SEND | TX_LEN_1 | RX_LEN_3, 84 &smicntl->smi_cr2); 85 86 smi_wait_xfer_finish(XFER_FINISH_TOUT); 87 88 value = (readl(&smicntl->smi_rr) & 0x00FFFFFF); 89 90 writel(readl(&smicntl->smi_sr) & ~TFF, &smicntl->smi_sr); 91 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1); 92 93 return value; 94 } 95 96 /* 97 * flash_get_size - Detect the SMI flash by reading the ID. 98 * @base: Base address of the flash area bank #banknum 99 * @banknum: Bank number 100 * 101 * Detect the SMI flash by reading the ID. Initializes the flash_info structure 102 * with size, sector count etc. 103 */ 104 static ulong flash_get_size(ulong base, int banknum) 105 { 106 flash_info_t *info = &flash_info[banknum]; 107 struct flash_dev *dev; 108 unsigned int value; 109 unsigned int density; 110 int i; 111 112 value = smi_read_id(info, banknum); 113 density = (value >> 16) & 0xff; 114 115 for (i = 0, dev = &flash_ids[0]; dev->density != 0x0; 116 i++, dev = &flash_ids[i]) { 117 if (dev->density == density) { 118 info->size = dev->size; 119 info->sector_count = dev->sector_count; 120 break; 121 } 122 } 123 124 if (dev->density == 0x0) 125 return 0; 126 127 info->flash_id = value & 0xffff; 128 info->start[0] = base; 129 130 return info->size; 131 } 132 133 /* 134 * smi_read_sr - Read status register of SMI 135 * @bank: bank number 136 * 137 * This routine will get the status register of the flash chip present at the 138 * given bank 139 */ 140 static unsigned int smi_read_sr(int bank) 141 { 142 u32 ctrlreg1; 143 144 /* store the CTRL REG1 state */ 145 ctrlreg1 = readl(&smicntl->smi_cr1); 146 147 /* Program SMI in HW Mode */ 148 writel(readl(&smicntl->smi_cr1) & ~(SW_MODE | WB_MODE), 149 &smicntl->smi_cr1); 150 151 /* Performing a RSR instruction in HW mode */ 152 writel((bank << BANKSEL_SHIFT) | RD_STATUS_REG, &smicntl->smi_cr2); 153 154 smi_wait_xfer_finish(XFER_FINISH_TOUT); 155 156 /* Restore the CTRL REG1 state */ 157 writel(ctrlreg1, &smicntl->smi_cr1); 158 159 return readl(&smicntl->smi_sr); 160 } 161 162 /* 163 * smi_wait_till_ready - Wait till last operation is over. 164 * @bank: bank number shifted. 165 * @timeout: timeout in milliseconds. 166 * 167 * This routine checks for WIP(write in progress)bit in Status register(SMSR-b0) 168 * The routine checks for #timeout loops, each at interval of 1 milli-second. 169 * If successful the routine returns 0. 170 */ 171 static int smi_wait_till_ready(int bank, int timeout) 172 { 173 int count; 174 unsigned int sr; 175 176 /* One chip guarantees max 5 msec wait here after page writes, 177 but potentially three seconds (!) after page erase. */ 178 for (count = 0; count < timeout; count++) { 179 180 sr = smi_read_sr(bank); 181 if (sr < 0) 182 break; 183 else if (!(sr & WIP_BIT)) 184 return 0; 185 186 /* Try again after 1m-sec */ 187 udelay(1000); 188 } 189 printf("SMI controller is still in wait, timeout=%d\n", timeout); 190 return -EIO; 191 } 192 193 /* 194 * smi_write_enable - Enable the flash to do write operation 195 * @bank: bank number 196 * 197 * Set write enable latch with Write Enable command. 198 * Returns negative if error occurred. 199 */ 200 static int smi_write_enable(int bank) 201 { 202 u32 ctrlreg1; 203 int timeout = WMODE_TOUT; 204 205 /* Store the CTRL REG1 state */ 206 ctrlreg1 = readl(&smicntl->smi_cr1); 207 208 /* Program SMI in H/W Mode */ 209 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1); 210 211 /* Give the Flash, Write Enable command */ 212 writel((bank << BANKSEL_SHIFT) | WE, &smicntl->smi_cr2); 213 214 smi_wait_xfer_finish(XFER_FINISH_TOUT); 215 216 /* Restore the CTRL REG1 state */ 217 writel(ctrlreg1, &smicntl->smi_cr1); 218 219 while (timeout--) { 220 if (smi_read_sr(bank) & (1 << (bank + WM_SHIFT))) 221 break; 222 udelay(1000); 223 } 224 225 if (timeout) 226 return 0; 227 228 return -1; 229 } 230 231 /* 232 * smi_init - SMI initialization routine 233 * 234 * SMI initialization routine. Sets SMI control register1. 235 */ 236 void smi_init(void) 237 { 238 /* Setting the fast mode values. SMI working at 166/4 = 41.5 MHz */ 239 writel(HOLD1 | FAST_MODE | BANK_EN | DSEL_TIME | PRESCAL4, 240 &smicntl->smi_cr1); 241 } 242 243 /* 244 * smi_sector_erase - Erase flash sector 245 * @info: flash_info structure pointer 246 * @sector: sector number 247 * 248 * Set write enable latch with Write Enable command. 249 * Returns negative if error occurred. 250 */ 251 static int smi_sector_erase(flash_info_t *info, unsigned int sector) 252 { 253 int bank; 254 unsigned int sect_add; 255 unsigned int instruction; 256 257 switch (info->start[0]) { 258 case SMIBANK0_BASE: 259 bank = BANK0; 260 break; 261 case SMIBANK1_BASE: 262 bank = BANK1; 263 break; 264 case SMIBANK2_BASE: 265 bank = BANK2; 266 break; 267 case SMIBANK3_BASE: 268 bank = BANK3; 269 break; 270 default: 271 return -1; 272 } 273 274 sect_add = sector * (info->size / info->sector_count); 275 instruction = ((sect_add >> 8) & 0x0000FF00) | SECTOR_ERASE; 276 277 writel(readl(&smicntl->smi_sr) & ~(ERF1 | ERF2), &smicntl->smi_sr); 278 279 if (info->flash_id == ST_M25Pxx_ID) { 280 /* Wait until finished previous write command. */ 281 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT)) 282 return -EBUSY; 283 284 /* Send write enable, before erase commands. */ 285 if (smi_write_enable(bank)) 286 return -EIO; 287 288 /* Put SMI in SW mode */ 289 writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1); 290 291 /* Send Sector Erase command in SW Mode */ 292 writel(instruction, &smicntl->smi_tr); 293 writel((bank << BANKSEL_SHIFT) | SEND | TX_LEN_4, 294 &smicntl->smi_cr2); 295 smi_wait_xfer_finish(XFER_FINISH_TOUT); 296 297 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT)) 298 return -EBUSY; 299 300 /* Put SMI in HW mode */ 301 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, 302 &smicntl->smi_cr1); 303 304 return 0; 305 } else { 306 /* Put SMI in HW mode */ 307 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, 308 &smicntl->smi_cr1); 309 return -EINVAL; 310 } 311 } 312 313 /* 314 * smi_write - Write to SMI flash 315 * @src_addr: source buffer 316 * @dst_addr: destination buffer 317 * @length: length to write in words 318 * @bank: bank base address 319 * 320 * Write to SMI flash 321 */ 322 static int smi_write(unsigned int *src_addr, unsigned int *dst_addr, 323 unsigned int length, ulong bank_addr) 324 { 325 int banknum; 326 327 switch (bank_addr) { 328 case SMIBANK0_BASE: 329 banknum = BANK0; 330 break; 331 case SMIBANK1_BASE: 332 banknum = BANK1; 333 break; 334 case SMIBANK2_BASE: 335 banknum = BANK2; 336 break; 337 case SMIBANK3_BASE: 338 banknum = BANK3; 339 break; 340 default: 341 return -1; 342 } 343 344 if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT)) 345 return -EBUSY; 346 347 /* Set SMI in Hardware Mode */ 348 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1); 349 350 if (smi_write_enable(banknum)) 351 return -EIO; 352 353 /* Perform the write command */ 354 while (length--) { 355 if (((ulong) (dst_addr) % SFLASH_PAGE_SIZE) == 0) { 356 if (smi_wait_till_ready(banknum, 357 CONFIG_SYS_FLASH_WRITE_TOUT)) 358 return -EBUSY; 359 360 if (smi_write_enable(banknum)) 361 return -EIO; 362 } 363 364 *dst_addr++ = *src_addr++; 365 366 if ((readl(&smicntl->smi_sr) & (ERF1 | ERF2))) 367 return -EIO; 368 } 369 370 if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT)) 371 return -EBUSY; 372 373 writel(readl(&smicntl->smi_sr) & ~(WCF), &smicntl->smi_sr); 374 375 return 0; 376 } 377 378 /* 379 * write_buff - Write to SMI flash 380 * @info: flash info structure 381 * @src: source buffer 382 * @dest_addr: destination buffer 383 * @length: length to write in words 384 * 385 * Write to SMI flash 386 */ 387 int write_buff(flash_info_t *info, uchar *src, ulong dest_addr, ulong length) 388 { 389 return smi_write((unsigned int *)src, (unsigned int *)dest_addr, 390 (length + 3) / 4, info->start[0]); 391 } 392 393 /* 394 * flash_init - SMI flash initialization 395 * 396 * SMI flash initialization 397 */ 398 unsigned long flash_init(void) 399 { 400 unsigned long size = 0; 401 int i, j; 402 403 smi_init(); 404 405 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 406 flash_info[i].flash_id = FLASH_UNKNOWN; 407 size += flash_info[i].size = flash_get_size(bank_base[i], i); 408 } 409 410 for (j = 0; j < CONFIG_SYS_MAX_FLASH_BANKS; j++) { 411 for (i = 1; i < flash_info[j].sector_count; i++) 412 flash_info[j].start[i] = 413 flash_info[j].start[i - 1] + 414 flash_info->size / flash_info->sector_count; 415 416 } 417 418 return size; 419 } 420 421 /* 422 * flash_print_info - Print SMI flash information 423 * 424 * Print SMI flash information 425 */ 426 void flash_print_info(flash_info_t *info) 427 { 428 int i; 429 if (info->flash_id == FLASH_UNKNOWN) { 430 puts("missing or unknown FLASH type\n"); 431 return; 432 } 433 printf(" Size: %ld MB in %d Sectors\n", 434 info->size >> 20, info->sector_count); 435 436 puts(" Sector Start Addresses:"); 437 for (i = 0; i < info->sector_count; ++i) { 438 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 439 int size; 440 int erased; 441 u32 *flash; 442 443 /* 444 * Check if whole sector is erased 445 */ 446 size = (info->size) / (info->sector_count); 447 flash = (u32 *) info->start[i]; 448 size = size / sizeof(int); 449 450 while ((size--) && (*flash++ == ~0)) 451 ; 452 453 size++; 454 if (size) 455 erased = 0; 456 else 457 erased = 1; 458 459 if ((i % 5) == 0) 460 printf("\n"); 461 462 printf(" %08lX%s%s", 463 info->start[i], 464 erased ? " E" : " ", info->protect[i] ? "RO " : " "); 465 #else 466 if ((i % 5) == 0) 467 printf("\n "); 468 printf(" %08lX%s", 469 info->start[i], info->protect[i] ? " (RO) " : " "); 470 #endif 471 } 472 putc('\n'); 473 return; 474 } 475 476 /* 477 * flash_erase - Erase SMI flash 478 * 479 * Erase SMI flash 480 */ 481 int flash_erase(flash_info_t *info, int s_first, int s_last) 482 { 483 int rcode = 0; 484 int prot = 0; 485 flash_sect_t sect; 486 487 if (info->flash_id != ST_M25Pxx_ID) { 488 puts("Can't erase unknown flash type - aborted\n"); 489 return 1; 490 } 491 492 if ((s_first < 0) || (s_first > s_last)) { 493 puts("- no sectors to erase\n"); 494 return 1; 495 } 496 497 for (sect = s_first; sect <= s_last; ++sect) { 498 if (info->protect[sect]) 499 prot++; 500 } 501 if (prot) { 502 printf("- Warning: %d protected sectors will not be erased!\n", 503 prot); 504 } else { 505 putc('\n'); 506 } 507 508 for (sect = s_first; sect <= s_last; sect++) { 509 if (info->protect[sect] == 0) { 510 if (smi_sector_erase(info, sect)) 511 rcode = 1; 512 else 513 putc('.'); 514 } 515 } 516 puts(" done\n"); 517 return rcode; 518 } 519 #endif 520