1 /* 2 * (C) Copyright 2009 3 * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #include <common.h> 25 #include <flash.h> 26 #include <linux/err.h> 27 #include <linux/mtd/st_smi.h> 28 29 #include <asm/io.h> 30 #include <asm/arch/hardware.h> 31 32 #if !defined(CONFIG_SYS_NO_FLASH) 33 34 static struct smi_regs *const smicntl = 35 (struct smi_regs * const)CONFIG_SYS_SMI_BASE; 36 static ulong bank_base[CONFIG_SYS_MAX_FLASH_BANKS] = 37 CONFIG_SYS_FLASH_ADDR_BASE; 38 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; 39 40 /* data structure to maintain flash ids from different vendors */ 41 struct flash_device { 42 char *name; 43 u8 erase_cmd; 44 u32 device_id; 45 u32 pagesize; 46 unsigned long sectorsize; 47 unsigned long size_in_bytes; 48 }; 49 50 #define FLASH_ID(n, es, id, psize, ssize, size) \ 51 { \ 52 .name = n, \ 53 .erase_cmd = es, \ 54 .device_id = id, \ 55 .pagesize = psize, \ 56 .sectorsize = ssize, \ 57 .size_in_bytes = size \ 58 } 59 60 /* 61 * List of supported flash devices. 62 * Currently the erase_cmd field is not used in this driver. 63 */ 64 static struct flash_device flash_devices[] = { 65 FLASH_ID("st m25p16" , 0xd8, 0x00152020, 0x100, 0x10000, 0x200000), 66 FLASH_ID("st m25p32" , 0xd8, 0x00162020, 0x100, 0x10000, 0x400000), 67 FLASH_ID("st m25p64" , 0xd8, 0x00172020, 0x100, 0x10000, 0x800000), 68 FLASH_ID("st m25p128" , 0xd8, 0x00182020, 0x100, 0x40000, 0x1000000), 69 FLASH_ID("st m25p05" , 0xd8, 0x00102020, 0x80 , 0x8000 , 0x10000), 70 FLASH_ID("st m25p10" , 0xd8, 0x00112020, 0x80 , 0x8000 , 0x20000), 71 FLASH_ID("st m25p20" , 0xd8, 0x00122020, 0x100, 0x10000, 0x40000), 72 FLASH_ID("st m25p40" , 0xd8, 0x00132020, 0x100, 0x10000, 0x80000), 73 FLASH_ID("st m25p80" , 0xd8, 0x00142020, 0x100, 0x10000, 0x100000), 74 FLASH_ID("st m45pe10" , 0xd8, 0x00114020, 0x100, 0x10000, 0x20000), 75 FLASH_ID("st m45pe20" , 0xd8, 0x00124020, 0x100, 0x10000, 0x40000), 76 FLASH_ID("st m45pe40" , 0xd8, 0x00134020, 0x100, 0x10000, 0x80000), 77 FLASH_ID("st m45pe80" , 0xd8, 0x00144020, 0x100, 0x10000, 0x100000), 78 FLASH_ID("sp s25fl004" , 0xd8, 0x00120201, 0x100, 0x10000, 0x80000), 79 FLASH_ID("sp s25fl008" , 0xd8, 0x00130201, 0x100, 0x10000, 0x100000), 80 FLASH_ID("sp s25fl016" , 0xd8, 0x00140201, 0x100, 0x10000, 0x200000), 81 FLASH_ID("sp s25fl032" , 0xd8, 0x00150201, 0x100, 0x10000, 0x400000), 82 FLASH_ID("sp s25fl064" , 0xd8, 0x00160201, 0x100, 0x10000, 0x800000), 83 FLASH_ID("mac 25l512" , 0xd8, 0x001020C2, 0x010, 0x10000, 0x10000), 84 FLASH_ID("mac 25l1005" , 0xd8, 0x001120C2, 0x010, 0x10000, 0x20000), 85 FLASH_ID("mac 25l2005" , 0xd8, 0x001220C2, 0x010, 0x10000, 0x40000), 86 FLASH_ID("mac 25l4005" , 0xd8, 0x001320C2, 0x010, 0x10000, 0x80000), 87 FLASH_ID("mac 25l4005a" , 0xd8, 0x001320C2, 0x010, 0x10000, 0x80000), 88 FLASH_ID("mac 25l8005" , 0xd8, 0x001420C2, 0x010, 0x10000, 0x100000), 89 FLASH_ID("mac 25l1605" , 0xd8, 0x001520C2, 0x100, 0x10000, 0x200000), 90 FLASH_ID("mac 25l1605a" , 0xd8, 0x001520C2, 0x010, 0x10000, 0x200000), 91 FLASH_ID("mac 25l3205" , 0xd8, 0x001620C2, 0x100, 0x10000, 0x400000), 92 FLASH_ID("mac 25l3205a" , 0xd8, 0x001620C2, 0x100, 0x10000, 0x400000), 93 FLASH_ID("mac 25l6405" , 0xd8, 0x001720C2, 0x100, 0x10000, 0x800000), 94 FLASH_ID("wbd w25q128" , 0xd8, 0x001840EF, 0x1000, 0x10000, 0x1000000), 95 }; 96 97 /* 98 * smi_wait_xfer_finish - Wait until TFF is set in status register 99 * @timeout: timeout in milliseconds 100 * 101 * Wait until TFF is set in status register 102 */ 103 static int smi_wait_xfer_finish(int timeout) 104 { 105 do { 106 if (readl(&smicntl->smi_sr) & TFF) 107 return 0; 108 udelay(1000); 109 } while (timeout--); 110 111 return -1; 112 } 113 114 /* 115 * smi_read_id - Read flash id 116 * @info: flash_info structure pointer 117 * @banknum: bank number 118 * 119 * Read the flash id present at bank #banknum 120 */ 121 static unsigned int smi_read_id(flash_info_t *info, int banknum) 122 { 123 unsigned int value; 124 125 writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1); 126 writel(READ_ID, &smicntl->smi_tr); 127 writel((banknum << BANKSEL_SHIFT) | SEND | TX_LEN_1 | RX_LEN_3, 128 &smicntl->smi_cr2); 129 130 if (smi_wait_xfer_finish(XFER_FINISH_TOUT)) 131 return -EIO; 132 133 value = (readl(&smicntl->smi_rr) & 0x00FFFFFF); 134 135 writel(readl(&smicntl->smi_sr) & ~TFF, &smicntl->smi_sr); 136 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1); 137 138 return value; 139 } 140 141 /* 142 * flash_get_size - Detect the SMI flash by reading the ID. 143 * @base: Base address of the flash area bank #banknum 144 * @banknum: Bank number 145 * 146 * Detect the SMI flash by reading the ID. Initializes the flash_info structure 147 * with size, sector count etc. 148 */ 149 static ulong flash_get_size(ulong base, int banknum) 150 { 151 flash_info_t *info = &flash_info[banknum]; 152 int value; 153 int i; 154 155 value = smi_read_id(info, banknum); 156 157 if (value < 0) { 158 printf("Flash id could not be read\n"); 159 return 0; 160 } 161 162 /* Matches chip-id to entire list of 'serial-nor flash' ids */ 163 for (i = 0; i < ARRAY_SIZE(flash_devices); i++) { 164 if (flash_devices[i].device_id == value) { 165 info->size = flash_devices[i].size_in_bytes; 166 info->flash_id = value; 167 info->start[0] = base; 168 info->sector_count = 169 info->size/flash_devices[i].sectorsize; 170 171 return info->size; 172 } 173 } 174 175 return 0; 176 } 177 178 /* 179 * smi_read_sr - Read status register of SMI 180 * @bank: bank number 181 * 182 * This routine will get the status register of the flash chip present at the 183 * given bank 184 */ 185 static int smi_read_sr(int bank) 186 { 187 u32 ctrlreg1, val; 188 189 /* store the CTRL REG1 state */ 190 ctrlreg1 = readl(&smicntl->smi_cr1); 191 192 /* Program SMI in HW Mode */ 193 writel(readl(&smicntl->smi_cr1) & ~(SW_MODE | WB_MODE), 194 &smicntl->smi_cr1); 195 196 /* Performing a RSR instruction in HW mode */ 197 writel((bank << BANKSEL_SHIFT) | RD_STATUS_REG, &smicntl->smi_cr2); 198 199 if (smi_wait_xfer_finish(XFER_FINISH_TOUT)) 200 return -1; 201 202 val = readl(&smicntl->smi_sr); 203 204 /* Restore the CTRL REG1 state */ 205 writel(ctrlreg1, &smicntl->smi_cr1); 206 207 return val; 208 } 209 210 /* 211 * smi_wait_till_ready - Wait till last operation is over. 212 * @bank: bank number shifted. 213 * @timeout: timeout in milliseconds. 214 * 215 * This routine checks for WIP(write in progress)bit in Status register(SMSR-b0) 216 * The routine checks for #timeout loops, each at interval of 1 milli-second. 217 * If successful the routine returns 0. 218 */ 219 static int smi_wait_till_ready(int bank, int timeout) 220 { 221 int sr; 222 223 /* One chip guarantees max 5 msec wait here after page writes, 224 but potentially three seconds (!) after page erase. */ 225 do { 226 sr = smi_read_sr(bank); 227 if ((sr >= 0) && (!(sr & WIP_BIT))) 228 return 0; 229 230 /* Try again after 1m-sec */ 231 udelay(1000); 232 } while (timeout--); 233 234 printf("SMI controller is still in wait, timeout=%d\n", timeout); 235 return -EIO; 236 } 237 238 /* 239 * smi_write_enable - Enable the flash to do write operation 240 * @bank: bank number 241 * 242 * Set write enable latch with Write Enable command. 243 * Returns negative if error occurred. 244 */ 245 static int smi_write_enable(int bank) 246 { 247 u32 ctrlreg1; 248 int timeout = WMODE_TOUT; 249 int sr; 250 251 /* Store the CTRL REG1 state */ 252 ctrlreg1 = readl(&smicntl->smi_cr1); 253 254 /* Program SMI in H/W Mode */ 255 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1); 256 257 /* Give the Flash, Write Enable command */ 258 writel((bank << BANKSEL_SHIFT) | WE, &smicntl->smi_cr2); 259 260 if (smi_wait_xfer_finish(XFER_FINISH_TOUT)) 261 return -1; 262 263 /* Restore the CTRL REG1 state */ 264 writel(ctrlreg1, &smicntl->smi_cr1); 265 266 do { 267 sr = smi_read_sr(bank); 268 if ((sr >= 0) && (sr & (1 << (bank + WM_SHIFT)))) 269 return 0; 270 271 /* Try again after 1m-sec */ 272 udelay(1000); 273 } while (timeout--); 274 275 return -1; 276 } 277 278 /* 279 * smi_init - SMI initialization routine 280 * 281 * SMI initialization routine. Sets SMI control register1. 282 */ 283 void smi_init(void) 284 { 285 /* Setting the fast mode values. SMI working at 166/4 = 41.5 MHz */ 286 writel(HOLD1 | FAST_MODE | BANK_EN | DSEL_TIME | PRESCAL4, 287 &smicntl->smi_cr1); 288 } 289 290 /* 291 * smi_sector_erase - Erase flash sector 292 * @info: flash_info structure pointer 293 * @sector: sector number 294 * 295 * Set write enable latch with Write Enable command. 296 * Returns negative if error occurred. 297 */ 298 static int smi_sector_erase(flash_info_t *info, unsigned int sector) 299 { 300 int bank; 301 unsigned int sect_add; 302 unsigned int instruction; 303 304 switch (info->start[0]) { 305 case SMIBANK0_BASE: 306 bank = BANK0; 307 break; 308 case SMIBANK1_BASE: 309 bank = BANK1; 310 break; 311 case SMIBANK2_BASE: 312 bank = BANK2; 313 break; 314 case SMIBANK3_BASE: 315 bank = BANK3; 316 break; 317 default: 318 return -1; 319 } 320 321 sect_add = sector * (info->size / info->sector_count); 322 instruction = ((sect_add >> 8) & 0x0000FF00) | SECTOR_ERASE; 323 324 writel(readl(&smicntl->smi_sr) & ~(ERF1 | ERF2), &smicntl->smi_sr); 325 326 /* Wait until finished previous write command. */ 327 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT)) 328 return -EBUSY; 329 330 /* Send write enable, before erase commands. */ 331 if (smi_write_enable(bank)) 332 return -EIO; 333 334 /* Put SMI in SW mode */ 335 writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1); 336 337 /* Send Sector Erase command in SW Mode */ 338 writel(instruction, &smicntl->smi_tr); 339 writel((bank << BANKSEL_SHIFT) | SEND | TX_LEN_4, 340 &smicntl->smi_cr2); 341 if (smi_wait_xfer_finish(XFER_FINISH_TOUT)) 342 return -EIO; 343 344 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT)) 345 return -EBUSY; 346 347 /* Put SMI in HW mode */ 348 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, 349 &smicntl->smi_cr1); 350 351 return 0; 352 } 353 354 /* 355 * smi_write - Write to SMI flash 356 * @src_addr: source buffer 357 * @dst_addr: destination buffer 358 * @length: length to write in words 359 * @bank: bank base address 360 * 361 * Write to SMI flash 362 */ 363 static int smi_write(unsigned int *src_addr, unsigned int *dst_addr, 364 unsigned int length, ulong bank_addr) 365 { 366 int banknum; 367 368 switch (bank_addr) { 369 case SMIBANK0_BASE: 370 banknum = BANK0; 371 break; 372 case SMIBANK1_BASE: 373 banknum = BANK1; 374 break; 375 case SMIBANK2_BASE: 376 banknum = BANK2; 377 break; 378 case SMIBANK3_BASE: 379 banknum = BANK3; 380 break; 381 default: 382 return -1; 383 } 384 385 if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT)) 386 return -EBUSY; 387 388 /* Set SMI in Hardware Mode */ 389 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1); 390 391 if (smi_write_enable(banknum)) 392 return -EIO; 393 394 /* Perform the write command */ 395 while (length--) { 396 if (((ulong) (dst_addr) % SFLASH_PAGE_SIZE) == 0) { 397 if (smi_wait_till_ready(banknum, 398 CONFIG_SYS_FLASH_WRITE_TOUT)) 399 return -EBUSY; 400 401 if (smi_write_enable(banknum)) 402 return -EIO; 403 } 404 405 *dst_addr++ = *src_addr++; 406 407 if ((readl(&smicntl->smi_sr) & (ERF1 | ERF2))) 408 return -EIO; 409 } 410 411 if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT)) 412 return -EBUSY; 413 414 writel(readl(&smicntl->smi_sr) & ~(WCF), &smicntl->smi_sr); 415 416 return 0; 417 } 418 419 /* 420 * write_buff - Write to SMI flash 421 * @info: flash info structure 422 * @src: source buffer 423 * @dest_addr: destination buffer 424 * @length: length to write in words 425 * 426 * Write to SMI flash 427 */ 428 int write_buff(flash_info_t *info, uchar *src, ulong dest_addr, ulong length) 429 { 430 return smi_write((unsigned int *)src, (unsigned int *)dest_addr, 431 (length + 3) / 4, info->start[0]); 432 } 433 434 /* 435 * flash_init - SMI flash initialization 436 * 437 * SMI flash initialization 438 */ 439 unsigned long flash_init(void) 440 { 441 unsigned long size = 0; 442 int i, j; 443 444 smi_init(); 445 446 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 447 flash_info[i].flash_id = FLASH_UNKNOWN; 448 size += flash_info[i].size = flash_get_size(bank_base[i], i); 449 } 450 451 for (j = 0; j < CONFIG_SYS_MAX_FLASH_BANKS; j++) { 452 for (i = 1; i < flash_info[j].sector_count; i++) 453 flash_info[j].start[i] = 454 flash_info[j].start[i - 1] + 455 flash_info->size / flash_info->sector_count; 456 457 } 458 459 return size; 460 } 461 462 /* 463 * flash_print_info - Print SMI flash information 464 * 465 * Print SMI flash information 466 */ 467 void flash_print_info(flash_info_t *info) 468 { 469 int i; 470 if (info->flash_id == FLASH_UNKNOWN) { 471 puts("missing or unknown FLASH type\n"); 472 return; 473 } 474 475 if (info->size >= 0x100000) 476 printf(" Size: %ld MB in %d Sectors\n", 477 info->size >> 20, info->sector_count); 478 else 479 printf(" Size: %ld KB in %d Sectors\n", 480 info->size >> 10, info->sector_count); 481 482 puts(" Sector Start Addresses:"); 483 for (i = 0; i < info->sector_count; ++i) { 484 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 485 int size; 486 int erased; 487 u32 *flash; 488 489 /* 490 * Check if whole sector is erased 491 */ 492 size = (info->size) / (info->sector_count); 493 flash = (u32 *) info->start[i]; 494 size = size / sizeof(int); 495 496 while ((size--) && (*flash++ == ~0)) 497 ; 498 499 size++; 500 if (size) 501 erased = 0; 502 else 503 erased = 1; 504 505 if ((i % 5) == 0) 506 printf("\n"); 507 508 printf(" %08lX%s%s", 509 info->start[i], 510 erased ? " E" : " ", info->protect[i] ? "RO " : " "); 511 #else 512 if ((i % 5) == 0) 513 printf("\n "); 514 printf(" %08lX%s", 515 info->start[i], info->protect[i] ? " (RO) " : " "); 516 #endif 517 } 518 putc('\n'); 519 return; 520 } 521 522 /* 523 * flash_erase - Erase SMI flash 524 * 525 * Erase SMI flash 526 */ 527 int flash_erase(flash_info_t *info, int s_first, int s_last) 528 { 529 int rcode = 0; 530 int prot = 0; 531 flash_sect_t sect; 532 533 if ((s_first < 0) || (s_first > s_last)) { 534 puts("- no sectors to erase\n"); 535 return 1; 536 } 537 538 for (sect = s_first; sect <= s_last; ++sect) { 539 if (info->protect[sect]) 540 prot++; 541 } 542 if (prot) { 543 printf("- Warning: %d protected sectors will not be erased!\n", 544 prot); 545 } else { 546 putc('\n'); 547 } 548 549 for (sect = s_first; sect <= s_last; sect++) { 550 if (info->protect[sect] == 0) { 551 if (smi_sector_erase(info, sect)) 552 rcode = 1; 553 else 554 putc('.'); 555 } 556 } 557 puts(" done\n"); 558 return rcode; 559 } 560 #endif 561