1 /* 2 * (C) Copyright 2009 3 * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com. 4 * 5 * See file CREDITS for list of people who contributed to this 6 * project. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #include <common.h> 25 #include <flash.h> 26 #include <linux/err.h> 27 #include <linux/mtd/st_smi.h> 28 29 #include <asm/io.h> 30 #include <asm/arch/hardware.h> 31 32 #if !defined(CONFIG_SYS_NO_FLASH) 33 34 static struct smi_regs *const smicntl = 35 (struct smi_regs * const)CONFIG_SYS_SMI_BASE; 36 static ulong bank_base[CONFIG_SYS_MAX_FLASH_BANKS] = 37 CONFIG_SYS_FLASH_ADDR_BASE; 38 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; 39 40 #define ST_M25Pxx_ID 0x00002020 41 42 static struct flash_dev flash_ids[] = { 43 {0x10, 0x10000, 2}, /* 64K Byte */ 44 {0x11, 0x20000, 4}, /* 128K Byte */ 45 {0x12, 0x40000, 4}, /* 256K Byte */ 46 {0x13, 0x80000, 8}, /* 512K Byte */ 47 {0x14, 0x100000, 16}, /* 1M Byte */ 48 {0x15, 0x200000, 32}, /* 2M Byte */ 49 {0x16, 0x400000, 64}, /* 4M Byte */ 50 {0x17, 0x800000, 128}, /* 8M Byte */ 51 {0x18, 0x1000000, 64}, /* 16M Byte */ 52 {0x00,} 53 }; 54 55 /* 56 * smi_wait_xfer_finish - Wait until TFF is set in status register 57 * @timeout: timeout in milliseconds 58 * 59 * Wait until TFF is set in status register 60 */ 61 static int smi_wait_xfer_finish(int timeout) 62 { 63 do { 64 if (readl(&smicntl->smi_sr) & TFF) 65 return 0; 66 udelay(1000); 67 } while (timeout--); 68 69 return -1; 70 } 71 72 /* 73 * smi_read_id - Read flash id 74 * @info: flash_info structure pointer 75 * @banknum: bank number 76 * 77 * Read the flash id present at bank #banknum 78 */ 79 static unsigned int smi_read_id(flash_info_t *info, int banknum) 80 { 81 unsigned int value; 82 83 writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1); 84 writel(READ_ID, &smicntl->smi_tr); 85 writel((banknum << BANKSEL_SHIFT) | SEND | TX_LEN_1 | RX_LEN_3, 86 &smicntl->smi_cr2); 87 88 if (smi_wait_xfer_finish(XFER_FINISH_TOUT)) 89 return -EIO; 90 91 value = (readl(&smicntl->smi_rr) & 0x00FFFFFF); 92 93 writel(readl(&smicntl->smi_sr) & ~TFF, &smicntl->smi_sr); 94 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1); 95 96 return value; 97 } 98 99 /* 100 * flash_get_size - Detect the SMI flash by reading the ID. 101 * @base: Base address of the flash area bank #banknum 102 * @banknum: Bank number 103 * 104 * Detect the SMI flash by reading the ID. Initializes the flash_info structure 105 * with size, sector count etc. 106 */ 107 static ulong flash_get_size(ulong base, int banknum) 108 { 109 flash_info_t *info = &flash_info[banknum]; 110 struct flash_dev *dev; 111 int value; 112 unsigned int density; 113 int i; 114 115 value = smi_read_id(info, banknum); 116 117 if (value < 0) { 118 printf("Flash id could not be read\n"); 119 return 0; 120 } 121 122 density = (value >> 16) & 0xff; 123 124 for (i = 0, dev = &flash_ids[0]; dev->density != 0x0; 125 i++, dev = &flash_ids[i]) { 126 if (dev->density == density) { 127 info->size = dev->size; 128 info->sector_count = dev->sector_count; 129 break; 130 } 131 } 132 133 if (dev->density == 0x0) 134 return 0; 135 136 info->flash_id = value & 0xffff; 137 info->start[0] = base; 138 139 return info->size; 140 } 141 142 /* 143 * smi_read_sr - Read status register of SMI 144 * @bank: bank number 145 * 146 * This routine will get the status register of the flash chip present at the 147 * given bank 148 */ 149 static int smi_read_sr(int bank) 150 { 151 u32 ctrlreg1; 152 153 /* store the CTRL REG1 state */ 154 ctrlreg1 = readl(&smicntl->smi_cr1); 155 156 /* Program SMI in HW Mode */ 157 writel(readl(&smicntl->smi_cr1) & ~(SW_MODE | WB_MODE), 158 &smicntl->smi_cr1); 159 160 /* Performing a RSR instruction in HW mode */ 161 writel((bank << BANKSEL_SHIFT) | RD_STATUS_REG, &smicntl->smi_cr2); 162 163 if (smi_wait_xfer_finish(XFER_FINISH_TOUT)) 164 return -1; 165 166 /* Restore the CTRL REG1 state */ 167 writel(ctrlreg1, &smicntl->smi_cr1); 168 169 return readl(&smicntl->smi_sr); 170 } 171 172 /* 173 * smi_wait_till_ready - Wait till last operation is over. 174 * @bank: bank number shifted. 175 * @timeout: timeout in milliseconds. 176 * 177 * This routine checks for WIP(write in progress)bit in Status register(SMSR-b0) 178 * The routine checks for #timeout loops, each at interval of 1 milli-second. 179 * If successful the routine returns 0. 180 */ 181 static int smi_wait_till_ready(int bank, int timeout) 182 { 183 int sr; 184 185 /* One chip guarantees max 5 msec wait here after page writes, 186 but potentially three seconds (!) after page erase. */ 187 do { 188 sr = smi_read_sr(bank); 189 if (sr < 0) 190 continue; /* try until timeout */ 191 else if (!(sr & WIP_BIT)) 192 return 0; 193 194 /* Try again after 1m-sec */ 195 udelay(1000); 196 } while (timeout--); 197 198 printf("SMI controller is still in wait, timeout=%d\n", timeout); 199 return -EIO; 200 } 201 202 /* 203 * smi_write_enable - Enable the flash to do write operation 204 * @bank: bank number 205 * 206 * Set write enable latch with Write Enable command. 207 * Returns negative if error occurred. 208 */ 209 static int smi_write_enable(int bank) 210 { 211 u32 ctrlreg1; 212 int timeout = WMODE_TOUT; 213 int sr; 214 215 /* Store the CTRL REG1 state */ 216 ctrlreg1 = readl(&smicntl->smi_cr1); 217 218 /* Program SMI in H/W Mode */ 219 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1); 220 221 /* Give the Flash, Write Enable command */ 222 writel((bank << BANKSEL_SHIFT) | WE, &smicntl->smi_cr2); 223 224 if (smi_wait_xfer_finish(XFER_FINISH_TOUT)) 225 return -1; 226 227 /* Restore the CTRL REG1 state */ 228 writel(ctrlreg1, &smicntl->smi_cr1); 229 230 do { 231 sr = smi_read_sr(bank); 232 if (sr < 0) 233 break; 234 else if (sr & (1 << (bank + WM_SHIFT))) 235 return 0; 236 237 /* Try again after 1m-sec */ 238 udelay(1000); 239 } while (timeout--); 240 241 return -1; 242 } 243 244 /* 245 * smi_init - SMI initialization routine 246 * 247 * SMI initialization routine. Sets SMI control register1. 248 */ 249 void smi_init(void) 250 { 251 /* Setting the fast mode values. SMI working at 166/4 = 41.5 MHz */ 252 writel(HOLD1 | FAST_MODE | BANK_EN | DSEL_TIME | PRESCAL4, 253 &smicntl->smi_cr1); 254 } 255 256 /* 257 * smi_sector_erase - Erase flash sector 258 * @info: flash_info structure pointer 259 * @sector: sector number 260 * 261 * Set write enable latch with Write Enable command. 262 * Returns negative if error occurred. 263 */ 264 static int smi_sector_erase(flash_info_t *info, unsigned int sector) 265 { 266 int bank; 267 unsigned int sect_add; 268 unsigned int instruction; 269 270 switch (info->start[0]) { 271 case SMIBANK0_BASE: 272 bank = BANK0; 273 break; 274 case SMIBANK1_BASE: 275 bank = BANK1; 276 break; 277 case SMIBANK2_BASE: 278 bank = BANK2; 279 break; 280 case SMIBANK3_BASE: 281 bank = BANK3; 282 break; 283 default: 284 return -1; 285 } 286 287 sect_add = sector * (info->size / info->sector_count); 288 instruction = ((sect_add >> 8) & 0x0000FF00) | SECTOR_ERASE; 289 290 writel(readl(&smicntl->smi_sr) & ~(ERF1 | ERF2), &smicntl->smi_sr); 291 292 if (info->flash_id == ST_M25Pxx_ID) { 293 /* Wait until finished previous write command. */ 294 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT)) 295 return -EBUSY; 296 297 /* Send write enable, before erase commands. */ 298 if (smi_write_enable(bank)) 299 return -EIO; 300 301 /* Put SMI in SW mode */ 302 writel(readl(&smicntl->smi_cr1) | SW_MODE, &smicntl->smi_cr1); 303 304 /* Send Sector Erase command in SW Mode */ 305 writel(instruction, &smicntl->smi_tr); 306 writel((bank << BANKSEL_SHIFT) | SEND | TX_LEN_4, 307 &smicntl->smi_cr2); 308 if (smi_wait_xfer_finish(XFER_FINISH_TOUT)) 309 return -EIO; 310 311 if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT)) 312 return -EBUSY; 313 314 /* Put SMI in HW mode */ 315 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, 316 &smicntl->smi_cr1); 317 318 return 0; 319 } else { 320 /* Put SMI in HW mode */ 321 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, 322 &smicntl->smi_cr1); 323 return -EINVAL; 324 } 325 } 326 327 /* 328 * smi_write - Write to SMI flash 329 * @src_addr: source buffer 330 * @dst_addr: destination buffer 331 * @length: length to write in words 332 * @bank: bank base address 333 * 334 * Write to SMI flash 335 */ 336 static int smi_write(unsigned int *src_addr, unsigned int *dst_addr, 337 unsigned int length, ulong bank_addr) 338 { 339 int banknum; 340 341 switch (bank_addr) { 342 case SMIBANK0_BASE: 343 banknum = BANK0; 344 break; 345 case SMIBANK1_BASE: 346 banknum = BANK1; 347 break; 348 case SMIBANK2_BASE: 349 banknum = BANK2; 350 break; 351 case SMIBANK3_BASE: 352 banknum = BANK3; 353 break; 354 default: 355 return -1; 356 } 357 358 if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT)) 359 return -EBUSY; 360 361 /* Set SMI in Hardware Mode */ 362 writel(readl(&smicntl->smi_cr1) & ~SW_MODE, &smicntl->smi_cr1); 363 364 if (smi_write_enable(banknum)) 365 return -EIO; 366 367 /* Perform the write command */ 368 while (length--) { 369 if (((ulong) (dst_addr) % SFLASH_PAGE_SIZE) == 0) { 370 if (smi_wait_till_ready(banknum, 371 CONFIG_SYS_FLASH_WRITE_TOUT)) 372 return -EBUSY; 373 374 if (smi_write_enable(banknum)) 375 return -EIO; 376 } 377 378 *dst_addr++ = *src_addr++; 379 380 if ((readl(&smicntl->smi_sr) & (ERF1 | ERF2))) 381 return -EIO; 382 } 383 384 if (smi_wait_till_ready(banknum, CONFIG_SYS_FLASH_WRITE_TOUT)) 385 return -EBUSY; 386 387 writel(readl(&smicntl->smi_sr) & ~(WCF), &smicntl->smi_sr); 388 389 return 0; 390 } 391 392 /* 393 * write_buff - Write to SMI flash 394 * @info: flash info structure 395 * @src: source buffer 396 * @dest_addr: destination buffer 397 * @length: length to write in words 398 * 399 * Write to SMI flash 400 */ 401 int write_buff(flash_info_t *info, uchar *src, ulong dest_addr, ulong length) 402 { 403 return smi_write((unsigned int *)src, (unsigned int *)dest_addr, 404 (length + 3) / 4, info->start[0]); 405 } 406 407 /* 408 * flash_init - SMI flash initialization 409 * 410 * SMI flash initialization 411 */ 412 unsigned long flash_init(void) 413 { 414 unsigned long size = 0; 415 int i, j; 416 417 smi_init(); 418 419 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { 420 flash_info[i].flash_id = FLASH_UNKNOWN; 421 size += flash_info[i].size = flash_get_size(bank_base[i], i); 422 } 423 424 for (j = 0; j < CONFIG_SYS_MAX_FLASH_BANKS; j++) { 425 for (i = 1; i < flash_info[j].sector_count; i++) 426 flash_info[j].start[i] = 427 flash_info[j].start[i - 1] + 428 flash_info->size / flash_info->sector_count; 429 430 } 431 432 return size; 433 } 434 435 /* 436 * flash_print_info - Print SMI flash information 437 * 438 * Print SMI flash information 439 */ 440 void flash_print_info(flash_info_t *info) 441 { 442 int i; 443 if (info->flash_id == FLASH_UNKNOWN) { 444 puts("missing or unknown FLASH type\n"); 445 return; 446 } 447 printf(" Size: %ld MB in %d Sectors\n", 448 info->size >> 20, info->sector_count); 449 450 puts(" Sector Start Addresses:"); 451 for (i = 0; i < info->sector_count; ++i) { 452 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO 453 int size; 454 int erased; 455 u32 *flash; 456 457 /* 458 * Check if whole sector is erased 459 */ 460 size = (info->size) / (info->sector_count); 461 flash = (u32 *) info->start[i]; 462 size = size / sizeof(int); 463 464 while ((size--) && (*flash++ == ~0)) 465 ; 466 467 size++; 468 if (size) 469 erased = 0; 470 else 471 erased = 1; 472 473 if ((i % 5) == 0) 474 printf("\n"); 475 476 printf(" %08lX%s%s", 477 info->start[i], 478 erased ? " E" : " ", info->protect[i] ? "RO " : " "); 479 #else 480 if ((i % 5) == 0) 481 printf("\n "); 482 printf(" %08lX%s", 483 info->start[i], info->protect[i] ? " (RO) " : " "); 484 #endif 485 } 486 putc('\n'); 487 return; 488 } 489 490 /* 491 * flash_erase - Erase SMI flash 492 * 493 * Erase SMI flash 494 */ 495 int flash_erase(flash_info_t *info, int s_first, int s_last) 496 { 497 int rcode = 0; 498 int prot = 0; 499 flash_sect_t sect; 500 501 if (info->flash_id != ST_M25Pxx_ID) { 502 puts("Can't erase unknown flash type - aborted\n"); 503 return 1; 504 } 505 506 if ((s_first < 0) || (s_first > s_last)) { 507 puts("- no sectors to erase\n"); 508 return 1; 509 } 510 511 for (sect = s_first; sect <= s_last; ++sect) { 512 if (info->protect[sect]) 513 prot++; 514 } 515 if (prot) { 516 printf("- Warning: %d protected sectors will not be erased!\n", 517 prot); 518 } else { 519 putc('\n'); 520 } 521 522 for (sect = s_first; sect <= s_last; sect++) { 523 if (info->protect[sect] == 0) { 524 if (smi_sector_erase(info, sect)) 525 rcode = 1; 526 else 527 putc('.'); 528 } 529 } 530 puts(" done\n"); 531 return rcode; 532 } 533 #endif 534