1 /* 2 * SPI flash probing 3 * 4 * Copyright (C) 2008 Atmel Corporation 5 * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik 6 * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #include <common.h> 12 #include <errno.h> 13 #include <fdtdec.h> 14 #include <malloc.h> 15 #include <spi.h> 16 #include <spi_flash.h> 17 #include <asm/io.h> 18 19 #include "sf_internal.h" 20 21 DECLARE_GLOBAL_DATA_PTR; 22 23 /* Read commands array */ 24 static u8 spi_read_cmds_array[] = { 25 CMD_READ_ARRAY_SLOW, 26 CMD_READ_DUAL_OUTPUT_FAST, 27 CMD_READ_DUAL_IO_FAST, 28 CMD_READ_QUAD_OUTPUT_FAST, 29 CMD_READ_QUAD_IO_FAST, 30 }; 31 32 #ifdef CONFIG_SPI_FLASH_MACRONIX 33 static int spi_flash_set_qeb_mxic(struct spi_flash *flash) 34 { 35 u8 qeb_status; 36 int ret; 37 38 ret = spi_flash_cmd_read_status(flash, &qeb_status); 39 if (ret < 0) 40 return ret; 41 42 if (qeb_status & STATUS_QEB_MXIC) { 43 debug("SF: mxic: QEB is already set\n"); 44 } else { 45 ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC); 46 if (ret < 0) 47 return ret; 48 } 49 50 return ret; 51 } 52 #endif 53 54 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) 55 static int spi_flash_set_qeb_winspan(struct spi_flash *flash) 56 { 57 u8 qeb_status; 58 int ret; 59 60 ret = spi_flash_cmd_read_config(flash, &qeb_status); 61 if (ret < 0) 62 return ret; 63 64 if (qeb_status & STATUS_QEB_WINSPAN) { 65 debug("SF: winspan: QEB is already set\n"); 66 } else { 67 ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN); 68 if (ret < 0) 69 return ret; 70 } 71 72 return ret; 73 } 74 #endif 75 76 static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0) 77 { 78 switch (idcode0) { 79 #ifdef CONFIG_SPI_FLASH_MACRONIX 80 case SPI_FLASH_CFI_MFR_MACRONIX: 81 return spi_flash_set_qeb_mxic(flash); 82 #endif 83 #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) 84 case SPI_FLASH_CFI_MFR_SPANSION: 85 case SPI_FLASH_CFI_MFR_WINBOND: 86 return spi_flash_set_qeb_winspan(flash); 87 #endif 88 #ifdef CONFIG_SPI_FLASH_STMICRO 89 case SPI_FLASH_CFI_MFR_STMICRO: 90 debug("SF: QEB is volatile for %02x flash\n", idcode0); 91 return 0; 92 #endif 93 default: 94 printf("SF: Need set QEB func for %02x flash\n", idcode0); 95 return -1; 96 } 97 } 98 99 static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode, 100 struct spi_flash *flash) 101 { 102 const struct spi_flash_params *params; 103 u8 cmd; 104 u16 jedec = idcode[1] << 8 | idcode[2]; 105 u16 ext_jedec = idcode[3] << 8 | idcode[4]; 106 107 /* Validate params from spi_flash_params table */ 108 params = spi_flash_params_table; 109 for (; params->name != NULL; params++) { 110 if ((params->jedec >> 16) == idcode[0]) { 111 if ((params->jedec & 0xFFFF) == jedec) { 112 if (params->ext_jedec == 0) 113 break; 114 else if (params->ext_jedec == ext_jedec) 115 break; 116 } 117 } 118 } 119 120 if (!params->name) { 121 printf("SF: Unsupported flash IDs: "); 122 printf("manuf %02x, jedec %04x, ext_jedec %04x\n", 123 idcode[0], jedec, ext_jedec); 124 return -EPROTONOSUPPORT; 125 } 126 127 /* Assign spi data */ 128 flash->spi = spi; 129 flash->name = params->name; 130 flash->memory_map = spi->memory_map; 131 flash->dual_flash = flash->spi->option; 132 133 /* Assign spi_flash ops */ 134 flash->write = spi_flash_cmd_write_ops; 135 #ifdef CONFIG_SPI_FLASH_SST 136 if (params->flags & SST_WP) 137 flash->write = sst_write_wp; 138 #endif 139 flash->erase = spi_flash_cmd_erase_ops; 140 flash->read = spi_flash_cmd_read_ops; 141 142 /* Compute the flash size */ 143 flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0; 144 /* 145 * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the 146 * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with 147 * the 0x4d00 Extended JEDEC code have 512b pages. All of the others 148 * have 256b pages. 149 */ 150 if (ext_jedec == 0x4d00) { 151 if ((jedec == 0x0215) || (jedec == 0x216)) 152 flash->page_size = 256; 153 else 154 flash->page_size = 512; 155 } else { 156 flash->page_size = 256; 157 } 158 flash->page_size <<= flash->shift; 159 flash->sector_size = params->sector_size << flash->shift; 160 flash->size = flash->sector_size * params->nr_sectors << flash->shift; 161 #ifdef CONFIG_SF_DUAL_FLASH 162 if (flash->dual_flash & SF_DUAL_STACKED_FLASH) 163 flash->size <<= 1; 164 #endif 165 166 /* Compute erase sector and command */ 167 if (params->flags & SECT_4K) { 168 flash->erase_cmd = CMD_ERASE_4K; 169 flash->erase_size = 4096 << flash->shift; 170 } else if (params->flags & SECT_32K) { 171 flash->erase_cmd = CMD_ERASE_32K; 172 flash->erase_size = 32768 << flash->shift; 173 } else { 174 flash->erase_cmd = CMD_ERASE_64K; 175 flash->erase_size = flash->sector_size; 176 } 177 178 /* Look for the fastest read cmd */ 179 cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx); 180 if (cmd) { 181 cmd = spi_read_cmds_array[cmd - 1]; 182 flash->read_cmd = cmd; 183 } else { 184 /* Go for default supported read cmd */ 185 flash->read_cmd = CMD_READ_ARRAY_FAST; 186 } 187 188 /* Not require to look for fastest only two write cmds yet */ 189 if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP) 190 flash->write_cmd = CMD_QUAD_PAGE_PROGRAM; 191 else 192 /* Go for default supported write cmd */ 193 flash->write_cmd = CMD_PAGE_PROGRAM; 194 195 /* Read dummy_byte: dummy byte is determined based on the 196 * dummy cycles of a particular command. 197 * Fast commands - dummy_byte = dummy_cycles/8 198 * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8 199 * For I/O commands except cmd[0] everything goes on no.of lines 200 * based on particular command but incase of fast commands except 201 * data all go on single line irrespective of command. 202 */ 203 switch (flash->read_cmd) { 204 case CMD_READ_QUAD_IO_FAST: 205 flash->dummy_byte = 2; 206 break; 207 case CMD_READ_ARRAY_SLOW: 208 flash->dummy_byte = 0; 209 break; 210 default: 211 flash->dummy_byte = 1; 212 } 213 214 /* Poll cmd selection */ 215 flash->poll_cmd = CMD_READ_STATUS; 216 #ifdef CONFIG_SPI_FLASH_STMICRO 217 if (params->flags & E_FSR) 218 flash->poll_cmd = CMD_FLAG_STATUS; 219 #endif 220 221 /* Configure the BAR - discover bank cmds and read current bank */ 222 #ifdef CONFIG_SPI_FLASH_BAR 223 u8 curr_bank = 0; 224 if (flash->size > SPI_FLASH_16MB_BOUN) { 225 int ret; 226 227 flash->bank_read_cmd = (idcode[0] == 0x01) ? 228 CMD_BANKADDR_BRRD : CMD_EXTNADDR_RDEAR; 229 flash->bank_write_cmd = (idcode[0] == 0x01) ? 230 CMD_BANKADDR_BRWR : CMD_EXTNADDR_WREAR; 231 232 ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1, 233 &curr_bank, 1); 234 if (ret) { 235 debug("SF: fail to read bank addr register\n"); 236 return ret; 237 } 238 flash->bank_curr = curr_bank; 239 } else { 240 flash->bank_curr = curr_bank; 241 } 242 #endif 243 244 /* Flash powers up read-only, so clear BP# bits */ 245 #if defined(CONFIG_SPI_FLASH_ATMEL) || \ 246 defined(CONFIG_SPI_FLASH_MACRONIX) || \ 247 defined(CONFIG_SPI_FLASH_SST) 248 spi_flash_cmd_write_status(flash, 0); 249 #endif 250 251 return 0; 252 } 253 254 #ifdef CONFIG_OF_CONTROL 255 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) 256 { 257 fdt_addr_t addr; 258 fdt_size_t size; 259 int node; 260 261 /* If there is no node, do nothing */ 262 node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH); 263 if (node < 0) 264 return 0; 265 266 addr = fdtdec_get_addr_size(blob, node, "memory-map", &size); 267 if (addr == FDT_ADDR_T_NONE) { 268 debug("%s: Cannot decode address\n", __func__); 269 return 0; 270 } 271 272 if (flash->size != size) { 273 debug("%s: Memory map must cover entire device\n", __func__); 274 return -1; 275 } 276 flash->memory_map = map_sysmem(addr, size); 277 278 return 0; 279 } 280 #endif /* CONFIG_OF_CONTROL */ 281 282 #ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN 283 /* enable the W#/Vpp signal to disable writing to the status register */ 284 static int spi_enable_wp_pin(struct spi_flash *flash) 285 { 286 u8 status; 287 int ret; 288 289 ret = spi_flash_cmd_read_status(flash, &status); 290 if (ret < 0) 291 return ret; 292 293 ret = spi_flash_cmd_write_status(flash, STATUS_SRWD); 294 if (ret < 0) 295 return ret; 296 297 ret = spi_flash_cmd_write_disable(flash); 298 if (ret < 0) 299 return ret; 300 301 return 0; 302 } 303 #else 304 static int spi_enable_wp_pin(struct spi_flash *flash) 305 { 306 return 0; 307 } 308 #endif 309 310 /** 311 * spi_flash_probe_slave() - Probe for a SPI flash device on a bus 312 * 313 * @spi: Bus to probe 314 * @flashp: Pointer to place to put flash info, which may be NULL if the 315 * space should be allocated 316 */ 317 int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash) 318 { 319 u8 idcode[5]; 320 int ret; 321 322 /* Setup spi_slave */ 323 if (!spi) { 324 printf("SF: Failed to set up slave\n"); 325 return -ENODEV; 326 } 327 328 /* Claim spi bus */ 329 ret = spi_claim_bus(spi); 330 if (ret) { 331 debug("SF: Failed to claim SPI bus: %d\n", ret); 332 return ret; 333 } 334 335 /* Read the ID codes */ 336 ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); 337 if (ret) { 338 printf("SF: Failed to get idcodes\n"); 339 goto err_read_id; 340 } 341 342 #ifdef DEBUG 343 printf("SF: Got idcodes\n"); 344 print_buffer(0, idcode, 1, sizeof(idcode), 0); 345 #endif 346 347 if (spi_flash_validate_params(spi, idcode, flash)) { 348 ret = -EINVAL; 349 goto err_read_id; 350 } 351 352 /* Set the quad enable bit - only for quad commands */ 353 if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) || 354 (flash->read_cmd == CMD_READ_QUAD_IO_FAST) || 355 (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) { 356 if (spi_flash_set_qeb(flash, idcode[0])) { 357 debug("SF: Fail to set QEB for %02x\n", idcode[0]); 358 ret = -EINVAL; 359 goto err_read_id; 360 } 361 } 362 363 #ifdef CONFIG_OF_CONTROL 364 if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { 365 debug("SF: FDT decode error\n"); 366 ret = -EINVAL; 367 goto err_read_id; 368 } 369 #endif 370 #ifndef CONFIG_SPL_BUILD 371 printf("SF: Detected %s with page size ", flash->name); 372 print_size(flash->page_size, ", erase size "); 373 print_size(flash->erase_size, ", total "); 374 print_size(flash->size, ""); 375 if (flash->memory_map) 376 printf(", mapped at %p", flash->memory_map); 377 puts("\n"); 378 #endif 379 #ifndef CONFIG_SPI_FLASH_BAR 380 if (((flash->dual_flash == SF_SINGLE_FLASH) && 381 (flash->size > SPI_FLASH_16MB_BOUN)) || 382 ((flash->dual_flash > SF_SINGLE_FLASH) && 383 (flash->size > SPI_FLASH_16MB_BOUN << 1))) { 384 puts("SF: Warning - Only lower 16MiB accessible,"); 385 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); 386 } 387 #endif 388 if (spi_enable_wp_pin(flash)) 389 puts("Enable WP pin failed\n"); 390 391 /* Release spi bus */ 392 spi_release_bus(spi); 393 394 return 0; 395 396 err_read_id: 397 spi_release_bus(spi); 398 return ret; 399 } 400 401 static struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus) 402 { 403 struct spi_flash *flash; 404 405 /* Allocate space if needed (not used by sf-uclass */ 406 flash = calloc(1, sizeof(*flash)); 407 if (!flash) { 408 debug("SF: Failed to allocate spi_flash\n"); 409 return NULL; 410 } 411 412 if (spi_flash_probe_slave(bus, flash)) { 413 spi_free_slave(bus); 414 free(flash); 415 return NULL; 416 } 417 418 return flash; 419 } 420 421 struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs, 422 unsigned int max_hz, unsigned int spi_mode) 423 { 424 struct spi_slave *bus; 425 426 bus = spi_setup_slave(busnum, cs, max_hz, spi_mode); 427 return spi_flash_probe_tail(bus); 428 } 429 430 #ifdef CONFIG_OF_SPI_FLASH 431 struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node, 432 int spi_node) 433 { 434 struct spi_slave *bus; 435 436 bus = spi_setup_slave_fdt(blob, slave_node, spi_node); 437 return spi_flash_probe_tail(bus); 438 } 439 #endif 440 441 void spi_flash_free(struct spi_flash *flash) 442 { 443 spi_free_slave(flash->spi); 444 free(flash); 445 } 446