1 /* 2 * linux/drivers/mtd/onenand/onenand_base.c 3 * 4 * Copyright (C) 2005-2007 Samsung Electronics 5 * Kyungmin Park <kyungmin.park@samsung.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <common.h> 13 14 #ifdef CONFIG_CMD_ONENAND 15 16 #include <linux/mtd/compat.h> 17 #include <linux/mtd/mtd.h> 18 #include <linux/mtd/onenand.h> 19 20 #include <asm/io.h> 21 #include <asm/errno.h> 22 23 /* It should access 16-bit instead of 8-bit */ 24 static inline void *memcpy_16(void *dst, const void *src, unsigned int len) 25 { 26 void *ret = dst; 27 short *d = dst; 28 const short *s = src; 29 30 len >>= 1; 31 while (len-- > 0) 32 *d++ = *s++; 33 return ret; 34 } 35 36 static const unsigned char ffchars[] = { 37 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 38 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ 39 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 40 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ 41 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 42 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ 43 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 44 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ 45 }; 46 47 /** 48 * onenand_readw - [OneNAND Interface] Read OneNAND register 49 * @param addr address to read 50 * 51 * Read OneNAND register 52 */ 53 static unsigned short onenand_readw(void __iomem * addr) 54 { 55 return readw(addr); 56 } 57 58 /** 59 * onenand_writew - [OneNAND Interface] Write OneNAND register with value 60 * @param value value to write 61 * @param addr address to write 62 * 63 * Write OneNAND register with value 64 */ 65 static void onenand_writew(unsigned short value, void __iomem * addr) 66 { 67 writew(value, addr); 68 } 69 70 /** 71 * onenand_block_address - [DEFAULT] Get block address 72 * @param device the device id 73 * @param block the block 74 * @return translated block address if DDP, otherwise same 75 * 76 * Setup Start Address 1 Register (F100h) 77 */ 78 static int onenand_block_address(int device, int block) 79 { 80 if (device & ONENAND_DEVICE_IS_DDP) { 81 /* Device Flash Core select, NAND Flash Block Address */ 82 int dfs = 0, density, mask; 83 84 density = device >> ONENAND_DEVICE_DENSITY_SHIFT; 85 mask = (1 << (density + 6)); 86 87 if (block & mask) 88 dfs = 1; 89 90 return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1)); 91 } 92 93 return block; 94 } 95 96 /** 97 * onenand_bufferram_address - [DEFAULT] Get bufferram address 98 * @param device the device id 99 * @param block the block 100 * @return set DBS value if DDP, otherwise 0 101 * 102 * Setup Start Address 2 Register (F101h) for DDP 103 */ 104 static int onenand_bufferram_address(int device, int block) 105 { 106 if (device & ONENAND_DEVICE_IS_DDP) { 107 /* Device BufferRAM Select */ 108 int dbs = 0, density, mask; 109 110 density = device >> ONENAND_DEVICE_DENSITY_SHIFT; 111 mask = (1 << (density + 6)); 112 113 if (block & mask) 114 dbs = 1; 115 116 return (dbs << ONENAND_DDP_SHIFT); 117 } 118 119 return 0; 120 } 121 122 /** 123 * onenand_page_address - [DEFAULT] Get page address 124 * @param page the page address 125 * @param sector the sector address 126 * @return combined page and sector address 127 * 128 * Setup Start Address 8 Register (F107h) 129 */ 130 static int onenand_page_address(int page, int sector) 131 { 132 /* Flash Page Address, Flash Sector Address */ 133 int fpa, fsa; 134 135 fpa = page & ONENAND_FPA_MASK; 136 fsa = sector & ONENAND_FSA_MASK; 137 138 return ((fpa << ONENAND_FPA_SHIFT) | fsa); 139 } 140 141 /** 142 * onenand_buffer_address - [DEFAULT] Get buffer address 143 * @param dataram1 DataRAM index 144 * @param sectors the sector address 145 * @param count the number of sectors 146 * @return the start buffer value 147 * 148 * Setup Start Buffer Register (F200h) 149 */ 150 static int onenand_buffer_address(int dataram1, int sectors, int count) 151 { 152 int bsa, bsc; 153 154 /* BufferRAM Sector Address */ 155 bsa = sectors & ONENAND_BSA_MASK; 156 157 if (dataram1) 158 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ 159 else 160 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ 161 162 /* BufferRAM Sector Count */ 163 bsc = count & ONENAND_BSC_MASK; 164 165 return ((bsa << ONENAND_BSA_SHIFT) | bsc); 166 } 167 168 /** 169 * onenand_command - [DEFAULT] Send command to OneNAND device 170 * @param mtd MTD device structure 171 * @param cmd the command to be sent 172 * @param addr offset to read from or write to 173 * @param len number of bytes to read or write 174 * 175 * Send command to OneNAND device. This function is used for middle/large page 176 * devices (1KB/2KB Bytes per page) 177 */ 178 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, 179 size_t len) 180 { 181 struct onenand_chip *this = mtd->priv; 182 int value, readcmd = 0; 183 int block, page; 184 /* Now we use page size operation */ 185 int sectors = 4, count = 4; 186 187 /* Address translation */ 188 switch (cmd) { 189 case ONENAND_CMD_UNLOCK: 190 case ONENAND_CMD_LOCK: 191 case ONENAND_CMD_LOCK_TIGHT: 192 block = -1; 193 page = -1; 194 break; 195 196 case ONENAND_CMD_ERASE: 197 case ONENAND_CMD_BUFFERRAM: 198 block = (int)(addr >> this->erase_shift); 199 page = -1; 200 break; 201 202 default: 203 block = (int)(addr >> this->erase_shift); 204 page = (int)(addr >> this->page_shift); 205 page &= this->page_mask; 206 break; 207 } 208 209 /* NOTE: The setting order of the registers is very important! */ 210 if (cmd == ONENAND_CMD_BUFFERRAM) { 211 /* Select DataRAM for DDP */ 212 value = onenand_bufferram_address(this->device_id, block); 213 this->write_word(value, 214 this->base + ONENAND_REG_START_ADDRESS2); 215 216 /* Switch to the next data buffer */ 217 ONENAND_SET_NEXT_BUFFERRAM(this); 218 219 return 0; 220 } 221 222 if (block != -1) { 223 /* Write 'DFS, FBA' of Flash */ 224 value = onenand_block_address(this->device_id, block); 225 this->write_word(value, 226 this->base + ONENAND_REG_START_ADDRESS1); 227 } 228 229 if (page != -1) { 230 int dataram; 231 232 switch (cmd) { 233 case ONENAND_CMD_READ: 234 case ONENAND_CMD_READOOB: 235 dataram = ONENAND_SET_NEXT_BUFFERRAM(this); 236 readcmd = 1; 237 break; 238 239 default: 240 dataram = ONENAND_CURRENT_BUFFERRAM(this); 241 break; 242 } 243 244 /* Write 'FPA, FSA' of Flash */ 245 value = onenand_page_address(page, sectors); 246 this->write_word(value, 247 this->base + ONENAND_REG_START_ADDRESS8); 248 249 /* Write 'BSA, BSC' of DataRAM */ 250 value = onenand_buffer_address(dataram, sectors, count); 251 this->write_word(value, this->base + ONENAND_REG_START_BUFFER); 252 253 if (readcmd) { 254 /* Select DataRAM for DDP */ 255 value = 256 onenand_bufferram_address(this->device_id, block); 257 this->write_word(value, 258 this->base + 259 ONENAND_REG_START_ADDRESS2); 260 } 261 } 262 263 /* Interrupt clear */ 264 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); 265 /* Write command */ 266 this->write_word(cmd, this->base + ONENAND_REG_COMMAND); 267 268 return 0; 269 } 270 271 /** 272 * onenand_wait - [DEFAULT] wait until the command is done 273 * @param mtd MTD device structure 274 * @param state state to select the max. timeout value 275 * 276 * Wait for command done. This applies to all OneNAND command 277 * Read can take up to 30us, erase up to 2ms and program up to 350us 278 * according to general OneNAND specs 279 */ 280 static int onenand_wait(struct mtd_info *mtd, int state) 281 { 282 struct onenand_chip *this = mtd->priv; 283 unsigned int flags = ONENAND_INT_MASTER; 284 unsigned int interrupt = 0; 285 unsigned int ctrl, ecc; 286 287 while (1) { 288 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); 289 if (interrupt & flags) 290 break; 291 } 292 293 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); 294 295 if (ctrl & ONENAND_CTRL_ERROR) { 296 MTDDEBUG (MTD_DEBUG_LEVEL0, 297 "onenand_wait: controller error = 0x%04x\n", ctrl); 298 return -EAGAIN; 299 } 300 301 if (ctrl & ONENAND_CTRL_LOCK) { 302 MTDDEBUG (MTD_DEBUG_LEVEL0, 303 "onenand_wait: it's locked error = 0x%04x\n", ctrl); 304 return -EIO; 305 } 306 307 if (interrupt & ONENAND_INT_READ) { 308 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS); 309 if (ecc & ONENAND_ECC_2BIT_ALL) { 310 MTDDEBUG (MTD_DEBUG_LEVEL0, 311 "onenand_wait: ECC error = 0x%04x\n", ecc); 312 return -EBADMSG; 313 } 314 } 315 316 return 0; 317 } 318 319 /** 320 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset 321 * @param mtd MTD data structure 322 * @param area BufferRAM area 323 * @return offset given area 324 * 325 * Return BufferRAM offset given area 326 */ 327 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) 328 { 329 struct onenand_chip *this = mtd->priv; 330 331 if (ONENAND_CURRENT_BUFFERRAM(this)) { 332 if (area == ONENAND_DATARAM) 333 return mtd->oobblock; 334 if (area == ONENAND_SPARERAM) 335 return mtd->oobsize; 336 } 337 338 return 0; 339 } 340 341 /** 342 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area 343 * @param mtd MTD data structure 344 * @param area BufferRAM area 345 * @param buffer the databuffer to put/get data 346 * @param offset offset to read from or write to 347 * @param count number of bytes to read/write 348 * 349 * Read the BufferRAM area 350 */ 351 static int onenand_read_bufferram(struct mtd_info *mtd, int area, 352 unsigned char *buffer, int offset, 353 size_t count) 354 { 355 struct onenand_chip *this = mtd->priv; 356 void __iomem *bufferram; 357 358 bufferram = this->base + area; 359 bufferram += onenand_bufferram_offset(mtd, area); 360 361 memcpy_16(buffer, bufferram + offset, count); 362 363 return 0; 364 } 365 366 /** 367 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode 368 * @param mtd MTD data structure 369 * @param area BufferRAM area 370 * @param buffer the databuffer to put/get data 371 * @param offset offset to read from or write to 372 * @param count number of bytes to read/write 373 * 374 * Read the BufferRAM area with Sync. Burst Mode 375 */ 376 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, 377 unsigned char *buffer, int offset, 378 size_t count) 379 { 380 struct onenand_chip *this = mtd->priv; 381 void __iomem *bufferram; 382 383 bufferram = this->base + area; 384 bufferram += onenand_bufferram_offset(mtd, area); 385 386 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); 387 388 memcpy_16(buffer, bufferram + offset, count); 389 390 this->mmcontrol(mtd, 0); 391 392 return 0; 393 } 394 395 /** 396 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area 397 * @param mtd MTD data structure 398 * @param area BufferRAM area 399 * @param buffer the databuffer to put/get data 400 * @param offset offset to read from or write to 401 * @param count number of bytes to read/write 402 * 403 * Write the BufferRAM area 404 */ 405 static int onenand_write_bufferram(struct mtd_info *mtd, int area, 406 const unsigned char *buffer, int offset, 407 size_t count) 408 { 409 struct onenand_chip *this = mtd->priv; 410 void __iomem *bufferram; 411 412 bufferram = this->base + area; 413 bufferram += onenand_bufferram_offset(mtd, area); 414 415 memcpy_16(bufferram + offset, buffer, count); 416 417 return 0; 418 } 419 420 /** 421 * onenand_check_bufferram - [GENERIC] Check BufferRAM information 422 * @param mtd MTD data structure 423 * @param addr address to check 424 * @return 1 if there are valid data, otherwise 0 425 * 426 * Check bufferram if there is data we required 427 */ 428 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) 429 { 430 struct onenand_chip *this = mtd->priv; 431 int block, page; 432 int i; 433 434 block = (int)(addr >> this->erase_shift); 435 page = (int)(addr >> this->page_shift); 436 page &= this->page_mask; 437 438 i = ONENAND_CURRENT_BUFFERRAM(this); 439 440 /* Is there valid data? */ 441 if (this->bufferram[i].block == block && 442 this->bufferram[i].page == page && this->bufferram[i].valid) 443 return 1; 444 445 return 0; 446 } 447 448 /** 449 * onenand_update_bufferram - [GENERIC] Update BufferRAM information 450 * @param mtd MTD data structure 451 * @param addr address to update 452 * @param valid valid flag 453 * 454 * Update BufferRAM information 455 */ 456 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, 457 int valid) 458 { 459 struct onenand_chip *this = mtd->priv; 460 int block, page; 461 int i; 462 463 block = (int)(addr >> this->erase_shift); 464 page = (int)(addr >> this->page_shift); 465 page &= this->page_mask; 466 467 /* Invalidate BufferRAM */ 468 for (i = 0; i < MAX_BUFFERRAM; i++) { 469 if (this->bufferram[i].block == block && 470 this->bufferram[i].page == page) 471 this->bufferram[i].valid = 0; 472 } 473 474 /* Update BufferRAM */ 475 i = ONENAND_CURRENT_BUFFERRAM(this); 476 this->bufferram[i].block = block; 477 this->bufferram[i].page = page; 478 this->bufferram[i].valid = valid; 479 480 return 0; 481 } 482 483 /** 484 * onenand_get_device - [GENERIC] Get chip for selected access 485 * @param mtd MTD device structure 486 * @param new_state the state which is requested 487 * 488 * Get the device and lock it for exclusive access 489 */ 490 static void onenand_get_device(struct mtd_info *mtd, int new_state) 491 { 492 /* Do nothing */ 493 } 494 495 /** 496 * onenand_release_device - [GENERIC] release chip 497 * @param mtd MTD device structure 498 * 499 * Deselect, release chip lock and wake up anyone waiting on the device 500 */ 501 static void onenand_release_device(struct mtd_info *mtd) 502 { 503 /* Do nothing */ 504 } 505 506 /** 507 * onenand_read_ecc - [MTD Interface] Read data with ECC 508 * @param mtd MTD device structure 509 * @param from offset to read from 510 * @param len number of bytes to read 511 * @param retlen pointer to variable to store the number of read bytes 512 * @param buf the databuffer to put data 513 * @param oob_buf filesystem supplied oob data buffer 514 * @param oobsel oob selection structure 515 * 516 * OneNAND read with ECC 517 */ 518 static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, 519 size_t * retlen, u_char * buf, 520 u_char * oob_buf, struct nand_oobinfo *oobsel) 521 { 522 struct onenand_chip *this = mtd->priv; 523 int read = 0, column; 524 int thislen; 525 int ret = 0; 526 527 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_read_ecc: " 528 "from = 0x%08x, len = %i\n", 529 (unsigned int)from, (int)len); 530 531 /* Do not allow reads past end of device */ 532 if ((from + len) > mtd->size) { 533 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_read_ecc: " 534 "Attempt read beyond end of device\n"); 535 *retlen = 0; 536 return -EINVAL; 537 } 538 539 /* Grab the lock and see if the device is available */ 540 onenand_get_device(mtd, FL_READING); 541 542 while (read < len) { 543 thislen = min_t(int, mtd->oobblock, len - read); 544 545 column = from & (mtd->oobblock - 1); 546 if (column + thislen > mtd->oobblock) 547 thislen = mtd->oobblock - column; 548 549 if (!onenand_check_bufferram(mtd, from)) { 550 this->command(mtd, ONENAND_CMD_READ, from, 551 mtd->oobblock); 552 ret = this->wait(mtd, FL_READING); 553 /* First copy data and check return value for ECC handling */ 554 onenand_update_bufferram(mtd, from, 1); 555 } 556 557 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, 558 thislen); 559 560 read += thislen; 561 if (read == len) 562 break; 563 564 if (ret) { 565 MTDDEBUG (MTD_DEBUG_LEVEL0, 566 "onenand_read_ecc: read failed = %d\n", ret); 567 break; 568 } 569 570 from += thislen; 571 buf += thislen; 572 } 573 574 /* Deselect and wake up anyone waiting on the device */ 575 onenand_release_device(mtd); 576 577 /* 578 * Return success, if no ECC failures, else -EBADMSG 579 * fs driver will take care of that, because 580 * retlen == desired len and result == -EBADMSG 581 */ 582 *retlen = read; 583 return ret; 584 } 585 586 /** 587 * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc 588 * @param mtd MTD device structure 589 * @param from offset to read from 590 * @param len number of bytes to read 591 * @param retlen pointer to variable to store the number of read bytes 592 * @param buf the databuffer to put data 593 * 594 * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL 595 */ 596 int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, 597 size_t * retlen, u_char * buf) 598 { 599 return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL); 600 } 601 602 /** 603 * onenand_read_oob - [MTD Interface] OneNAND read out-of-band 604 * @param mtd MTD device structure 605 * @param from offset to read from 606 * @param len number of bytes to read 607 * @param retlen pointer to variable to store the number of read bytes 608 * @param buf the databuffer to put data 609 * 610 * OneNAND read out-of-band data from the spare area 611 */ 612 int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, 613 size_t * retlen, u_char * buf) 614 { 615 struct onenand_chip *this = mtd->priv; 616 int read = 0, thislen, column; 617 int ret = 0; 618 619 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_read_oob: " 620 "from = 0x%08x, len = %i\n", 621 (unsigned int)from, (int)len); 622 623 /* Initialize return length value */ 624 *retlen = 0; 625 626 /* Do not allow reads past end of device */ 627 if (unlikely((from + len) > mtd->size)) { 628 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_read_oob: " 629 "Attempt read beyond end of device\n"); 630 return -EINVAL; 631 } 632 633 /* Grab the lock and see if the device is available */ 634 onenand_get_device(mtd, FL_READING); 635 636 column = from & (mtd->oobsize - 1); 637 638 while (read < len) { 639 thislen = mtd->oobsize - column; 640 thislen = min_t(int, thislen, len); 641 642 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize); 643 644 onenand_update_bufferram(mtd, from, 0); 645 646 ret = this->wait(mtd, FL_READING); 647 /* First copy data and check return value for ECC handling */ 648 649 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, 650 thislen); 651 652 read += thislen; 653 if (read == len) 654 break; 655 656 if (ret) { 657 MTDDEBUG (MTD_DEBUG_LEVEL0, 658 "onenand_read_oob: read failed = %d\n", ret); 659 break; 660 } 661 662 buf += thislen; 663 /* Read more? */ 664 if (read < len) { 665 /* Page size */ 666 from += mtd->oobblock; 667 column = 0; 668 } 669 } 670 671 /* Deselect and wake up anyone waiting on the device */ 672 onenand_release_device(mtd); 673 674 *retlen = read; 675 return ret; 676 } 677 678 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE 679 /** 680 * onenand_verify_page - [GENERIC] verify the chip contents after a write 681 * @param mtd MTD device structure 682 * @param buf the databuffer to verify 683 * @param block block address 684 * @param page page address 685 * 686 * Check DataRAM area directly 687 */ 688 static int onenand_verify_page(struct mtd_info *mtd, u_char * buf, 689 loff_t addr, int block, int page) 690 { 691 struct onenand_chip *this = mtd->priv; 692 void __iomem *dataram0, *dataram1; 693 int ret = 0; 694 695 this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock); 696 697 ret = this->wait(mtd, FL_READING); 698 if (ret) 699 return ret; 700 701 onenand_update_bufferram(mtd, addr, 1); 702 703 /* Check, if the two dataram areas are same */ 704 dataram0 = this->base + ONENAND_DATARAM; 705 dataram1 = dataram0 + mtd->oobblock; 706 707 if (memcmp(dataram0, dataram1, mtd->oobblock)) 708 return -EBADMSG; 709 710 return 0; 711 } 712 #else 713 #define onenand_verify_page(...) (0) 714 #endif 715 716 #define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0) 717 718 /** 719 * onenand_write_ecc - [MTD Interface] OneNAND write with ECC 720 * @param mtd MTD device structure 721 * @param to offset to write to 722 * @param len number of bytes to write 723 * @param retlen pointer to variable to store the number of written bytes 724 * @param buf the data to write 725 * @param eccbuf filesystem supplied oob data buffer 726 * @param oobsel oob selection structure 727 * 728 * OneNAND write with ECC 729 */ 730 static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, 731 size_t * retlen, const u_char * buf, 732 u_char * eccbuf, struct nand_oobinfo *oobsel) 733 { 734 struct onenand_chip *this = mtd->priv; 735 int written = 0; 736 int ret = 0; 737 738 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_write_ecc: " 739 "to = 0x%08x, len = %i\n", 740 (unsigned int)to, (int)len); 741 742 /* Initialize retlen, in case of early exit */ 743 *retlen = 0; 744 745 /* Do not allow writes past end of device */ 746 if (unlikely((to + len) > mtd->size)) { 747 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_ecc: " 748 "Attempt write to past end of device\n"); 749 return -EINVAL; 750 } 751 752 /* Reject writes, which are not page aligned */ 753 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) { 754 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_ecc: " 755 "Attempt to write not page aligned data\n"); 756 return -EINVAL; 757 } 758 759 /* Grab the lock and see if the device is available */ 760 onenand_get_device(mtd, FL_WRITING); 761 762 /* Loop until all data write */ 763 while (written < len) { 764 int thislen = min_t(int, mtd->oobblock, len - written); 765 766 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock); 767 768 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen); 769 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, 770 mtd->oobsize); 771 772 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock); 773 774 onenand_update_bufferram(mtd, to, 1); 775 776 ret = this->wait(mtd, FL_WRITING); 777 if (ret) { 778 MTDDEBUG (MTD_DEBUG_LEVEL0, 779 "onenand_write_ecc: write filaed %d\n", ret); 780 break; 781 } 782 783 written += thislen; 784 785 /* Only check verify write turn on */ 786 ret = onenand_verify_page(mtd, (u_char *) buf, to, block, page); 787 if (ret) { 788 MTDDEBUG (MTD_DEBUG_LEVEL0, 789 "onenand_write_ecc: verify failed %d\n", ret); 790 break; 791 } 792 793 if (written == len) 794 break; 795 796 to += thislen; 797 buf += thislen; 798 } 799 800 /* Deselect and wake up anyone waiting on the device */ 801 onenand_release_device(mtd); 802 803 *retlen = written; 804 805 return ret; 806 } 807 808 /** 809 * onenand_write - [MTD Interface] compability function for onenand_write_ecc 810 * @param mtd MTD device structure 811 * @param to offset to write to 812 * @param len number of bytes to write 813 * @param retlen pointer to variable to store the number of written bytes 814 * @param buf the data to write 815 * 816 * This function simply calls onenand_write_ecc 817 * with oob buffer and oobsel = NULL 818 */ 819 int onenand_write(struct mtd_info *mtd, loff_t to, size_t len, 820 size_t * retlen, const u_char * buf) 821 { 822 return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL); 823 } 824 825 /** 826 * onenand_write_oob - [MTD Interface] OneNAND write out-of-band 827 * @param mtd MTD device structure 828 * @param to offset to write to 829 * @param len number of bytes to write 830 * @param retlen pointer to variable to store the number of written bytes 831 * @param buf the data to write 832 * 833 * OneNAND write out-of-band 834 */ 835 int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, 836 size_t * retlen, const u_char * buf) 837 { 838 struct onenand_chip *this = mtd->priv; 839 int column, status; 840 int written = 0; 841 842 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_write_oob: " 843 "to = 0x%08x, len = %i\n", 844 (unsigned int)to, (int)len); 845 846 /* Initialize retlen, in case of early exit */ 847 *retlen = 0; 848 849 /* Do not allow writes past end of device */ 850 if (unlikely((to + len) > mtd->size)) { 851 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_write_oob: " 852 "Attempt write to past end of device\n"); 853 return -EINVAL; 854 } 855 856 /* Grab the lock and see if the device is available */ 857 onenand_get_device(mtd, FL_WRITING); 858 859 /* Loop until all data write */ 860 while (written < len) { 861 int thislen = min_t(int, mtd->oobsize, len - written); 862 863 column = to & (mtd->oobsize - 1); 864 865 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); 866 867 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, 868 mtd->oobsize); 869 this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column, 870 thislen); 871 872 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize); 873 874 onenand_update_bufferram(mtd, to, 0); 875 876 status = this->wait(mtd, FL_WRITING); 877 if (status) 878 break; 879 880 written += thislen; 881 if (written == len) 882 break; 883 884 to += thislen; 885 buf += thislen; 886 } 887 888 /* Deselect and wake up anyone waiting on the device */ 889 onenand_release_device(mtd); 890 891 *retlen = written; 892 893 return 0; 894 } 895 896 /** 897 * onenand_erase - [MTD Interface] erase block(s) 898 * @param mtd MTD device structure 899 * @param instr erase instruction 900 * 901 * Erase one ore more blocks 902 */ 903 int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) 904 { 905 struct onenand_chip *this = mtd->priv; 906 unsigned int block_size; 907 loff_t addr; 908 int len; 909 int ret = 0; 910 911 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", 912 (unsigned int)instr->addr, (unsigned int)instr->len); 913 914 block_size = (1 << this->erase_shift); 915 916 /* Start address must align on block boundary */ 917 if (unlikely(instr->addr & (block_size - 1))) { 918 MTDDEBUG (MTD_DEBUG_LEVEL0, 919 "onenand_erase: Unaligned address\n"); 920 return -EINVAL; 921 } 922 923 /* Length must align on block boundary */ 924 if (unlikely(instr->len & (block_size - 1))) { 925 MTDDEBUG (MTD_DEBUG_LEVEL0, 926 "onenand_erase: Length not block aligned\n"); 927 return -EINVAL; 928 } 929 930 /* Do not allow erase past end of device */ 931 if (unlikely((instr->len + instr->addr) > mtd->size)) { 932 MTDDEBUG (MTD_DEBUG_LEVEL0, 933 "onenand_erase: Erase past end of device\n"); 934 return -EINVAL; 935 } 936 937 instr->fail_addr = 0xffffffff; 938 939 /* Grab the lock and see if the device is available */ 940 onenand_get_device(mtd, FL_ERASING); 941 942 /* Loop throught the pages */ 943 len = instr->len; 944 addr = instr->addr; 945 946 instr->state = MTD_ERASING; 947 948 while (len) { 949 950 /* TODO Check badblock */ 951 952 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); 953 954 ret = this->wait(mtd, FL_ERASING); 955 /* Check, if it is write protected */ 956 if (ret) { 957 if (ret == -EPERM) 958 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: " 959 "Device is write protected!!!\n"); 960 else 961 MTDDEBUG (MTD_DEBUG_LEVEL0, "onenand_erase: " 962 "Failed erase, block %d\n", 963 (unsigned)(addr >> this->erase_shift)); 964 instr->state = MTD_ERASE_FAILED; 965 instr->fail_addr = addr; 966 goto erase_exit; 967 } 968 969 len -= block_size; 970 addr += block_size; 971 } 972 973 instr->state = MTD_ERASE_DONE; 974 975 erase_exit: 976 977 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; 978 /* Do call back function */ 979 if (!ret) 980 mtd_erase_callback(instr); 981 982 /* Deselect and wake up anyone waiting on the device */ 983 onenand_release_device(mtd); 984 985 return ret; 986 } 987 988 /** 989 * onenand_sync - [MTD Interface] sync 990 * @param mtd MTD device structure 991 * 992 * Sync is actually a wait for chip ready function 993 */ 994 void onenand_sync(struct mtd_info *mtd) 995 { 996 MTDDEBUG (MTD_DEBUG_LEVEL3, "onenand_sync: called\n"); 997 998 /* Grab the lock and see if the device is available */ 999 onenand_get_device(mtd, FL_SYNCING); 1000 1001 /* Release it and go back */ 1002 onenand_release_device(mtd); 1003 } 1004 1005 /** 1006 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad 1007 * @param mtd MTD device structure 1008 * @param ofs offset relative to mtd start 1009 */ 1010 int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) 1011 { 1012 /* 1013 * TODO 1014 * 1. Bad block table (BBT) 1015 * -> using NAND BBT to support JFFS2 1016 * 2. Bad block management (BBM) 1017 * -> bad block replace scheme 1018 * 1019 * Currently we do nothing 1020 */ 1021 return 0; 1022 } 1023 1024 /** 1025 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad 1026 * @param mtd MTD device structure 1027 * @param ofs offset relative to mtd start 1028 */ 1029 int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) 1030 { 1031 /* see above */ 1032 return 0; 1033 } 1034 1035 /** 1036 * onenand_unlock - [MTD Interface] Unlock block(s) 1037 * @param mtd MTD device structure 1038 * @param ofs offset relative to mtd start 1039 * @param len number of bytes to unlock 1040 * 1041 * Unlock one or more blocks 1042 */ 1043 int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) 1044 { 1045 struct onenand_chip *this = mtd->priv; 1046 int start, end, block, value, status; 1047 1048 start = ofs >> this->erase_shift; 1049 end = len >> this->erase_shift; 1050 1051 /* Continuous lock scheme */ 1052 if (this->options & ONENAND_CONT_LOCK) { 1053 /* Set start block address */ 1054 this->write_word(start, 1055 this->base + ONENAND_REG_START_BLOCK_ADDRESS); 1056 /* Set end block address */ 1057 this->write_word(end - 1, 1058 this->base + ONENAND_REG_END_BLOCK_ADDRESS); 1059 /* Write unlock command */ 1060 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); 1061 1062 /* There's no return value */ 1063 this->wait(mtd, FL_UNLOCKING); 1064 1065 /* Sanity check */ 1066 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 1067 & ONENAND_CTRL_ONGO) 1068 continue; 1069 1070 /* Check lock status */ 1071 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 1072 if (!(status & ONENAND_WP_US)) 1073 printk(KERN_ERR "wp status = 0x%x\n", status); 1074 1075 return 0; 1076 } 1077 1078 /* Block lock scheme */ 1079 for (block = start; block < end; block++) { 1080 /* Set start block address */ 1081 this->write_word(block, 1082 this->base + ONENAND_REG_START_BLOCK_ADDRESS); 1083 /* Write unlock command */ 1084 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); 1085 1086 /* There's no return value */ 1087 this->wait(mtd, FL_UNLOCKING); 1088 1089 /* Sanity check */ 1090 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) 1091 & ONENAND_CTRL_ONGO) 1092 continue; 1093 1094 /* Set block address for read block status */ 1095 value = onenand_block_address(this->device_id, block); 1096 this->write_word(value, 1097 this->base + ONENAND_REG_START_ADDRESS1); 1098 1099 /* Check lock status */ 1100 status = this->read_word(this->base + ONENAND_REG_WP_STATUS); 1101 if (!(status & ONENAND_WP_US)) 1102 printk(KERN_ERR "block = %d, wp status = 0x%x\n", 1103 block, status); 1104 } 1105 1106 return 0; 1107 } 1108 1109 /** 1110 * onenand_print_device_info - Print device ID 1111 * @param device device ID 1112 * 1113 * Print device ID 1114 */ 1115 void onenand_print_device_info(int device, int verbose) 1116 { 1117 int vcc, demuxed, ddp, density; 1118 1119 if (!verbose) 1120 return; 1121 1122 vcc = device & ONENAND_DEVICE_VCC_MASK; 1123 demuxed = device & ONENAND_DEVICE_IS_DEMUX; 1124 ddp = device & ONENAND_DEVICE_IS_DDP; 1125 density = device >> ONENAND_DEVICE_DENSITY_SHIFT; 1126 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", 1127 demuxed ? "" : "Muxed ", 1128 ddp ? "(DDP)" : "", 1129 (16 << density), vcc ? "2.65/3.3" : "1.8", device); 1130 } 1131 1132 static const struct onenand_manufacturers onenand_manuf_ids[] = { 1133 {ONENAND_MFR_SAMSUNG, "Samsung"}, 1134 {ONENAND_MFR_UNKNOWN, "Unknown"} 1135 }; 1136 1137 /** 1138 * onenand_check_maf - Check manufacturer ID 1139 * @param manuf manufacturer ID 1140 * 1141 * Check manufacturer ID 1142 */ 1143 static int onenand_check_maf(int manuf) 1144 { 1145 int i; 1146 1147 for (i = 0; onenand_manuf_ids[i].id; i++) { 1148 if (manuf == onenand_manuf_ids[i].id) 1149 break; 1150 } 1151 1152 #ifdef ONENAND_DEBUG 1153 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", 1154 onenand_manuf_ids[i].name, manuf); 1155 #endif 1156 1157 return (i != ONENAND_MFR_UNKNOWN); 1158 } 1159 1160 /** 1161 * onenand_probe - [OneNAND Interface] Probe the OneNAND device 1162 * @param mtd MTD device structure 1163 * 1164 * OneNAND detection method: 1165 * Compare the the values from command with ones from register 1166 */ 1167 static int onenand_probe(struct mtd_info *mtd) 1168 { 1169 struct onenand_chip *this = mtd->priv; 1170 int bram_maf_id, bram_dev_id, maf_id, dev_id; 1171 int version_id; 1172 int density; 1173 1174 /* Send the command for reading device ID from BootRAM */ 1175 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); 1176 1177 /* Read manufacturer and device IDs from BootRAM */ 1178 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); 1179 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); 1180 1181 /* Check manufacturer ID */ 1182 if (onenand_check_maf(bram_maf_id)) 1183 return -ENXIO; 1184 1185 /* Reset OneNAND to read default register values */ 1186 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); 1187 1188 { 1189 int i; 1190 for (i = 0; i < 10000; i++) ; 1191 } 1192 1193 /* Read manufacturer and device IDs from Register */ 1194 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); 1195 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); 1196 1197 /* Check OneNAND device */ 1198 if (maf_id != bram_maf_id || dev_id != bram_dev_id) 1199 return -ENXIO; 1200 1201 /* FIXME : Current OneNAND MTD doesn't support Flex-OneNAND */ 1202 if (dev_id & (1 << 9)) { 1203 printk("Not yet support Flex-OneNAND\n"); 1204 return -ENXIO; 1205 } 1206 1207 /* Flash device information */ 1208 onenand_print_device_info(dev_id, 0); 1209 this->device_id = dev_id; 1210 1211 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; 1212 this->chipsize = (16 << density) << 20; 1213 1214 /* OneNAND page size & block size */ 1215 /* The data buffer size is equal to page size */ 1216 mtd->oobblock = 1217 this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); 1218 mtd->oobsize = mtd->oobblock >> 5; 1219 /* Pagers per block is always 64 in OneNAND */ 1220 mtd->erasesize = mtd->oobblock << 6; 1221 1222 this->erase_shift = ffs(mtd->erasesize) - 1; 1223 this->page_shift = ffs(mtd->oobblock) - 1; 1224 this->ppb_shift = (this->erase_shift - this->page_shift); 1225 this->page_mask = (mtd->erasesize / mtd->oobblock) - 1; 1226 1227 /* REVIST: Multichip handling */ 1228 1229 mtd->size = this->chipsize; 1230 1231 /* Version ID */ 1232 version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); 1233 #ifdef ONENAND_DEBUG 1234 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id); 1235 #endif 1236 1237 /* Lock scheme */ 1238 if (density <= ONENAND_DEVICE_DENSITY_512Mb && 1239 !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) { 1240 printk(KERN_INFO "Lock scheme is Continues Lock\n"); 1241 this->options |= ONENAND_CONT_LOCK; 1242 } 1243 1244 return 0; 1245 } 1246 1247 /** 1248 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device 1249 * @param mtd MTD device structure 1250 * @param maxchips Number of chips to scan for 1251 * 1252 * This fills out all the not initialized function pointers 1253 * with the defaults. 1254 * The flash ID is read and the mtd/chip structures are 1255 * filled with the appropriate values. 1256 */ 1257 int onenand_scan(struct mtd_info *mtd, int maxchips) 1258 { 1259 struct onenand_chip *this = mtd->priv; 1260 1261 if (!this->read_word) 1262 this->read_word = onenand_readw; 1263 if (!this->write_word) 1264 this->write_word = onenand_writew; 1265 1266 if (!this->command) 1267 this->command = onenand_command; 1268 if (!this->wait) 1269 this->wait = onenand_wait; 1270 1271 if (!this->read_bufferram) 1272 this->read_bufferram = onenand_read_bufferram; 1273 if (!this->write_bufferram) 1274 this->write_bufferram = onenand_write_bufferram; 1275 1276 if (onenand_probe(mtd)) 1277 return -ENXIO; 1278 1279 /* Set Sync. Burst Read after probing */ 1280 if (this->mmcontrol) { 1281 printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); 1282 this->read_bufferram = onenand_sync_read_bufferram; 1283 } 1284 1285 onenand_unlock(mtd, 0, mtd->size); 1286 1287 return onenand_default_bbt(mtd); 1288 } 1289 1290 /** 1291 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device 1292 * @param mtd MTD device structure 1293 */ 1294 void onenand_release(struct mtd_info *mtd) 1295 { 1296 } 1297 1298 #endif /* CONFIG_CMD_ONENAND */ 1299