1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd 4 * 5 * Authors: 6 * Dingqiang Lin <jon.lin@rock-chips.com> 7 */ 8 9 #ifndef __UBOOT__ 10 #include <linux/device.h> 11 #include <linux/kernel.h> 12 #endif 13 #include <linux/mtd/spinand.h> 14 15 #define SPINAND_MFR_XINCUN 0x8C 16 #define XINCUN_STATUS_ECC_HAS_BITFLIPS_T (3 << 4) 17 18 static SPINAND_OP_VARIANTS(read_cache_variants, 19 SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0), 20 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), 21 SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), 22 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), 23 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), 24 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); 25 26 static SPINAND_OP_VARIANTS(write_cache_variants, 27 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), 28 SPINAND_PROG_LOAD(true, 0, NULL, 0)); 29 30 static SPINAND_OP_VARIANTS(update_cache_variants, 31 SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), 32 SPINAND_PROG_LOAD(false, 0, NULL, 0)); 33 34 static int xcsp2aapk_ooblayout_ecc(struct mtd_info *mtd, int section, 35 struct mtd_oob_region *region) 36 { 37 if (section) 38 return -ERANGE; 39 40 region->offset = mtd->oobsize / 2; 41 region->length = mtd->oobsize / 2; 42 43 return 0; 44 } 45 46 static int xcsp2aapk_ooblayout_free(struct mtd_info *mtd, int section, 47 struct mtd_oob_region *region) 48 { 49 if (section) 50 return -ERANGE; 51 52 /* Reserve 2 bytes for the BBM. */ 53 region->offset = 2; 54 region->length = mtd->oobsize / 2 - 2; 55 56 return 0; 57 } 58 59 static const struct mtd_ooblayout_ops xcsp2aapk_ooblayout = { 60 .ecc = xcsp2aapk_ooblayout_ecc, 61 .rfree = xcsp2aapk_ooblayout_free, 62 }; 63 64 static int xcsp2aapk_ecc_get_status(struct spinand_device *spinand, 65 u8 status) 66 { 67 struct nand_device *nand = spinand_to_nand(spinand); 68 69 switch (status & STATUS_ECC_MASK) { 70 case STATUS_ECC_NO_BITFLIPS: 71 return 0; 72 73 case STATUS_ECC_UNCOR_ERROR: 74 return -EBADMSG; 75 76 case STATUS_ECC_HAS_BITFLIPS: 77 return 0; 78 case XINCUN_STATUS_ECC_HAS_BITFLIPS_T: 79 return nand->eccreq.strength; 80 default: 81 break; 82 } 83 84 return -EINVAL; 85 } 86 87 static const struct spinand_info xincun_spinand_table[] = { 88 SPINAND_INFO("XCSP2AAPK", 89 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xA1), 90 NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1), 91 NAND_ECCREQ(8, 512), 92 SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 93 &write_cache_variants, 94 &update_cache_variants), 95 SPINAND_HAS_QE_BIT, 96 SPINAND_ECCINFO(&xcsp2aapk_ooblayout, xcsp2aapk_ecc_get_status)), 97 SPINAND_INFO("XCSP1AAPK", 98 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01), 99 NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1), 100 NAND_ECCREQ(8, 512), 101 SPINAND_INFO_OP_VARIANTS(&read_cache_variants, 102 &write_cache_variants, 103 &update_cache_variants), 104 SPINAND_HAS_QE_BIT, 105 SPINAND_ECCINFO(&xcsp2aapk_ooblayout, xcsp2aapk_ecc_get_status)), 106 }; 107 108 static const struct spinand_manufacturer_ops xincun_spinand_manuf_ops = { 109 }; 110 111 const struct spinand_manufacturer xincun_spinand_manufacturer = { 112 .id = SPINAND_MFR_XINCUN, 113 .name = "XINCUN", 114 .chips = xincun_spinand_table, 115 .nchips = ARRAY_SIZE(xincun_spinand_table), 116 .ops = &xincun_spinand_manuf_ops, 117 }; 118