1 /* 2 * Copyright (C) 2014 Gateworks Corporation 3 * Author: Tim Harvey <tharvey@gateworks.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 #include <common.h> 8 #include <nand.h> 9 #include <malloc.h> 10 #include "mxs_nand.h" 11 12 static struct mtd_info *mtd; 13 static struct nand_chip nand_chip; 14 15 static void mxs_nand_command(struct mtd_info *mtd, unsigned int command, 16 int column, int page_addr) 17 { 18 register struct nand_chip *chip = mtd_to_nand(mtd); 19 u32 timeo, time_start; 20 21 /* write out the command to the device */ 22 chip->cmd_ctrl(mtd, command, NAND_CLE); 23 24 /* Serially input address */ 25 if (column != -1) { 26 chip->cmd_ctrl(mtd, column, NAND_ALE); 27 chip->cmd_ctrl(mtd, column >> 8, NAND_ALE); 28 } 29 if (page_addr != -1) { 30 chip->cmd_ctrl(mtd, page_addr, NAND_ALE); 31 chip->cmd_ctrl(mtd, page_addr >> 8, NAND_ALE); 32 /* One more address cycle for devices > 128MiB */ 33 if (chip->chipsize > (128 << 20)) 34 chip->cmd_ctrl(mtd, page_addr >> 16, NAND_ALE); 35 } 36 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0); 37 38 if (command == NAND_CMD_READ0) { 39 chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_CLE); 40 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0); 41 } 42 43 /* wait for nand ready */ 44 ndelay(100); 45 timeo = (CONFIG_SYS_HZ * 20) / 1000; 46 time_start = get_timer(0); 47 while (get_timer(time_start) < timeo) { 48 if (chip->dev_ready(mtd)) 49 break; 50 } 51 } 52 53 #if defined (CONFIG_SPL_NAND_IDENT) 54 55 /* Trying to detect the NAND flash using ONFi, JEDEC, and (extended) IDs */ 56 static int mxs_flash_full_ident(struct mtd_info *mtd) 57 { 58 int nand_maf_id, nand_dev_id; 59 struct nand_chip *chip = mtd_to_nand(mtd); 60 struct nand_flash_dev *type; 61 62 type = nand_get_flash_type(mtd, chip, &nand_maf_id, &nand_dev_id, NULL); 63 64 if (IS_ERR(type)) { 65 chip->select_chip(mtd, -1); 66 return PTR_ERR(type); 67 } 68 69 return 0; 70 } 71 72 #else 73 74 /* Trying to detect the NAND flash using ONFi only */ 75 static int mxs_flash_onfi_ident(struct mtd_info *mtd) 76 { 77 register struct nand_chip *chip = mtd_to_nand(mtd); 78 int i; 79 u8 mfg_id, dev_id; 80 u8 id_data[8]; 81 struct nand_onfi_params *p = &chip->onfi_params; 82 83 /* Reset the chip */ 84 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); 85 86 /* Send the command for reading device ID */ 87 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); 88 89 /* Read manufacturer and device IDs */ 90 mfg_id = chip->read_byte(mtd); 91 dev_id = chip->read_byte(mtd); 92 93 /* Try again to make sure */ 94 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); 95 for (i = 0; i < 8; i++) 96 id_data[i] = chip->read_byte(mtd); 97 if (id_data[0] != mfg_id || id_data[1] != dev_id) { 98 printf("second ID read did not match"); 99 return -1; 100 } 101 debug("0x%02x:0x%02x ", mfg_id, dev_id); 102 103 /* read ONFI */ 104 chip->onfi_version = 0; 105 chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1); 106 if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' || 107 chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') { 108 return -2; 109 } 110 111 /* we have ONFI, probe it */ 112 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); 113 chip->read_buf(mtd, (uint8_t *)p, sizeof(*p)); 114 mtd->name = p->model; 115 mtd->writesize = le32_to_cpu(p->byte_per_page); 116 mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize; 117 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); 118 chip->chipsize = le32_to_cpu(p->blocks_per_lun); 119 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; 120 /* Calculate the address shift from the page size */ 121 chip->page_shift = ffs(mtd->writesize) - 1; 122 chip->phys_erase_shift = ffs(mtd->erasesize) - 1; 123 /* Convert chipsize to number of pages per chip -1 */ 124 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; 125 chip->badblockbits = 8; 126 127 debug("erasesize=%d (>>%d)\n", mtd->erasesize, chip->phys_erase_shift); 128 debug("writesize=%d (>>%d)\n", mtd->writesize, chip->page_shift); 129 debug("oobsize=%d\n", mtd->oobsize); 130 debug("chipsize=%lld\n", chip->chipsize); 131 132 return 0; 133 } 134 135 #endif /* CONFIG_SPL_NAND_IDENT */ 136 137 static int mxs_flash_ident(struct mtd_info *mtd) 138 { 139 int ret; 140 #if defined (CONFIG_SPL_NAND_IDENT) 141 ret = mxs_flash_full_ident(mtd); 142 #else 143 ret = mxs_flash_onfi_ident(mtd); 144 #endif 145 return ret; 146 } 147 148 static int mxs_read_page_ecc(struct mtd_info *mtd, void *buf, unsigned int page) 149 { 150 register struct nand_chip *chip = mtd_to_nand(mtd); 151 int ret; 152 153 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page); 154 ret = nand_chip.ecc.read_page(mtd, chip, buf, 1, page); 155 if (ret < 0) { 156 printf("read_page failed %d\n", ret); 157 return -1; 158 } 159 return 0; 160 } 161 162 static int is_badblock(struct mtd_info *mtd, loff_t offs, int allowbbt) 163 { 164 register struct nand_chip *chip = mtd_to_nand(mtd); 165 unsigned int block = offs >> chip->phys_erase_shift; 166 unsigned int page = offs >> chip->page_shift; 167 168 debug("%s offs=0x%08x block:%d page:%d\n", __func__, (int)offs, block, 169 page); 170 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); 171 memset(chip->oob_poi, 0, mtd->oobsize); 172 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); 173 174 return chip->oob_poi[0] != 0xff; 175 } 176 177 /* setup mtd and nand structs and init mxs_nand driver */ 178 static int mxs_nand_init(void) 179 { 180 /* return if already initalized */ 181 if (nand_chip.numchips) 182 return 0; 183 184 /* init mxs nand driver */ 185 mxs_nand_init_spl(&nand_chip); 186 mtd = nand_to_mtd(&nand_chip); 187 /* set mtd functions */ 188 nand_chip.cmdfunc = mxs_nand_command; 189 nand_chip.scan_bbt = nand_default_bbt; 190 nand_chip.numchips = 1; 191 192 /* identify flash device */ 193 if (mxs_flash_ident(mtd)) { 194 printf("Failed to identify\n"); 195 return -1; 196 } 197 198 /* allocate and initialize buffers */ 199 nand_chip.buffers = memalign(ARCH_DMA_MINALIGN, 200 sizeof(*nand_chip.buffers)); 201 nand_chip.oob_poi = nand_chip.buffers->databuf + mtd->writesize; 202 /* setup flash layout (does not scan as we override that) */ 203 mtd->size = nand_chip.chipsize; 204 nand_chip.scan_bbt(mtd); 205 206 return 0; 207 } 208 209 int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf) 210 { 211 struct nand_chip *chip; 212 unsigned int page; 213 unsigned int nand_page_per_block; 214 unsigned int sz = 0; 215 216 if (mxs_nand_init()) 217 return -ENODEV; 218 chip = mtd_to_nand(mtd); 219 page = offs >> chip->page_shift; 220 nand_page_per_block = mtd->erasesize / mtd->writesize; 221 222 debug("%s offset:0x%08x len:%d page:%d\n", __func__, offs, size, page); 223 224 size = roundup(size, mtd->writesize); 225 while (sz < size) { 226 if (mxs_read_page_ecc(mtd, buf, page) < 0) 227 return -1; 228 sz += mtd->writesize; 229 offs += mtd->writesize; 230 page++; 231 buf += mtd->writesize; 232 233 /* 234 * Check if we have crossed a block boundary, and if so 235 * check for bad block. 236 */ 237 if (!(page % nand_page_per_block)) { 238 /* 239 * Yes, new block. See if this block is good. If not, 240 * loop until we find a good block. 241 */ 242 while (is_badblock(mtd, offs, 1)) { 243 page = page + nand_page_per_block; 244 /* Check i we've reached the end of flash. */ 245 if (page >= mtd->size >> chip->page_shift) 246 return -ENOMEM; 247 } 248 } 249 } 250 251 return 0; 252 } 253 254 int nand_default_bbt(struct mtd_info *mtd) 255 { 256 return 0; 257 } 258 259 void nand_init(void) 260 { 261 } 262 263 void nand_deselect(void) 264 { 265 } 266 267